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Secure and Durable (SEDURA): An Integrated Encryption and Wear-leveling Framework for PCM-based Main Memory

Published: 04 June 2015 Publication History

Abstract

Phase changing memory (PCM) is considered a promising candidate for next-generation main-memory. Despite its advantages of lower power and high density, PCM faces critical security challenges due to its non-volatility: data are still accessible by the attacker even if the device is detached from a power supply. While encryption has been widely adopted as the solution to protect data, it not only creates additional performance and energy overhead during data encryption/decryption, but also hurts PCM lifetime by introducing more writes to PCM cells.
In this paper, we propose a framework that integrates encryption and wear-leveling so as to mitigate the adverse impact of encryption on PCM performance and lifetime. Moreover, by randomizing the address space during wear-leveling, an extra level of protection is provided to the data in memory. We propose two algorithms that respectively prioritize data security and memory lifetime, allowing designers to trade-off between these two factors based on their needs. Compared to previous encryption techniques, the proposed SEDURA framework is able to deliver both more randomness to protect data and more balanced PCM writes, thus effectively balancing the three aspects of data security, application performance, and device lifetime.

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  • (2023)SweepCache: Intermittence-Aware Cache on the CheapProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3623781(1059-1074)Online publication date: 28-Oct-2023
  • (2023)Persistent Processor ArchitectureProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3623772(1075-1091)Online publication date: 28-Oct-2023
  • (2022)CoSeP: Compression and Content-based Selection Procedure to Improve Lifetime of Encrypted Non-Volatile Main MemoriesProceedings of the Great Lakes Symposium on VLSI 202210.1145/3526241.3530375(393-396)Online publication date: 6-Jun-2022
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    Published In

    cover image ACM SIGPLAN Notices
    ACM SIGPLAN Notices  Volume 50, Issue 5
    LCTES '15
    May 2015
    141 pages
    ISSN:0362-1340
    EISSN:1558-1160
    DOI:10.1145/2808704
    • Editor:
    • Andy Gill
    Issue’s Table of Contents
    • cover image ACM Conferences
      LCTES'15: Proceedings of the 16th ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems 2015 CD-ROM
      June 2015
      149 pages
      ISBN:9781450332576
      DOI:10.1145/2670529
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 04 June 2015
    Published in SIGPLAN Volume 50, Issue 5

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    Author Tags

    1. Encryption
    2. Phase change memory
    3. Security
    4. Wear-leveling

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    Cited By

    View all
    • (2023)SweepCache: Intermittence-Aware Cache on the CheapProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3623781(1059-1074)Online publication date: 28-Oct-2023
    • (2023)Persistent Processor ArchitectureProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3623772(1075-1091)Online publication date: 28-Oct-2023
    • (2022)CoSeP: Compression and Content-based Selection Procedure to Improve Lifetime of Encrypted Non-Volatile Main MemoriesProceedings of the Great Lakes Symposium on VLSI 202210.1145/3526241.3530375(393-396)Online publication date: 6-Jun-2022
    • (2021)ReplayCache: Enabling Volatile Cachesfor Energy Harvesting SystemsMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480102(170-182)Online publication date: 18-Oct-2021
    • (2021)Bonsai Merkle Forests: Efficiently Achieving Crash Consistency in Secure Persistent MemoryMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480067(1227-1240)Online publication date: 18-Oct-2021
    • (2020)Crab-treeACM Transactions on Embedded Computing Systems10.1145/339623619:5(1-26)Online publication date: 26-Sep-2020
    • (2020)Persist Level Parallelism: Streamlining Integrity Tree Updates for Secure Persistent Memory2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO50266.2020.00015(14-27)Online publication date: Oct-2020
    • (2019)Crash recoverable ARMv8-oriented B+-tree for byte-addressable persistent memoryProceedings of the 20th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems10.1145/3316482.3326358(33-44)Online publication date: 23-Jun-2019
    • (2018)A Survey of Techniques for Improving Security of Non-volatile MemoriesJournal of Hardware and Systems Security10.1007/s41635-018-0034-52:2(179-200)Online publication date: 2-Mar-2018
    • (2017)Memory that never forgets: emerging nonvolatile memory and the implication for architecture designNational Science Review10.1093/nsr/nwx0825:4(577-592)Online publication date: 25-Aug-2017
    • Show More Cited By

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