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Optimizations for a highly cost-efficient programmable logic architecture

Authors:

Kerry Veenstra,

Bruce Pedersen,

Jay Schleicher,

Chiakang SungAuthors Info & Claims

FPGA '98: Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays

Pages 20 - 24

https://doi.org/10.1145/275107.275115

Published: 01 March 1998 Publication History

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Abstract

Architects of programmable logic devices (PLDs) face several challenges when optimizing a new device family for low manufacturing cost. When given an aggressive die-size goal, functional blocks that seem otherwise insignificant become targets for area reduction. Once low die cost is achieved, it is seen that testing and packaging costs must be considered. Interactions among these three cost contributors pose trade-offs that prevent independent optimization. This paper discusses solutions discovered by the architects optimizing the Altera FLEX 6000 architecture.

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Cited By

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Amagasaki MShibata Y(2018)FPGA StructurePrinciples and Structures of FPGAs10.1007/978-981-13-0824-6_3(47-86)Online publication date: 4-Sep-2018
https://doi.org/10.1007/978-981-13-0824-6_3
Lewis DAhmed EBaeckler GBetz VBourgeault MCashman DGalloway DHutton MLane CLee ALeventis PMarquardt SMcClintock CPadalia KPedersen BPowell GRatchev BReddy SSchleicher JStevens KYuan RCliff RRose JSchmit HWilton S(2005)The Stratix II logic and routing architectureProceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays10.1145/1046192.1046195(14-20)Online publication date: 20-Feb-2005
https://dl.acm.org/doi/10.1145/1046192.1046195
Hutton MSchleicher JLewis DPedersen BYuan RKaptanoglu SBaeckler GRatchev BPadalia KBourgeault MLee AKim HSaini R(2004)Improving FPGA Performance and Area Using an Adaptive Logic ModuleField Programmable Logic and Application10.1007/978-3-540-30117-2_16(135-144)Online publication date: 2004
https://doi.org/10.1007/978-3-540-30117-2_16
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Optimizations for a highly cost-efficient programmable logic architecture
1. Hardware

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Information

Published In

FPGA '98: Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays

March 1998

262 pages

ISBN:0897919785

DOI:10.1145/275107

Chairmen:
Jason Cong
Univ. of California, Los Angeles
,
Sinan Kaptanoglu
Actel Corp.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 March 1998

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Conference

FPGA98

Sponsor:

SIGDA

FPGA98: 1998 International Symposium on Field Programmable Gate Arrays

February 22 - 25, 1998

California, Monterey, USA

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Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

View all

Amagasaki MShibata Y(2018)FPGA StructurePrinciples and Structures of FPGAs10.1007/978-981-13-0824-6_3(47-86)Online publication date: 4-Sep-2018
https://doi.org/10.1007/978-981-13-0824-6_3
Lewis DAhmed EBaeckler GBetz VBourgeault MCashman DGalloway DHutton MLane CLee ALeventis PMarquardt SMcClintock CPadalia KPedersen BPowell GRatchev BReddy SSchleicher JStevens KYuan RCliff RRose JSchmit HWilton S(2005)The Stratix II logic and routing architectureProceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays10.1145/1046192.1046195(14-20)Online publication date: 20-Feb-2005
https://dl.acm.org/doi/10.1145/1046192.1046195
Hutton MSchleicher JLewis DPedersen BYuan RKaptanoglu SBaeckler GRatchev BPadalia KBourgeault MLee AKim HSaini R(2004)Improving FPGA Performance and Area Using an Adaptive Logic ModuleField Programmable Logic and Application10.1007/978-3-540-30117-2_16(135-144)Online publication date: 2004
https://doi.org/10.1007/978-3-540-30117-2_16
Lewis DBetz VJefferson DLee ALane CLeventis PMarquardt SMcClintock CPedersen BPowell GReddy SWysocki CCliff RRose JTrimberger STessier R(2003)The stratixπ routing and logic architectureProceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays10.1145/611817.611821(12-20)Online publication date: 23-Feb-2003
https://dl.acm.org/doi/10.1145/611817.611821
Hutton MChan VKazarian PMaruri VNgai TPark JPatel RPedersen BSchleicher JShumarayev SSchlag MTrimberger S(2002)Interconnect enhancements for a high-speed PLD architectureProceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays10.1145/503048.503050(3-10)Online publication date: 24-Feb-2002
https://dl.acm.org/doi/10.1145/503048.503050
Cliff RReddy SMcClintock CJefferson DLane CZaveri KMejia MLee ANgo NAltaf RPedersen BHeile FSchleicher JTurner J(1999)A next generation architecture optimized for high density system level integrationProceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327)10.1109/CICC.1999.777268(175-178)Online publication date: 1999
https://doi.org/10.1109/CICC.1999.777268
Chiakang Sung Cliff RHuang JWang BKhai Nguyen Xiaobao Wang Veenstra KPedersen BTurner J(1998)A silicon efficient FLEX 6000 programmable logic architectureProceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143)10.1109/CICC.1998.694979(273-276)Online publication date: 1998
https://doi.org/10.1109/CICC.1998.694979

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