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Exploring duty cycle distortions along signal paths in FPGAs (abstract only)

Authors:

Matthias Hinkfoth,

Ralf Joost,

Ralf SalomonAuthors Info & Claims

FPGA '14: Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays

Page 257

https://doi.org/10.1145/2554688.2554737

Published: 26 February 2014 Publication History

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Abstract

Non-trivial hardware architectures consist of a significant number of fine-grained modules that communication with each other via dedicated signal lines. In field-programmable gate arrays (FPGAs), these communication lines are provided in forms of global vertical and horizontal routing channels, and are subject to the routing process. Since the effects of physical properties on the signal skew along these lines is well understood, this paper investigates the observable effects on a signal's duty cycle. Practical experiments show that the distortion on the duty cycle progressively increases along such wires (connections) and that in the extreme case, a signal may entirely vanish.

Index Terms

Exploring duty cycle distortions along signal paths in FPGAs (abstract only)
1. Hardware
  1. Very large scale integration design
    1. Application-specific VLSI designs

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Information

Published In

FPGA '14: Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays

February 2014

272 pages

ISBN:9781450326711

DOI:10.1145/2554688

General Chair:
Vaughn Betz
University of Toronto, Canada
,
Program Chair:
George A. Constantinides
Imperial College London, UK

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 26 February 2014

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Poster

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FPGA'14

Sponsor:

SIGDA

FPGA'14: The 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 26 - 28, 2014

California, Monterey, USA

Acceptance Rates

FPGA '14 Paper Acceptance Rate 30 of 110 submissions, 27%;

Overall Acceptance Rate 125 of 627 submissions, 20%

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Index Terms

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Reprogrammable network packet processing on the field programmable port extender (FPX)

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