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Hardware-Based Load Value Trace Filtering for On-the-Fly Debugging

Published: 01 May 2013 Publication History

Abstract

Capturing program and data traces during program execution unobtrusively on-the-fly is crucial in debugging and testing of cyber-physical systems. However, tracing a complete program unobtrusively is often cost-prohibitive, requiring large on-chip trace buffers and wide trace ports. This article describes a new hardware-based load data value filtering technique called Cache First-access Tracking. Coupled with an effective variable encoding scheme, this technique achieves a significant reduction of load data value traces, from 5.86 to 56.39 times depending on the data cache size, thus enabling cost-effective, unobtrusive on-the-fly tracing and debugging.

References

[1]
Al-Zoubi, H., Milenković, A., and Milenković, M. 2004. Performance evaluation of cache replacement policies for the SPEC CPU2000 benchmark suite. In Proceedings of the 42nd Annual Southeast Regional Conference. 267--272. http://doi.acm.org/10.1145/986537.986601.
[2]
ARM. 2004. CoreSight On-chip Debug and Trace Technology. http://www.arm.com/products/solutions/CoreSight.html.
[3]
ARM. 2005. Architecture and Implementation of the ARM®CortexTM-A8 Microprocessor. http://www.arm.com/pdfs/TigerWhitepaperFinal.pdf.
[4]
ARM. 2007. Embedded Trace Macrocell Architecture Specification. http://infocenter.arm.com/help/topic/com.arm.doc.ihi0014o/IHI0014O_etm_v3_4_architecture_spec.pdf.
[5]
Austin, T., Larson, E., and Ernst, D. 2002. SimpleScalar: An infrastructure for computer system modeling. IEEE Comput. 35, 59--67.
[6]
Daoud, E. A. and Nicolici, N., 2009. Real-time lossless compression for silicon debug. IEEE Trans. Comput.-Aided Design Integr. Circuits Syst. 28, 1387--1400.
[7]
Guthaus, M. R., Ringenberg, J. S., Ernst, D., Austin, T. M., Mudge, T., and Brown, R. B. 2001. MiBench: A free, commercially representative embedded benchmark suite. In Proceedings of the 4th Annual Workshop on Workload Characterization. 3--14.
[8]
IEEE. 2001. IEEE Std 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture -Description. http://standards.ieee.org/reading/ieee/std_public/description/testtech/1149.1-1990_desc.html.
[9]
IEEE-ISTO. 2003. The Nexus 5001 Forum Standard for a Global Embedded Processor Debug Interface. http://www.nexus5001.org/standard.
[10]
Intel. 2004. Intel XScale®Core Developer’s Manual. http://download.intel.com/design/intelxscale/27347302.pdf.
[11]
Kao, C.-F., Huang, S.-M., and Huang, I.-J. 2007. A hardware approach to real-time program trace compression for embedded processors. IEEE Trans. Circuits Syst. 54, 530--543.
[12]
McDonald-Maier, K. D. and Hopkins, A. B. T., 2004. An awakening thought: Don’t let the bug bite while you are embedded. Embed. Syst. Eng. 12, 32--33.
[13]
Milenković, A. 2000. Achieving high performance in bus-based shared-memory multiprocessors. IEEE Concurrency 8, 3, 36--44.
[14]
Milenković, A., Uzelac, V., Milenković, M., and Burtscher, M. 2011. Caches and predictors for real-time, unobtrusive, and cost-effective program tracing in embedded systems. IEEE Trans. Comput. 60, 992--1005.
[15]
MIPS. 2009. MIPS PDtrace Specification. http://www.mips.com/products/product-materials/processor/mips-architecture/.
[16]
Narayanasamy, S., Pokam, G., and Calder, B., 2005. BugNet: Continuously recording program execution for deterministic replay debugging. SIGARCH Comput. Archit. News 33, 284--295.
[17]
Orme, W. 2008. Debug and trace for multicore SoCs. http://www.arm.com/files/pdf/CoresightWhitepaper.pdf.
[18]
Tassey, G. 2002. The economic impacts of inadequate infrastructure for software testing. http://www.rti.org/pubs/software_testing.pdf.
[19]
Tensilica. 2009. Non-intrusive Real-Time Trace Debug. http://www.tensilica.com/products/hw-sw-dev-tools/for-software-developers/real-time-trace-3.htm.
[20]
Thoziyoor, S., Muralimanohar, N., Ahn, J. H., and Jouppi, N. P. 2008. CACTI 5.1. http://www.hpl.hp.com/techreports/2008/HPL-2008-20.pdf?q=cacti.
[21]
Uzelac, V. and Milenković, A. 2009. A Real-time program trace compressor utilizing double move-to-front method. In Proceedings of the 46th Annual Design Automation Conference. 738--743.
[22]
Uzelac, V. and Milenković, A. 2010. Hardware-based data value and address trace filtering techniques. In Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems. 117--126. http://doi.acm.org/10.1145/1878921.1878940.
[23]
Uzelac, V., Milenković, A., Burtscher, M., and Milenković, M. 2010. Real-time unobtrusive program execution trace compression using branch predictor events. In Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES). 97--106. http://portal.acm.org/citation.cfm?doid=1878921.1878938 {Accessed October 16, 2011}.

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Published In

cover image ACM Transactions on Embedded Computing Systems
ACM Transactions on Embedded Computing Systems  Volume 12, Issue 2s
Special Section on Probabilistic Embedded Computing
May 2013
269 pages
ISSN:1539-9087
EISSN:1558-3465
DOI:10.1145/2465787
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 01 May 2013
Accepted: 01 December 2011
Revised: 01 October 2011
Received: 01 June 2010
Published in TECS Volume 12, Issue 2s

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Author Tags

  1. Debugging
  2. load value filtering
  3. program tracing
  4. software debugger
  5. trace compression
  6. trace module
  7. variable encoding

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  • (2019)Thermal-aware Real-time Scheduling Using Timed Continuous Petri NetsACM Transactions on Embedded Computing Systems10.1145/332264318:4(1-24)Online publication date: 2-Jul-2019
  • (2019)Enabling On-the-Fly Hardware Tracing of Data Reads in MulticoresACM Transactions on Embedded Computing Systems10.1145/332264218:4(1-27)Online publication date: 10-Jun-2019
  • (2019)Partitioning and Selection of Data Consistency Mechanisms for Multicore Real-Time SystemsACM Transactions on Embedded Computing Systems10.1145/332027118:4(1-28)Online publication date: 10-Jun-2019
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  • (2016)On-the-fly load data value tracing in multicoresProceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems10.1145/2968455.2968507(1-10)Online publication date: 1-Oct-2016
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  • (2016)Exploiting cache coherence for effective on-the-fly data tracing in multicores2016 IEEE 34th International Conference on Computer Design (ICCD)10.1109/ICCD.2016.7753295(312-319)Online publication date: Oct-2016
  • (2015)mcfTRaptorJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2015.07.00561:10(601-614)Online publication date: 1-Nov-2015
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