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Scheduling using behavioral templates

Published: 01 January 1995 Publication History
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References

[1]
R. Camposano, "Path-based scheduling for synthesis", IEEE transactions on Computer-Aided Design, vol. CAD-10, pp 85-93, Jan 1991.
[2]
B. Gregory, D. MacMillen & D. Fogg, "ISIS: A System for Performance Driven Resource Sharing", in Proc. of 29th DAC, pp285- 290, June 1992.
[3]
D. Ku & G. De Micheli, "Relative Scheduling under Timing Constraints", in Proc. of 27th DAC, pp59-64, June, 1990.
[4]
M.C. McFarland, A. C. Parker & R. Camposano, "The High- Level Synthesis of Digital Systems", in Proc. of IEEE, vol. 78, pp301-318, Feb. 1990.
[5]
E Michel, U. Lauther and E Duzy, "The Synthesis Approach to Digital System Design", Kluwer Academic Publishers, 1992.
[6]
S. Note, W. Geurts, F. Catthoor & H. De Man, "Cathedral III: Architecture-Driven High-Level Synthesis for High Throughput DSP Applications", in Proc. 28th DAC, pp597-602, June, 1991.
[7]
M. Nourani & C. Papachristou, "Move Frame Scheduling and Mixed Scheduling-Allocation for the Automated Synthesis of Digital Systems", in Proc. 29th DAC, pp99-105, June, 1992.
[8]
D. S. Rao & E J. Kurdahi, "Partitioning by Regularity Extraction", in Proc. 29th DAC, pp235-238, June, 1992.
[9]
D. S. Rao & E J. Kurdahi, "System Modeling for High-Level Synthesis Using Regularity Extraction", D. S. Rao & E J. Kurdahi, in Proc. Sixth International Workshop on High Level Synthesis, pp267-272, Nov 1992.
[10]
K. Rose & C. T. Chang, "Cluster-Oriented Scheduling in Pipelined Data Path Synthesis", in Proc. ICCD, Oct. 1993.

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  • (2015)A High-Level Synthesis Algorithm with Inter-Island Distance Based Operation Chainings for RDR ArchitecturesIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E98.A.1366E98.A:7(1366-1375)Online publication date: 2015
  • (2014)IP-enabled C/C++ based high level synthesisInternational Journal of Reconfigurable Computing10.1155/2014/4187502014(1-1)Online publication date: 1-Jan-2014
  • (2011)Pattern-Mining for Behavioral SynthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2011.210637030:6(939-944)Online publication date: 1-Jun-2011
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cover image ACM Conferences
DAC '95: Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
January 1995
760 pages
ISBN:0897917251
DOI:10.1145/217474
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 January 1995

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June 12 - 16, 1995
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Cited By

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  • (2015)A High-Level Synthesis Algorithm with Inter-Island Distance Based Operation Chainings for RDR ArchitecturesIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E98.A.1366E98.A:7(1366-1375)Online publication date: 2015
  • (2014)IP-enabled C/C++ based high level synthesisInternational Journal of Reconfigurable Computing10.1155/2014/4187502014(1-1)Online publication date: 1-Jan-2014
  • (2011)Pattern-Mining for Behavioral SynthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2011.210637030:6(939-944)Online publication date: 1-Jun-2011
  • (2010)A generalized control-flow-aware pattern recognition algorithm for behavioral synthesisProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871228(1255-1260)Online publication date: 8-Mar-2010
  • (2010)Speeding-up heuristic allocation, scheduling and binding with SAT-based abstraction/refinement techniquesACM Transactions on Design Automation of Electronic Systems10.1145/1698759.169876215:2(1-34)Online publication date: 2-Mar-2010
  • (2010)Hierarchical and Multiple-Clock Domain High-Level Synthesis for Low-Power Design on FPGAProceedings of the 2010 International Conference on Field Programmable Logic and Applications10.1109/FPL.2010.94(464-468)Online publication date: 31-Aug-2010
  • (2010)A generalized control-flow-aware pattern recognition algorithm for behavioral synthesis2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)10.1109/DATE.2010.5456999(1255-1260)Online publication date: Mar-2010
  • (2010)Towards a tighter integration of generated and custom-made hardwareProceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications10.1007/978-3-642-12133-3_44(426-434)Online publication date: 17-Mar-2010
  • (2009)Scheduling with soft constraintsProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687410(47-54)Online publication date: 2-Nov-2009
  • (2009)Provably efficient algorithms for resolving temporal and spatial difference constraint violationsACM Transactions on Design Automation of Electronic Systems10.1145/1455229.145523714:1(1-24)Online publication date: 23-Jan-2009
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