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A monitoring system for NoCs

Published: 04 December 2010 Publication History

Abstract

In this paper, we propose and discuss a monitoring architecture for Networks-on-Chip (NoCs) that provides system information useful for helping designers in efficiently exploiting resources available in new complex Multiprocessor System-on-Chip (MPSoC) platforms, and in understanding their behavior. We focus on the analysis of the architectural details and design challenges of such systems, by describing powerful tools for detecting information that can be used both at run-time for detecting dynamic changes in system behavior and at post-execution time for debugging and profiling of applications. We detail the design of the probes monitoring the events and discuss an architecture for collection, storage, and analysis of information generated by them. We evaluate cost of the implementation of the system in terms of area and traffic overhead, and we present results obtained when monitoring a use-case multimedia application.1

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C. Ciordas, T. Basten, R. Radulescu, K. Goossens, and J. Van Meerbergen. An Event-Based Monitoring Service for Networks on Chip. ACM Trans. on Design Automation of Electronic Systems, 10(4):702--723, Oct. 2005.
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C. Ciordas, K. Goossens, R. Radulescu, and T. Basten. NoC Monitoring: Impact on the Desing Flow. In Proc. of ISCAS '06, 2006.
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Cited By

View all
  • (2017)Highly Scalable Monitoring System on Chip for Multi-Stream Auto-Adaptable Vision SystemProceedings of the International Conference on Research in Adaptive and Convergent Systems10.1145/3129676.3129721(249-254)Online publication date: 20-Sep-2017
  • (2015)Adapting Commercial Off-The-Shelf Multicore Processors for Safety-Related Automotive Systems Using Online MonitoringSAE Technical Paper Series10.4271/2015-01-0280Online publication date: 14-Apr-2015
  • (2015)Runtime Adaptive Circuit Switching and Flow Priority in NoC-Based MPSoCsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.233113523:6(1077-1088)Online publication date: Jun-2015
  • Show More Cited By

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Published In

cover image ACM Other conferences
NoCArc '10: Proceedings of the Third International Workshop on Network on Chip Architectures
December 2010
62 pages
ISBN:9781450303972
DOI:10.1145/1921249
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 04 December 2010

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Author Tags

  1. hardware counters
  2. networks-on-chip
  3. performance monitoring
  4. systems-on-chip

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NoCArc'10

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Overall Acceptance Rate 46 of 122 submissions, 38%

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Cited By

View all
  • (2017)Highly Scalable Monitoring System on Chip for Multi-Stream Auto-Adaptable Vision SystemProceedings of the International Conference on Research in Adaptive and Convergent Systems10.1145/3129676.3129721(249-254)Online publication date: 20-Sep-2017
  • (2015)Adapting Commercial Off-The-Shelf Multicore Processors for Safety-Related Automotive Systems Using Online MonitoringSAE Technical Paper Series10.4271/2015-01-0280Online publication date: 14-Apr-2015
  • (2015)Runtime Adaptive Circuit Switching and Flow Priority in NoC-Based MPSoCsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.233113523:6(1077-1088)Online publication date: Jun-2015
  • (2014)A Configurable Monitoring Infrastructure for NoC-Based ArchitecturesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2013.229010222:11(2438-2442)Online publication date: Nov-2014
  • (2012)Security enhancements for FPGA-based MPSoCs: A boot-to-runtime protection flow for an embedded Linux-based system7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)10.1109/ReCoSoC.2012.6322896(1-8)Online publication date: Jul-2012
  • (2012)Monitoring and timing prediction in early analyzing and checking performance of interconnection networks at ESLThirteenth International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED.2012.6187565(679-685)Online publication date: Mar-2012
  • (2012)Architecture and design flow for a debug event distribution interconnectProceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD 2012)10.1109/ICCD.2012.6378676(439-444)Online publication date: 30-Sep-2012
  • (2012)IDAMCProceedings of the 2012 IEEE 14th International Symposium on High-Assurance Systems Engineering10.1109/HASE.2012.19(24-31)Online publication date: 25-Oct-2012
  • (2012)Lightweight reconfiguration security services for AXI-based MPSoCs22nd International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2012.6339233(655-658)Online publication date: Aug-2012
  • (2012)Bus-based MPSoC Security through Communication ProtectionProceedings of the 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2012.42(200-207)Online publication date: 29-Apr-2012

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