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Mnemosyne: lightweight persistent memory

Published: 05 March 2011 Publication History

Abstract

New storage-class memory (SCM) technologies, such as phase-change memory, STT-RAM, and memristors, promise user-level access to non-volatile storage through regular memory instructions. These memory devices enable fast user-mode access to persistence, allowing regular in-memory data structures to survive system crashes.
In this paper, we present Mnemosyne, a simple interface for programming with persistent memory. Mnemosyne addresses two challenges: how to create and manage such memory, and how to ensure consistency in the presence of failures. Without additional mechanisms, a system failure may leave data structures in SCM in an invalid state, crashing the program the next time it starts.
In Mnemosyne, programmers declare global persistent data with the keyword "pstatic" or allocate it dynamically. Mnemosyne provides primitives for directly modifying persistent variables and supports consistent updates through a lightweight transaction mechanism. Compared to past work on disk-based persistent memory, Mnemosyne reduces latency to storage by writing data directly to memory at the granularity of an update rather than writing memory pages back to disk through the file system. In tests emulating the performance characteristics of forthcoming SCMs, we show that Mnemosyne can persist data as fast as 3 microseconds. Furthermore, it provides a 35 percent performance increase when applied in the OpenLDAP directory server. In microbenchmark studies we find that Mnemosyne can be up to 1400% faster than alternative persistence strategies, such as Berkeley DB or Boost serialization, that are designed for disks.

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Published In

cover image ACM SIGARCH Computer Architecture News
ACM SIGARCH Computer Architecture News  Volume 39, Issue 1
ASPLOS '11
March 2011
407 pages
ISSN:0163-5964
DOI:10.1145/1961295
Issue’s Table of Contents
  • cover image ACM Conferences
    ASPLOS XVI: Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
    March 2011
    432 pages
    ISBN:9781450302661
    DOI:10.1145/1950365
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 05 March 2011
Published in SIGARCH Volume 39, Issue 1

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Author Tags

  1. memory transactions
  2. performance
  3. persistence
  4. persistent memory
  5. storage-class memory

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  • (2024)Revisiting PM-Based B$^{+}$+-Tree With Persistent CPU CacheIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2024.337262135:5(796-813)Online publication date: 1-May-2024
  • (2024)Enabling Reliable Memory-Mapped I/O With Auto-Snapshot for Persistent Memory SystemsIEEE Transactions on Computers10.1109/TC.2024.341668373:9(2290-2304)Online publication date: Sep-2024
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