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Cell-based hierarchical pitchmatching compaction using minimal LP

Published: 01 July 1993 Publication History
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References

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C.S. Bamji and R. Varadarajan, "Hierarchical pitchmatching compaction using minimum design," ACM/IEEE 29th Design Automation Conference, pp. 311 - 317, 1992.
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C. Bamji, C. Hauck, and J. Allen,"A design-byexample regular structure generator," A CM/IEEE 22nd Design Automation Conference, pp. 16- 22, 1985.
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D. Boyer, "Symbolic compaction benchmarks," Proceeding International Conference on Computer Design, pp. 186- 191; 209- 217, 1987.
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D. Dutt and C. Y. Lo,"On minimal closure constraint generation for symbolic cell assembly," A CM/IEEE 28th Design Automation Conference, pp., 1991.
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W. Kim, J. Lee, H. Shin,"A new hierarchical layout compactor using simplified graph models," A CM/IEEE 29th Design Automation Conference, pp. 323 - 326, 1992.
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J.F. Lee and D. T. Tang,"HIMALAYAS- a hierarchical compaction system with a minimized constraint Set," To appear in IEEE International Conference on CAD, 1992.
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C.Y. Lo and R. Varadarajan, "An O(nl'51og n) 1-d compaction algorithm," A CM/IEEE 27th Design Automation Conference, pp. 382- 387, 1990.
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D. Marple,"A hierarchy preserving hierarchical compactor," ACM/IEEE 27th Design Automation Conference, pp. 134- 140, 1990.

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cover image ACM Conferences
DAC '93: Proceedings of the 30th international Design Automation Conference
July 1993
768 pages
ISBN:0897915771
DOI:10.1145/157485
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 July 1993

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DAC93
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DAC93: The 30th ACM/IEEE Design Automation Conference
June 14 - 18, 1993
Texas, Dallas, USA

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Overall Acceptance Rate 299 of 1,119 submissions, 27%

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  • (2014)Cell-based interconnect migration by hierarchical optimizationIntegration, the VLSI Journal10.1016/j.vlsi.2013.10.00347:2(161-174)Online publication date: 1-Mar-2014
  • (2014)Layout MigrationMulti-Net Optimization of VLSI Interconnect10.1007/978-1-4614-0821-5_9(195-219)Online publication date: 16-Oct-2014
  • (2009)Topology-driven cell layout migration with collinear constraints2009 IEEE International Conference on Computer Design10.1109/ICCD.2009.5413118(439-444)Online publication date: Oct-2009
  • (2006)Graph-theory-based simplex algorithm for VLSI layout spacing problems with multiple variable constraintsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.93637820:8(967-979)Online publication date: 1-Nov-2006
  • (1998)Top-down approach to technology migration for full-custom mask layoutsProceedings Eleventh International Conference on VLSI Design10.1109/ICVD.1998.646577(48-52)Online publication date: 1998
  • (1997)DECOMP: a technology migration subsystem for full chip mask layouts1997 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM. 10 Years Networking the Pacific Rim, 1987-199710.1109/PACRIM.1997.620415(942-945)Online publication date: 1997
  • (1995)GLOBAL OPTIMIZATION ALGORITHMS FOR CHIP LAYOUT AND COMPACTIONEngineering Optimization10.1080/0305215950894125925:2(131-154)Online publication date: Oct-1995

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