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The Atomos transactional programming language

Published: 11 June 2006 Publication History

Abstract

Atomos is the first programming language with implicit transactions, strong atomicity, and a scalable multiprocessor implementation. Atomos is derived from Java, but replaces its synchronization and conditional waiting constructs with simpler transactional alternatives.The Atomos watch statement allows programmers to specify fine-grained watch sets used with the Atomos retry conditional waiting statement for efficient transactional conflict-driven wakeup even in transactional memory systems with a limited number of transactional contexts. Atomos supports open-nested transactions, which are necessary for building both scalable application programs and virtual machine implementations.The implementation of the Atomos scheduler demonstrates the use of open nesting within the virtual machine and introduces the concept of transactional memory violation handlers that allow programs to recover from data dependency violations without rolling back.Atomos programming examples are given to demonstrate the usefulness of transactional programming primitives. Atomos and Java are compared through the use of several benchmarks. The results demonstrate both the improvements in parallel programming ease and parallel program performance provided by Atomos.

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Published In

cover image ACM Conferences
PLDI '06: Proceedings of the 27th ACM SIGPLAN Conference on Programming Language Design and Implementation
June 2006
438 pages
ISBN:1595933204
DOI:10.1145/1133981
  • cover image ACM SIGPLAN Notices
    ACM SIGPLAN Notices  Volume 41, Issue 6
    Proceedings of the 2006 PLDI Conference
    June 2006
    426 pages
    ISSN:0362-1340
    EISSN:1558-1160
    DOI:10.1145/1133255
    Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 11 June 2006

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Author Tags

  1. conditional synchronization
  2. java
  3. multiprocessor architecture
  4. transactional memory

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Cited By

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  • (2022)Using Barrier Elision to Improve Transactional Code GenerationACM Transactions on Architecture and Code Optimization10.1145/353331819:3(1-23)Online publication date: 6-Jul-2022
  • (2022)A Comprehensive Exploration of Languages for Parallel ComputingACM Computing Surveys10.1145/348500855:2(1-39)Online publication date: 18-Jan-2022
  • (2022)Condition-based synchronization in data-centric concurrency controlProceedings of the 37th ACM/SIGAPP Symposium on Applied Computing10.1145/3477314.3507120(1268-1275)Online publication date: 25-Apr-2022
  • (2022)Programming Transactional MemoryTransactional Memory10.1007/978-3-031-01719-3_2(15-52)Online publication date: 17-Oct-2022
  • (2021)Mimosa: Protecting Private Keys Against Memory Disclosure Attacks Using Hardware Transactional MemoryIEEE Transactions on Dependable and Secure Computing10.1109/TDSC.2019.289766618:3(1196-1213)Online publication date: 1-May-2021
  • (2020)Substream-Centric Maximum Matchings on FPGAACM Transactions on Reconfigurable Technology and Systems10.1145/337787113:2(1-33)Online publication date: 24-Apr-2020
  • (2020)Improving Transactional Code Generation via Variable Annotation and Barrier Elision2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS47924.2020.00107(1008-1017)Online publication date: May-2020
  • (2019)The Transactional MemoryInternational Journal of Scientific Research in Computer Science, Engineering and Information Technology10.32628/CSEIT1951117(13-20)Online publication date: 25-Feb-2019
  • (2019)Simplifying Transactional Memory Support in C++ACM Transactions on Architecture and Code Optimization10.1145/332879616:3(1-24)Online publication date: 25-Jul-2019
  • (2017)What Scalable Programs Need from Transactional MemoryACM SIGARCH Computer Architecture News10.1145/3093337.303775045:1(105-118)Online publication date: 4-Apr-2017
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