Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1145/1185347.1185363acmconferencesArticle/Chapter ViewAbstractPublication PagesancsConference Proceedingsconference-collections
Article

A methodology for evaluating runtime support in network processors

Published: 03 December 2006 Publication History

Abstract

Modern network processor systems require the ability to adapt their processing capabilities at runtime to changes in network traffic. Traditionally, network processor applications have been optimized for a single static workload scenario, but recently several approaches for run-time adaptation have been proposed. Comparing these approaches and developing novel run-time support algorithms is difficult due to the multicore system-on-a-chip nature of network processors. In this paper, we present a model for network processors that can aid in evaluating different run-time support systems. The model considers workload characteristics of applications and network traffic. We use a queuing network abstraction to model different runtime systems. We illustrate the effectiveness of this model by comparing the performance of two existing workload adaptation algorithms.

References

[1]
J. Allen, B. Bass, C. Basso, R. Boivie, J. Calvignac, G. Davis, L. Frelechoux, M. Heddes, A. Herkersdorf, A. Kind, J. Logan, M. Peyravian, M. Rinaldi, R. Sabhikhi, M. Siegel, and M. Waldvogel. IBM PowerNP network processor: Hardware, software, and applications. IBM Journal of Research and Development, 47(2/3):177--194, 2003.
[2]
AMCC. np7510 10 Gbps Network Processor, 2003. http://www.amcc.com.
[3]
F. Baskett, K. M. Chandy, R. R. Muntz, and F. G. Palacios. Open, closed, and mixed networks of queues with different classes of customers. Journal of the ACM, 22(2):248--260, Apr. 1975.
[4]
G. Bolch, S. Greiner, H. de Meer, and K. S. Trivedi. Queueing Networks and Markov Chains: Modeling and Performance Evaluation with Computer Science Applications. John Wiley & Sons, Inc., New York, NY, Aug. 1998.
[5]
J. D. Brutlag. Aberrant behavior detection in time series for network monitoring. In Proc. of the 14th Systems Administration Conference, pages 139--146, New Orleans, LA, Dec. 2000.
[6]
D. Clark, K. Sollins, J. Wroclawski, D. Katabi, J. Kulik, X. Yang, B. Braden, T. Faber, A. Falk, V. Pingali, M. Handley, and N. Chiappa. New Arch: future generation internet architecture. Technical report, Dec. 2003.
[7]
P. Crowley and J.-L. Baer. A modelling framework for network processor systems. In Proc. of First Network Processor Workshop (NP-1) in conjunction with Eighth IEEE International Symposium on High Performance Computer Architecture (HPCA-8), pages 86--96, Cambridge, MA, Feb. 2002.
[8]
W. Eatherton. The push of network processing to the top of the pyramid. In Keynote Presentation at ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS), Princeton, NJ, Oct. 2005.
[9]
EZchip Technologies Ltd., Yokneam, Israel. NP-1 10-Gigabit 7-Layer Network Processor, 2002. http://www.ezchip.com/html/pr_np-1.html.
[10]
M. A. Franklin and S. Datar. Pipeline task scheduling on network processors. In Proc. of Third Network Processor Workshop (NP-3) in conjunction with Tenth IEEE International Symposium on High Performance Computer Architecture (HPCA-10), Madrid, Spain, Feb. 2004.
[11]
A. Gavrilovska, K. Schwan, O. Nordstrom, and H. Seifu. Network processors as building blocks in overlay networks. In Proc. of Hot Interconnects, pages 83--88, Stanford, CA, Aug. 2003. ACM.
[12]
S. D. Goglin, D. Hooper, A. Kumar, and R. Yavatkar. Advanced software framework, tools, and languages for the IXP family. Intel Technology Journal, 7(4):64--76, Nov. 2003.
[13]
M. Gries, C. Kulkarni, C. Sauer, and K. Keutzer. Exploring trade-offs in performance and programmability of processing element topologies for network processors. In Proc. of Second Network Processor Workshop (NP-2) in conjunction with Ninth IEEE International Symposium on High Performance Computer Architecture (HPCA-9), pages 75--87, Anaheim, CA, Feb. 2003.
[14]
Intel Corporation. Intel Second Generation Network Processor, 2005. http://www.intel.com/design/network/products/npfamily/.
[15]
E. Khan, M. W. El-Kharashi, A. Ehtesham Rafiq, F. Gebali, and M. Abd-El-Barr. Network processors for communication security: a review. In Proc. of IEEE Pacific Rim Conference on Communications, Computers and Signal Processing 2003. PACRIM. 2003 IEEE Pacific Rim Conference onCommunications, Computers and signal Processing (PacRim 2003), Waikiki, HI, Feb. 2003.
[16]
R. Kokku, T. Riché, A. Kunze, J. Mudigonda, J. Jason, and H. Vin. A case for run-time adaptation in packet processing systems. In Proc. of the 2nd Workshop on Hot Topics in Networks (HOTNETS-II), Cambridge, MA, Nov. 2003.
[17]
A. Lakhina, K. Papagiannaki, M. Crovella, C. Diot, E. D. Kolaczyk, and N. Taft. Structural analysis of network traffic flows. SIGMETRICS Performance Evaluation Review, 32(1):61--72, June 2004.
[18]
R.-T. Liu, N.-F. Huang, C.-H. Chen, and C.-N. Kao. A fast string-matching algorithm for network processor-based intrusion detection system. Transactions on Embedded Computing Systems, 3(3):614--633, Aug. 2004.
[19]
G. Memik and W. H. Mangione-Smith. NEPAL: A framework for efficiently structuring applications for network processors. In Proc. of Second Network Processor Workshop (NP-2) in conjunction with Ninth IEEE International Symposium on High Performance Computer Architecture (HPCA-9), Anaheim, CA, Feb. 2003.
[20]
W. Plishker, K. Ravindran, N. Shah, and K. Keutzer. Automated task allocation for network processors. In Proc. of Network System Design Conference, pages 235--245, Oct. 2004.
[21]
R. Ramaswamy and T. Wolf. PacketBench: A tool for workload characterization of network processing. In Proc. of IEEE 6th Annual Workshop on Workload Characterization (WWC-6), pages 42--50, Austin, TX, Oct. 2003.
[22]
L. Ruf, K. Farkas, H. Hug, and B. Plattner. Network services on service extensible routers. In Proc. of Seventh Annual International Working Conference on Active Networking (IWAN 2005), Sophia Antipolis, France, Nov. 2005.
[23]
N. Shah, W. Plishker, and K. Keutzer. NP-Click: A programming model for the intel IXP1200. In Proc. of Second Network Processor Workshop (NP-2) in conjunction with Ninth IEEE International Symposium on High Performance Computer Architecture (HPCA-9), pages 100--111, Anaheim, CA, Feb. 2003.
[24]
J. Sommers and P. Barford. Self-configuring network traffic generation. In Proc. of the 4th ACM SIGCOMM conference on Internet measurement (IMC), pages 68--81, Taormina, Italy, Oct. 2004.
[25]
T. Spalink, S. Karlin, L. Peterson, and Y. Gottlieb. Building a robust software-based router using network processors. In Proc. of the 18th ACM Symposium on Operating Systems Principles (SOSP), pages 216--229, Banff, AB, Oct. 2001.
[26]
Teja Technologies. TejaNP Datasheet, 2003. http://www.teja.com.
[27]
L. Thiele, S. Chakraborty, M. Gries, and S. Künzli. Design space exploration of network processor architectures. In Proc. of First Network Processor Workshop (NP-1) in conjunction with Eighth IEEE International Symposium on High Performance Computer Architecture (HPCA-8), pages 30--41, Cambridge, MA, Feb. 2002.
[28]
T. Wolf and M. Franklin. Performance models for network processor design. IEEE Transactions on Parallel and Distributed Systems, 17(6):548--561, June 2006.
[29]
T. Wolf, N. Weng, and C.-H. Tai. Design considerations for network processor operating systems. In Proc. of ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS), pages 71--80, Princeton, NJ, Oct. 2005.
[30]
L. Zhao, Y. Luo, L. Bhuyan, and R. Iyer. Design and implementation of a content-aware switch using a network processor. In Proc. of 13th International Symposium on High Performance Interconnects (Hot-I05), Stanford, CA, Aug. 2005.
[31]
W. Zhou, C. Lin, Y. Li, and Z. Tan. Queue management for QoS provision build on network processor. In Proc. of the The Ninth IEEE Workshop on Future Trends of Distributed Computing Systems (FTDCS'03), page 219, San Juan, PR, May 2003.

Cited By

View all
  • (2008)Dynamic workload profiling and task allocation in packet processing systems2008 International Conference on High Performance Switching and Routing10.1109/HSPR.2008.4734432(123-130)Online publication date: May-2008

Index Terms

  1. A methodology for evaluating runtime support in network processors

      Recommendations

      Comments

      Please enable JavaScript to view thecomments powered by Disqus.

      Information & Contributors

      Information

      Published In

      cover image ACM Conferences
      ANCS '06: Proceedings of the 2006 ACM/IEEE symposium on Architecture for networking and communications systems
      December 2006
      202 pages
      ISBN:1595935800
      DOI:10.1145/1185347
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

      Sponsors

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      Published: 03 December 2006

      Permissions

      Request permissions for this article.

      Check for updates

      Author Tags

      1. network processors
      2. runtime management
      3. workload partitioning and mapping

      Qualifiers

      • Article

      Conference

      ANCS06

      Acceptance Rates

      Overall Acceptance Rate 88 of 314 submissions, 28%

      Contributors

      Other Metrics

      Bibliometrics & Citations

      Bibliometrics

      Article Metrics

      • Downloads (Last 12 months)2
      • Downloads (Last 6 weeks)0
      Reflects downloads up to 23 Feb 2025

      Other Metrics

      Citations

      Cited By

      View all
      • (2008)Dynamic workload profiling and task allocation in packet processing systems2008 International Conference on High Performance Switching and Routing10.1109/HSPR.2008.4734432(123-130)Online publication date: May-2008

      View Options

      Login options

      View options

      PDF

      View or Download as a PDF file.

      PDF

      eReader

      View online with eReader.

      eReader

      Figures

      Tables

      Media

      Share

      Share

      Share this Publication link

      Share on social media