Article

An effective network processor design framework: using multi-objective evolutionary algorithms and object oriented techniques to optimise the intel IXP1200 network processor

Authors:

Colin FlanaganAuthors Info & Claims

ANCS '06: Proceedings of the 2006 ACM/IEEE symposium on Architecture for networking and communications systems

Pages 103 - 112

https://doi.org/10.1145/1185347.1185362

Published: 03 December 2006 Publication History

ANCS '06: Proceedings of the 2006 ACM/IEEE symposium on Architecture for networking and communications systems

An effective network processor design framework: using multi-objective evolutionary algorithms and object oriented techniques to optimise the intel IXP1200 network processor

Pages 103 - 112

Abstract
References

Abstract

In this paper we present a framework for design space exploration of a network processor, that incorporates parameterisation, power and cost analysis. This method utilises multi-objective evolutionary algorithms and object oriented analysis and design. Using this approach an engineer specifies certain hard and soft performance requirements for a multi-processor system, and allows it to be generated automatically by competitive evolution/optimisation, thus obviating the need for detailed design. To make the proposal concrete, we use the Intel IXP1200 network processor as a baseline complex system design and show how various improvements can be make to this architecture by evolutionary/competitive design. Various approaches to multi-objective optimisation (Darwin, Lamarck Baldwin, etc.) are compared and contrasted in their ability to generate architectures meeting various constraints. We also present an assessment of a proposed architecture with reference to four different packet processing roles. The merits of an "island clocking" scheme versus a "common clocking" scheme are also discussed. Our paper highlights the flexibility that this framework bestows on the designer, along with the potential to achieve cost savings and performance improvement.

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Cited By

Ying W(2014)Research on Packet-Processing Architecture Based on Multi-core ProcessorProceedings of the 2014 Sixth International Conference on Measuring Technology and Mechatronics Automation10.1109/ICMTMA.2014.126(520-523)Online publication date: 10-Jan-2014
https://dl.acm.org/doi/10.1109/ICMTMA.2014.126
de Silva Garza AGoel AHarrell FMagerko BNagai YProphet J(2011)Exploring the sensitivity to representation of an evolutionary algorithm for the design of shapesProceedings of the 8th ACM conference on Creativity and cognition10.1145/2069618.2069661(259-268)Online publication date: 3-Nov-2011
https://dl.acm.org/doi/10.1145/2069618.2069661
Li YQiao X(2011)A Parallel Packet Processing Method on Multi-core SystemsProceedings of the 2011 10th International Symposium on Distributed Computing and Applications to Business, Engineering and Science10.1109/DCABES.2011.11(78-81)Online publication date: 14-Oct-2011
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Index Terms

An effective network processor design framework: using multi-objective evolutionary algorithms and object oriented techniques to optimise the intel IXP1200 network processor
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Multiple instruction, multiple data
2. Computing methodologies
  1. Modeling and simulation
    1. Model development and analysis
      1. Model verification and validation

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cover image ACM Conferences

ANCS '06: Proceedings of the 2006 ACM/IEEE symposium on Architecture for networking and communications systems

December 2006

202 pages

ISBN:1595935800

DOI:10.1145/1185347

General Chair:
Laxmi N. Bhuyan
University of California, Riverside, USA
,
Program Chairs:
Michel Dubois
University of Southern California, USA
,
Will Eatherton
Cisco, USA

Copyright © 2006 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 03 December 2006

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ANCS06: Symposium on Architecture for Networking and Communications Systems

December 3 - 5, 2006

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Cited By

Ying W(2014)Research on Packet-Processing Architecture Based on Multi-core ProcessorProceedings of the 2014 Sixth International Conference on Measuring Technology and Mechatronics Automation10.1109/ICMTMA.2014.126(520-523)Online publication date: 10-Jan-2014
https://dl.acm.org/doi/10.1109/ICMTMA.2014.126
de Silva Garza AGoel AHarrell FMagerko BNagai YProphet J(2011)Exploring the sensitivity to representation of an evolutionary algorithm for the design of shapesProceedings of the 8th ACM conference on Creativity and cognition10.1145/2069618.2069661(259-268)Online publication date: 3-Nov-2011
https://dl.acm.org/doi/10.1145/2069618.2069661
Li YQiao X(2011)A Parallel Packet Processing Method on Multi-core SystemsProceedings of the 2011 10th International Symposium on Distributed Computing and Applications to Business, Engineering and Science10.1109/DCABES.2011.11(78-81)Online publication date: 14-Oct-2011
https://dl.acm.org/doi/10.1109/DCABES.2011.11
Pong FTzeng N(2008)Application-Layer Packet Processing through Ethereal MemoryProceedings of the 2008 Seventh IEEE International Symposium on Network Computing and Applications10.1109/NCA.2008.32(185-194)Online publication date: 10-Jul-2008
https://dl.acm.org/doi/10.1109/NCA.2008.32

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