Article

TLM/network design space exploration for networked embedded systems

Authors:

N. Bombieri,

F. Fummi,

D. QuagliaAuthors Info & Claims

CODES+ISSS '06: Proceedings of the 4th international conference on Hardware/software codesign and system synthesis

Pages 58 - 63

https://doi.org/10.1145/1176254.1176271

Published: 22 October 2006 Publication History

Get Access

Abstract

This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design dimension is added to the traditional TLM refinement process to represent network configuration alternatives. Each network configuration can be used both to drive architecture refinement and exploration and to validate the system after each refinement step. A general criterion to map functionalities to System and Network models is presented. As a case study, the proposed methodology is applied to the design of a Voice-over-IP client.

References

[1]

A. Dahan et al. Combining system level modeling with assertion based verification. In Proc. IEEE ISQED, pages 310--315, Mar. 2005.

Digital Library

Google Scholar

[2]

N. Bombieri, A. Fedeli, and F. Fummi. On PSL properties re-use in SoC design flow based on Transaction Level Modeling. In Proc. IEEE MTV, 2005.

Digital Library

Google Scholar

[3]

L. Cai and D.Gajski. Transaction Level Modeling: An Overview. In Proc. IEEE Int. Conf. on Hardware/Software Codesign & System Synthesis, pages 19--24, Oct. 2003.

Digital Library

Google Scholar

[4]

D.S. Brahme et al. The Transaction-Based Verification Methodology. Technical Report CDNL-TR-2000-0825, Cadence Berkeley Labs, Aug. 2000.

Google Scholar

[5]

F. Fummi et al. A timing-accurate modeling and simulation environment for networked embedded systems. In Proc. ACM Design and Automation Conf. (DAC), pages 42--47, Jun. 2003.

Digital Library

Google Scholar

[6]

F. Fummi et al. Heterogeneous co-simulation of networked embedded systems. In Proc. IEEE Design Automation and Test in Europe Conf. (DATE), pages 168--173, Feb. 2004.

Digital Library

Google Scholar

[7]

T. Grotker, S. Liao, G. Martin, and S. Swan. System Design with SystemC. Springer, 2002.

Digital Library

Google Scholar

[8]

S. McCanne and S. Floyd. NS Network Simulator - version 2. URL: http://www.isi.edu/nsnam/ns.

Google Scholar

[9]

S. Pasricha, N. Dutt, and M. Ben-Romdhane. Extending the Transaction Level Modeling approach for fast communication architecture exploration. In Proc. ACM Design and Automation Conf. (DAC), pages 113--118, 2004.

Digital Library

Google Scholar

[10]

A. Rose, S. Swan, J. Pierce, and J.-M. Fernandez. Transaction Level Modeling in SystemC. Technical report, Cadence Design Systems, Inc, 2004.

Google Scholar

[11]

H. Schulzrinne, S. Casner, R. Frederick, and V. Jacobson. RTP: A Transport Protocol for Real-Time Applications. RFC 3550, July 2003.

Digital Library

Google Scholar

[12]

H. Zhu and I. Chlamtac. Performance analysis for IEEE 802.11e EDCF service differentiation. IEEE Transactions on Wireless Communications, 4(4):1779--1788, July 2005.

Digital Library

Google Scholar

Cited By

View all

Mozumdar MSong ZLavagno LSangiovanni-Vincentelli A(2014)A Model-Based Approach for Bridging Virtual and Physical Sensor Nodes in a Hybrid Simulation FrameworkSensors10.3390/s14061107014:6(11070-11096)Online publication date: 23-Jun-2014
https://doi.org/10.3390/s140611070
Zhang ZKoutsoukos X(2013)Modeling Time-Triggered Ethernet in SystemC/TLM for Virtual Prototyping of Cyber-Physical SystemsEmbedded Systems: Design, Analysis and Verification10.1007/978-3-642-38853-8_29(318-330)Online publication date: 2013
https://doi.org/10.1007/978-3-642-38853-8_29
Song ZMostafizur MMozumdar RTranchero MLavagno LTomasi ROlivieri SPerrone LStea GLiu JUhrmacher AVillén-Altamirano M(2010)Hy-SimProceedings of the 3rd International ICST Conference on Simulation Tools and Techniques10.4108/ICST.SIMUTOOLS2010.8662(1-8)Online publication date: 15-Mar-2010
https://dl.acm.org/doi/10.4108/ICST.SIMUTOOLS2010.8662
Show More Cited By

Index Terms

TLM/network design space exploration for networked embedded systems

Recommendations

System/network design-space exploration based on TLM for networked embedded systems

This article presents a methodology for the design of Networked Embedded Systems (NESs), which extends Transaction Level Modeling (TLM) to perform system/network design-space exploration. As a result, a new design dimension is added to the traditional ...
A framework for design space exploration and performance analysis of networked embedded systems
RAPIDO '14: Proceedings of the 6th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools

The design of the network in distributed embedded systems often necessitates the analysis of its HW/SW tradeoffs along with network tradeoffs. To do so, a framework is presented to perform joint exploration of both HW/SW and network (NW) design spaces. ...
Mutation analysis for SystemC designs at TLM
LATW '11: Proceedings of the 2011 12th Latin American Test Workshop

Mutation analysis has been borrowed from the software testing domain as a technique for evaluating the quality of testbenches in validating digital systems. This paper presents a new method for applying mutation analysis on SystemC hardware designs at ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

CODES+ISSS '06: Proceedings of the 4th international conference on Hardware/software codesign and system synthesis

October 2006

328 pages

ISBN:1595933700

DOI:10.1145/1176254

General Chair:
Reinaldo Bergamaschi
IBM T. J. Watson Research Center, USA
,
Program Chair:
Kiyoung Choi
Seoul National University, Korea

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 22 October 2006

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Article

Conference

ESWEEK06

Sponsor:

ESWEEK06: Second Embedded Systems Week 2006

October 22 - 25, 2006

Seoul, Korea

Acceptance Rates

Overall Acceptance Rate 280 of 864 submissions, 32%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

10
Total Citations
View Citations
349
Total Downloads

Downloads (Last 12 months)3
Downloads (Last 6 weeks)0

Reflects downloads up to 13 Nov 2024

Other Metrics

View Author Metrics

Citations

Cited By

View all

Mozumdar MSong ZLavagno LSangiovanni-Vincentelli A(2014)A Model-Based Approach for Bridging Virtual and Physical Sensor Nodes in a Hybrid Simulation FrameworkSensors10.3390/s14061107014:6(11070-11096)Online publication date: 23-Jun-2014
https://doi.org/10.3390/s140611070
Zhang ZKoutsoukos X(2013)Modeling Time-Triggered Ethernet in SystemC/TLM for Virtual Prototyping of Cyber-Physical SystemsEmbedded Systems: Design, Analysis and Verification10.1007/978-3-642-38853-8_29(318-330)Online publication date: 2013
https://doi.org/10.1007/978-3-642-38853-8_29
Song ZMostafizur MMozumdar RTranchero MLavagno LTomasi ROlivieri SPerrone LStea GLiu JUhrmacher AVillén-Altamirano M(2010)Hy-SimProceedings of the 3rd International ICST Conference on Simulation Tools and Techniques10.4108/ICST.SIMUTOOLS2010.8662(1-8)Online publication date: 15-Mar-2010
https://dl.acm.org/doi/10.4108/ICST.SIMUTOOLS2010.8662
Bombieri NFummi FQuaglia D(2010)System/network design-space exploration based on TLM for networked embedded systemsACM Transactions on Embedded Computing Systems (TECS)10.1145/1721695.17217039:4(1-32)Online publication date: 6-Apr-2010
https://dl.acm.org/doi/10.1145/1721695.1721703
Hoffmann OSchaefer FKays RSauer CLoeb H(2010)Prioritized medium access in ad-hoc networks with a SystemClick model of the IEEE 802.11n MAC21st Annual IEEE International Symposium on Personal, Indoor and Mobile Radio Communications10.1109/PIMRC.2010.5671829(2805-2810)Online publication date: Sep-2010
https://doi.org/10.1109/PIMRC.2010.5671829
Lukasiewycz MStreubühr MGlaß MHaubelt CTeich JBenini LDe Micheli GAl-Hashimi BMueller W(2009)Combined system synthesis and communication architecture exploration for MPSoCsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874737(472-477)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874737
Lukasiewycz MStreubuhr MGlass MHaubelt CTeich J(2009)Combined system synthesis and communication architecture exploration for MPSoCs2009 Design, Automation & Test in Europe Conference & Exhibition10.1109/DATE.2009.5090711(472-477)Online publication date: Apr-2009
https://doi.org/10.1109/DATE.2009.5090711
Banerjee AGerstlauer A(2009)Transaction Level Modeling of Best-Effort Channels for Networked Embedded DevicesAnalysis, Architectures and Modelling of Embedded Systems10.1007/978-3-642-04284-3_8(77-88)Online publication date: 2009
https://doi.org/10.1007/978-3-642-04284-3_8
Stefanni FQuaglia DFummi F(2009)SystemC Simulation of Networked Embedded SystemsLanguages for Embedded Systems and their Applications10.1007/978-1-4020-9714-0_13(201-211)Online publication date: 2009
https://doi.org/10.1007/978-1-4020-9714-0_13
Fummi FQuaglia DStefanni F(2008)A SystemC-based framework for modeling and simulation of networked embedded systems2008 Forum on Specification, Verification and Design Languages10.1109/FDL.2008.4641420(49-54)Online publication date: Sep-2008
https://doi.org/10.1109/FDL.2008.4641420

View Options

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

System/network design-space exploration based on TLM for networked embedded systems

A framework for design space exploration and performance analysis of networked embedded systems

Mutation analysis for SystemC designs at TLM