article

Unbounded page-based transactional memory

Authors:

Satish Narayanasamy,

Ganesh Venkatesh,

Michael Van Biesbrouck,

Osvaldo ColavinAuthors Info & Claims

ACM SIGPLAN Notices, Volume 41, Issue 11

Pages 347 - 358

https://doi.org/10.1145/1168918.1168901

Published: 20 October 2006 Publication History

Abstract

Exploiting thread level parallelism is paramount in the multicore era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded programming model. Virtualized transactions (unbounded in space and time) are desirable, as they can increase the scope of transactions' use, and thereby further simplify a programmer's job. However, hardware support is essential to support efficient execution of unbounded transactions. In this paper, we introduce Page-based Transactional Memory to support unbounded transactions. We combine transaction bookkeeping with the virtual memory system to support fast transaction conflict detection, commit, abort, and to maintain transactions' speculative data.

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Cited By

Ni YZhao JLitz HBittman DMiller E(2019)SSPProceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3352460.3358326(836-848)Online publication date: 12-Oct-2019
https://dl.acm.org/doi/10.1145/3352460.3358326
Litz HBraun BCheriton DZaks AMendelson BRauchwerger LHwu W(2016)EXCITE-VMProceedings of the 2016 International Conference on Parallel Architectures and Compilation10.1145/2967938.2967955(401-412)Online publication date: 11-Sep-2016
https://dl.acm.org/doi/10.1145/2967938.2967955
Litz HCheriton DFiroozshahian AAzizi OStevenson J(2014)SI-TMACM SIGARCH Computer Architecture News10.1145/2654822.254195242:1(383-398)Online publication date: 24-Feb-2014
https://dl.acm.org/doi/10.1145/2654822.2541952
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Index Terms

Unbounded page-based transactional memory
1. Computer systems organization
  1. Architectures
    1. Parallel architectures

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Unbounded page-based transactional memory
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Exploiting thread level parallelism is paramount in the multicore era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded programming model. Virtualized transactions (unbounded in space and time) are ...
Unbounded page-based transactional memory
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Exploiting thread level parallelism is paramount in the multicore era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded programming model. Virtualized transactions (unbounded in space and time) are ...

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Information & Contributors

Information

Published In

cover image ACM SIGPLAN Notices

ACM SIGPLAN Notices Volume 41, Issue 11

Proceedings of the 2006 ASPLOS Conference

November 2006

425 pages

ISSN:0362-1340

EISSN:1558-1160

DOI:10.1145/1168918

Issue’s Table of Contents

ASPLOS XII: Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
October 2006
440 pages
ISBN:1595934510
DOI:10.1145/1168857
General Chair:
John Paul Shen
Intel Corp.
,
Program Chair:
Margaret R. Martonosi
Princeton University

Copyright © 2006 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 20 October 2006

Published in SIGPLAN Volume 41, Issue 11

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Cited By

Ni YZhao JLitz HBittman DMiller E(2019)SSPProceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3352460.3358326(836-848)Online publication date: 12-Oct-2019
https://dl.acm.org/doi/10.1145/3352460.3358326
Litz HBraun BCheriton DZaks AMendelson BRauchwerger LHwu W(2016)EXCITE-VMProceedings of the 2016 International Conference on Parallel Architectures and Compilation10.1145/2967938.2967955(401-412)Online publication date: 11-Sep-2016
https://dl.acm.org/doi/10.1145/2967938.2967955
Litz HCheriton DFiroozshahian AAzizi OStevenson J(2014)SI-TMACM SIGARCH Computer Architecture News10.1145/2654822.254195242:1(383-398)Online publication date: 24-Feb-2014
https://dl.acm.org/doi/10.1145/2654822.2541952
Litz HCheriton DFiroozshahian AAzizi OStevenson J(2014)SI-TMACM SIGPLAN Notices10.1145/2644865.254195249:4(383-398)Online publication date: 24-Feb-2014
https://dl.acm.org/doi/10.1145/2644865.2541952
Litz HCheriton DFiroozshahian AAzizi OStevenson JBalasubramonian RDavis AAdve S(2014)SI-TMProceedings of the 19th international conference on Architectural support for programming languages and operating systems10.1145/2541940.2541952(383-398)Online publication date: 24-Feb-2014
https://dl.acm.org/doi/10.1145/2541940.2541952
Scott M(2013)Shared-Memory SynchronizationSynthesis Lectures on Computer Architecture10.2200/S00499ED1V01Y201304CAC0238:2(1-221)Online publication date: 12-Jun-2013
https://doi.org/10.2200/S00499ED1V01Y201304CAC023
Kestor GKarakostas VUnsal OCristal AHur IValero MKounev SCortellessa VMirandola RLilja DSachs K(2011)RMS-TM: a comprehensive benchmark suite for transactional memory systemsProceedings of the 2nd ACM/SPEC International Conference on Performance engineering10.1145/1958746.1958795(335-346)Online publication date: 14-Mar-2011
https://dl.acm.org/doi/10.1145/1958746.1958795
Jafri SThottethodi MVijaykumar T(2010)LiteTM: Reducing transactional state overheadHPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture10.1109/HPCA.2010.5416653(1-12)Online publication date: Jan-2010
https://doi.org/10.1109/HPCA.2010.5416653
Wang Huayong Hou Rui Wang Kun (2008)Hardware transactional memory system for parallel programming2008 13th Asia-Pacific Computer Systems Architecture Conference10.1109/APCSAC.2008.4625429(1-7)Online publication date: Aug-2008
https://doi.org/10.1109/APCSAC.2008.4625429
Rossbach CHofmann OPorter DRamadan HAditya BWitchel E(2007)TxLinuxACM SIGOPS Operating Systems Review10.1145/1323293.129427141:6(87-102)Online publication date: 14-Oct-2007
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