article

Applying architectural vulnerability Analysis to hard faults in the microprocessor

Authors:

Sule OzevAuthors Info & Claims

ACM SIGMETRICS Performance Evaluation Review, Volume 34, Issue 1

Pages 375 - 376

https://doi.org/10.1145/1140103.1140327

Published: 26 June 2006 Publication History

Get Access

Abstract

In this paper, we present a new metric, Hard-Fault Architectural Vulnerability Factor (H-AVF), to allow designers to more effectively compare alternate hard-fault tolerance schemes. In order to provide intuition on the use of H-AVF as a metric, we evaluate fault-tolerant level-1 data cache and register file implementations using error correcting codes and a fault-tolerant adder using triple-modular redundancy (TMR). For each of the designs, we compute its H-AVF. We then use these H-AVF values in conjunction with other properties of the design, such as die area and power consumption, to provide composite metrics. The derived metrics provide simple, quantitative measures of the cost-effectiveness of the evaluated designs.

References

[1]

T. Austin, E. Larson, and D. Ernst. SimpleScalar: An Infrastructure for Computer System Modeling. IEEE Computer, 35(2):59-67, Feb. 2002.

Digital Library

Google Scholar

[2]

S. S. Mukherjee, C. Weaver, J. Emer, S. K. Reinhardt, and T. Austin. A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor. In Proceedings of the 36th Annual IEEE/ACM International Symposium on Microarchitecture, Dec. 2003.

Digital Library

Google Scholar

[3]

T. Sherwood, E. Perelman, G. Hamerly, and B. Calder. Automatically Characterizing Large Scale Program Behavior. In Proceedings of the Tenth International Conference on Architectural Support for Programming Languages and Operating Systems, Oct. 2002.

Digital Library

Google Scholar

Cited By

View all

Li XYan GLiu CLi XYan GLiu C(2023)Fault-Tolerant General Purposed ProcessorsBuilt-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design10.1007/978-981-19-8551-5_3(117-168)Online publication date: 2-Mar-2023
https://doi.org/10.1007/978-981-19-8551-5_3
Chatzidimitriou AGizopoulos D(2016)Anatomy of microarchitecture-level reliability assessment: Throughput and accuracy2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS.2016.7482075(69-78)Online publication date: Apr-2016
https://doi.org/10.1109/ISPASS.2016.7482075
Kaliorakis MTselonis SChatzidimitriou AFoutris NGizopoulos D(2015)Differential Fault Injection on Microarchitectural SimulatorsProceedings of the 2015 IEEE International Symposium on Workload Characterization10.1109/IISWC.2015.28(172-182)Online publication date: 4-Oct-2015
https://dl.acm.org/doi/10.1109/IISWC.2015.28
Show More Cited By

Index Terms

Applying architectural vulnerability Analysis to hard faults in the microprocessor
1. Computer systems organization
  1. Architectures
2. Hardware
  1. Hardware test
  2. Robustness

Recommendations

Applying architectural vulnerability Analysis to hard faults in the microprocessor
SIGMETRICS '06/Performance '06: Proceedings of the joint international conference on Measurement and modeling of computer systems

In this paper, we present a new metric, Hard-Fault Architectural Vulnerability Factor (H-AVF), to allow designers to more effectively compare alternate hard-fault tolerance schemes. In order to provide intuition on the use of H-AVF as a metric, we ...
Reliability Analysis of N-Modular Redundancy Systems with Intermittent and Permanent Faults

It is well known that static redundancy techniques are very efficient against intermittent (transient) faults which constitute a large portion of logic faults in digital systems. However, very little theoretical work has been done in evaluating the ...
Calculating Architectural Vulnerability Factors for Spatial Multi-bit Transient Faults
MICRO-47: Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture

Reliability is an important design constraint in modern microprocessors, and one of the fundamental reliability challenges is combating the effects of transient faults. This requires extensive analysis, including significant fault modelling allow ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

ACM SIGMETRICS Performance Evaluation Review Volume 34, Issue 1

Performance evaluation review

June 2006

388 pages

ISSN:0163-5999

DOI:10.1145/1140103

Issue’s Table of Contents

SIGMETRICS '06/Performance '06: Proceedings of the joint international conference on Measurement and modeling of computer systems
June 2006
404 pages
ISBN:1595933190
DOI:10.1145/1140277
General Chair:
Raymond Marie
University of Rennes 1/IRISA, France
,
Program Chairs:
Peter Key
Microsoft Research, Cambridge, U.K.
,
Evgenia Smirni
College of William and Mary, USA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 26 June 2006

Published in SIGMETRICS Volume 34, Issue 1

Check for updates

Author Tags

Qualifiers

Article

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

8
Total Citations
View Citations
219
Total Downloads

Downloads (Last 12 months)3
Downloads (Last 6 weeks)0

Reflects downloads up to 22 Nov 2024

Other Metrics

View Author Metrics

Citations

Cited By

View all

Li XYan GLiu CLi XYan GLiu C(2023)Fault-Tolerant General Purposed ProcessorsBuilt-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design10.1007/978-981-19-8551-5_3(117-168)Online publication date: 2-Mar-2023
https://doi.org/10.1007/978-981-19-8551-5_3
Chatzidimitriou AGizopoulos D(2016)Anatomy of microarchitecture-level reliability assessment: Throughput and accuracy2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS.2016.7482075(69-78)Online publication date: Apr-2016
https://doi.org/10.1109/ISPASS.2016.7482075
Kaliorakis MTselonis SChatzidimitriou AFoutris NGizopoulos D(2015)Differential Fault Injection on Microarchitectural SimulatorsProceedings of the 2015 IEEE International Symposium on Workload Characterization10.1109/IISWC.2015.28(172-182)Online publication date: 4-Oct-2015
https://dl.acm.org/doi/10.1109/IISWC.2015.28
Chatzidimitriou APapadimitriou GGavanas CKatsoridas GGizopoulos D(2019)Multi-Bit Upsets Vulnerability Analysis of Modern Microprocessors2019 IEEE International Symposium on Workload Characterization (IISWC)10.1109/IISWC47752.2019.9042036(119-130)Online publication date: Nov-2019
https://doi.org/10.1109/IISWC47752.2019.9042036
Wang YHan YLi HLi X(2016)VANUCAIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2015.242444024:3(858-870)Online publication date: 1-Mar-2016
https://dl.acm.org/doi/10.1109/TVLSI.2015.2424440
Pan SHu YLi X(2012)IVFIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2011.213411520:5(777-790)Online publication date: 1-May-2012
https://dl.acm.org/doi/10.1109/TVLSI.2011.2134115
Idirin MAizpurua XVillaro ALegarda JMelendez J(2011)Implementation Details and Safety Analysis of a Microcontroller-based SIL-4 Software VoterIEEE Transactions on Industrial Electronics10.1109/TIE.2010.206247158:3(822-829)Online publication date: Mar-2011
https://doi.org/10.1109/TIE.2010.2062471
Pan SHu YLi XDe Micheli GAl-Hashimi BMueller WMacii E(2010)IVFProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1870983(238-243)Online publication date: 8-Mar-2010
https://dl.acm.org/doi/10.5555/1870926.1870983

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

Applying architectural vulnerability Analysis to hard faults in the microprocessor

Reliability Analysis of N-Modular Redundancy Systems with Intermittent and Permanent Faults

Calculating Architectural Vulnerability Factors for Spatial Multi-bit Transient Faults