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Design of instruction set architectures for support of high-level languages

Authors:

Edward S. DavidsonAuthors Info & Claims

ISCA '84: Proceedings of the 11th annual international symposium on Computer architecture

Pages 198 - 206

https://doi.org/10.1145/800015.808183

Published: 01 January 1984 Publication History

Abstract

Conventional instruction sets or directly interpretable languages (DILs) have not been designed with high-level languages (HLLs) in mind. The modern design problem is to derive a space-time efficient DIL for a HLL processing system. In this paper, we present our approach to the problem of designing well-matched, space-time efficient DILs. A systematic, syntax- and semantics-directed DIL design methodology is presented. It calls for an incremental transformation of the source HLL, until a suitable target DIL is obtained. At the heart of the methodology is a canonic set of language transformations. An experimental study, involving several systematically derived DILs is carried out in order to characterize the relative merits and disadvantages of various sequences of transformations. Various space, time and interpretability trade-offs implied by the transformations are studied.

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Cited By

Huang IDespain A(2006)Synthesis of application specific instruction setsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.38772814:6(663-675)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.387728
Clark NZhong HMahlke S(2005)Automated Custom Instruction Generation for Domain-Specific Processor AccelerationIEEE Transactions on Computers10.1109/TC.2005.15654:10(1258-1270)Online publication date: 1-Oct-2005
https://dl.acm.org/doi/10.1109/TC.2005.156
Hartenstein RBecker JKress R(2005)Costum computing machines vs. Hardware/Software Co-Design: From a globalized point of viewField-Programmable Logic Smart Applications, New Paradigms and Compilers10.1007/3-540-61730-2_7(65-76)Online publication date: 6-Jun-2005
https://doi.org/10.1007/3-540-61730-2_7
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Index Terms

Design of instruction set architectures for support of high-level languages
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Very long instruction word
    2. Serial architectures
      1. Complex instruction set computing
      2. Reduced instruction set computing
2. Software and its engineering
  1. Software notations and tools
    1. General programming languages
      1. Language types
        Very high level languages

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Published In

cover image ACM Conferences

ISCA '84: Proceedings of the 11th annual international symposium on Computer architecture

January 1984

373 pages

ISBN:0818605383

DOI:10.1145/800015

Chairman:
Dharma P. Agrawal

ACM SIGARCH Computer Architecture News Volume 12, Issue 3
June 1984
348 pages
ISSN:0163-5964
DOI:10.1145/773453
Issue’s Table of Contents

Copyright © 1984 Authors.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 January 1984

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Cited By

Huang IDespain A(2006)Synthesis of application specific instruction setsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.38772814:6(663-675)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.387728
Clark NZhong HMahlke S(2005)Automated Custom Instruction Generation for Domain-Specific Processor AccelerationIEEE Transactions on Computers10.1109/TC.2005.15654:10(1258-1270)Online publication date: 1-Oct-2005
https://dl.acm.org/doi/10.1109/TC.2005.156
Hartenstein RBecker JKress R(2005)Costum computing machines vs. Hardware/Software Co-Design: From a globalized point of viewField-Programmable Logic Smart Applications, New Paradigms and Compilers10.1007/3-540-61730-2_7(65-76)Online publication date: 6-Jun-2005
https://doi.org/10.1007/3-540-61730-2_7
Clark NZhong HMahlke S(2003)Processor Acceleration Through Automated Instruction Set CustomizationProceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture10.5555/956417.956538Online publication date: 3-Dec-2003
https://dl.acm.org/doi/10.5555/956417.956538
Huang IDespain ALorenzetti M(1994)Synthesis of instruction sets for pipelined microprocessorsProceedings of the 31st annual Design Automation Conference10.1145/196244.196250(5-11)Online publication date: 6-Jun-1994
https://dl.acm.org/doi/10.1145/196244.196250
Holmer BDespain AMalaiya Y(1991)Viewing instruction set design as an optimization problemProceedings of the 24th annual international symposium on Microarchitecture10.1145/123465.123497(153-162)Online publication date: 1-Sep-1991
https://dl.acm.org/doi/10.1145/123465.123497
Pittman T(1987)Two-level hybrid interpreter/native code execution for combined space-time program efficiencyACM SIGPLAN Notices10.1145/960114.2966622:7(150-152)Online publication date: 1-Jul-1987
https://dl.acm.org/doi/10.1145/960114.29666
Pittman T(1987)Two-level hybrid interpreter/native code execution for combined space-time program efficiencyPapers of the Symposium on Interpreters and interpretive techniques10.1145/29650.29666(150-152)Online publication date: 1-Jul-1987
https://dl.acm.org/doi/10.1145/29650.29666
Bose PWinkler SStone H(1986)Optimal code generation for expressions on super scalar machinesProceedings of 1986 ACM Fall joint computer conference10.5555/324493.324588(372-379)Online publication date: 2-Nov-1986
https://dl.acm.org/doi/10.5555/324493.324588
Silbey AMilutinovic VGrado M(1986)A Survey of Advanced Microprocessors and HLL Computer ArchitecturesComputer10.1109/MC.1986.166331019:8(72-85)Online publication date: 1-Aug-1986
https://dl.acm.org/doi/10.1109/MC.1986.1663310
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