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Synthesis of instruction sets for pipelined microprocessors

Authors:

Ing-Jer Huang,

Alvin M. DespainAuthors Info & Claims

DAC '94: Proceedings of the 31st annual Design Automation Conference

Pages 5 - 11

https://doi.org/10.1145/196244.196250

Published: 06 June 1994 Publication History

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References

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Cited By

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Galuzzi CBertels K(2011)The Instruction-Set Extension ProblemACM Transactions on Reconfigurable Technology and Systems10.1145/1968502.19685094:2(1-28)Online publication date: 1-May-2011
https://dl.acm.org/doi/10.1145/1968502.1968509
Jówiak LNedjah NFigueroa M(2010)Modern development methods and tools for embedded reconfigurable systemsIntegration, the VLSI Journal10.1016/j.vlsi.2009.06.00243:1(1-33)Online publication date: 1-Jan-2010
https://dl.acm.org/doi/10.1016/j.vlsi.2009.06.002
Reddington JGutin GJohnstone AScott EYeo A(2009)Better Than OptimalProceedings of the 2009 International Conference on Computational Science and Engineering - Volume 0210.1109/CSE.2009.167(17-24)Online publication date: 29-Aug-2009
https://dl.acm.org/doi/10.1109/CSE.2009.167
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Index Terms

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Retargetable instruction scheduling for pipelined processors

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Published In

DAC '94: Proceedings of the 31st annual Design Automation Conference

June 1994

739 pages

ISBN:0897916530

DOI:10.1145/196244

Chairman:
Michael Lorenzetti
Mentor Graphics Corp., Wilsonville, OR

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 06 June 1994

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DAC94

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EDAC
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DAC94: The 31st ACM/IEEE-CAS/EDAC Design Automation Conference

June 6 - 10, 1994

California, San Diego, USA

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DAC '94 Paper Acceptance Rate 100 of 260 submissions, 38%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all

Galuzzi CBertels K(2011)The Instruction-Set Extension ProblemACM Transactions on Reconfigurable Technology and Systems10.1145/1968502.19685094:2(1-28)Online publication date: 1-May-2011
https://dl.acm.org/doi/10.1145/1968502.1968509
Jówiak LNedjah NFigueroa M(2010)Modern development methods and tools for embedded reconfigurable systemsIntegration, the VLSI Journal10.1016/j.vlsi.2009.06.00243:1(1-33)Online publication date: 1-Jan-2010
https://dl.acm.org/doi/10.1016/j.vlsi.2009.06.002
Reddington JGutin GJohnstone AScott EYeo A(2009)Better Than OptimalProceedings of the 2009 International Conference on Computational Science and Engineering - Volume 0210.1109/CSE.2009.167(17-24)Online publication date: 29-Aug-2009
https://dl.acm.org/doi/10.1109/CSE.2009.167
Galuzzi CBertels K(2008)The Instruction-Set Extension ProblemProceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications10.1007/978-3-540-78610-8_21(209-220)Online publication date: 26-Mar-2008
https://dl.acm.org/doi/10.1007/978-3-540-78610-8_21
Med MKrall A(2007)Instruction Set Encoding Optimization for Code Size Reduction2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation10.1109/ICSAMOS.2007.4285728(9-17)Online publication date: Jul-2007
https://doi.org/10.1109/ICSAMOS.2007.4285728
Boulytchev D(2007)BURS-Based Instruction Set SelectionPerspectives of Systems Informatics10.1007/978-3-540-70881-0_37(431-437)Online publication date: 2007
https://doi.org/10.1007/978-3-540-70881-0_37
Boulytchev D(2006)BURS-based instruction set selectionProceedings of the 6th international Andrei Ershov memorial conference on Perspectives of systems informatics10.5555/1760700.1760740(431-437)Online publication date: 27-Jun-2006
https://dl.acm.org/doi/10.5555/1760700.1760740
Sun FRavi SRaghunathan AJha N(2006)Custom-instruction synthesis for extensible-processor platformsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2003.82213323:2(216-228)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/TCAD.2003.822133
Huang IDespain A(2006)Synthesis of application specific instruction setsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.38772814:6(663-675)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.387728
Tomono NKohara SUchida JMiyaoka YTogawa NYanagisawa MOhtsuki TTang T(2005)A processor core synthesis system in IP-based SoC designProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1120851(286-291)Online publication date: 18-Jan-2005
https://dl.acm.org/doi/10.1145/1120725.1120851
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Reducing the penalty of branch and load hazards in pipelined microprocessors

16-bit vs. 32-bit instructions for pipelined microprocessors

Retargetable instruction scheduling for pipelined processors