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Fabien Clermidy
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2020 – today
- 2023
- [j12]Ivan Miro-Panades, Benoît Tain
, Jean-Frédéric Christmann
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. IEEE J. Solid State Circuits 58(6): 1782-1797 (2023) - [i1]Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. CoRR abs/2304.13726 (2023) - 2021
- [j11]Pascal Vivet
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management. IEEE J. Solid State Circuits 56(1): 79-97 (2021) - 2020
- [c84]Pascal Vivet
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters. ISSCC 2020: 46-48 - [c83]Ivan Miro Panades, Benoît Tain
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [c82]Pascal Vivet
Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. DATE 2019: 674-679 - 2017
- [j10]Pascal Vivet
A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. IEEE J. Solid State Circuits 52(1): 33-49 (2017) - [j9]Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank Kagan Gürkaynak, Adam Teman
Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster. IEEE Micro 37(5): 20-31 (2017) - [j8]Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Clermidy:
Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits. Microelectron. J. 60: 109-118 (2017) - 2016
- [c81]Davide Rossi
193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing. COOL Chips 2016: 1-3 - [c80]Thiago Raupp da Rosa, Thomas Mesquida, Romain Lemaire, Fabien Clermidy:
MCAPI-compliant Hardware Buffer Manager mechanism to support communication in multi-core architectures. DATE 2016: 1006-1011 - [c79]Melanie Brocard, Guillaume Berhault, Sébastien Thuries, Fabien Clermidy, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, François Andrieu, Fabien Deprat, Joris Lacord, Olivier Rozeau, Gerald Cibrario, Olivier Billoint:
Impact of intermediate BEOL technology on standard cell performances of 3D VLSI. ESSDERC 2016: 218-221 - [c78]Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Guillaume Berhault, Cristiano Lopes Dos Santos, Gerald Cibrario, Fabien Clermidy, Daniel Gitlin, Olivier Faynot:
Opportunities brought by sequential 3D CoolCube™ integration. ESSDERC 2016: 226-229 - [c77]Pascal Vivet
8.1 A 4×4×2 homogeneous scalable 3D network-on-chip circuit with 326MFlit/s 0.66pJ/b robust and fault-tolerant asynchronous 3D links. ISSCC 2016: 146-147 - [c76]Yves Durand, Christian Bernard, Fabien Clermidy:
Distributed Dynamic Rate Adaptation on a Network on Chip with Traffic Distortion. MCSoC 2016: 225-232 - 2015
- [c75]Pascal Vivet, Christian Bernard, Fabien Clermidy, Denis Dutoit, Eric Guthmuller
3D advanced integration technology for heterogeneous systems. 3DIC 2015: FS6.1-FS6.3 - [c74]Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Deprat, Alexandre Ayres De Sousa, Perrine Batude, Claire Fenouillet-Béranger, Fabien Clermidy:
Intermediate BEOL process influence on power and performance for 3DVLSI. 3DIC 2015: TS1.3.1-TS1.3.5 - [c73]Olivier Billoint, Hossam Sarhan, Iyad Rayane, Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Olivier Rozeau, Gerald Cibrario, Fabien Deprat, A. Fustier, Julien Michallet, Olivier Faynot, Ogun Turkyilmaz, Jean-Frédéric Christmann, Sébastien Thuries, Fabien Clermidy:
A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool. DATE 2015: 1192-1196 - [c72]Thiago Raupp da Rosa, Romain Lemaire, Fabien Clermidy:
A Co-design Approach for Hardware Optimizations in Multicore Architectures Using MCAPI. INA-OCMC@HiPEAC 2015: 17-20 - [c71]Edith Beigné
Fine-grain DVFS and AVFS techniques for complex SoC design: An overview of architectural solutions through technology nodes. ISCAS 2015: 1550-1553 - [c70]Barbara De Salvo, Elisa Vianello, Olivier Thomas, Fabien Clermidy, Olivier Bichler, Christian Gamrat, Luca Perniola:
Emerging resistive memories for low power embedded applications and neuromorphic systems. ISCAS 2015: 3088-3091 - [c69]Olivier Billoint, Hossam Sarhan, Iyad Rayane, Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Olivier Rozeau, Gerald Cibrario, Fabien Deprat, Ogun Turkyilmaz, Sébastien Thuries, Fabien Clermidy:
From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges. ISPD 2015: 127 - [c68]Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Clermidy:
An Unbalanced Area Ratio Study for High Performance Monolithic 3D Integrated Circuits. ISVLSI 2015: 350-355 - [c67]Pascal Vivet, Christian Bernard, Eric Guthmuller
Interconnect Challenges for 3D Multi-cores: From 3D Network-on-Chip to Cache Interconnects. ISVLSI 2015: 615-620 - [c66]Bartosz Boguslawski, Hossam Sarhan, Frédéric Heitzmann, Fabrice Seguin, Sébastien Thuries, Olivier Billoint, Fabien Clermidy:
Compact interconnect approach for networks of neural cliques using 3D technology. VLSI-SoC 2015: 116-121 - 2014
- [j7]Ogun Turkyilmaz, Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Hraziia, Costin Anghel, Jean-Michel Portal, Marc Bocquet:
RRAM-based FPGA for "Normally Off, Instantly On" applications. J. Parallel Distributed Comput. 74(6): 2441-2451 (2014) - [c65]Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Clermidy:
3DCoB: A new design approach for Monolithic 3D Integrated circuits. ASP-DAC 2014: 79-84 - [c64]Fabien Clermidy, Rodolphe Héliot, Alexandre Valentian, Christian Gamrat, Olivier Bichler, Marc Duranton, Bilel Belhadj, Olivier Temam:
Advanced technologies for brain-inspired computing. ASP-DAC 2014: 563-569 - [c63]Nasim Farahini, Ahmed Hemani, Anders Lansner, Fabien Clermidy, Christer Svensson:
A scalable custom simulation machine for the Bayesian Confidence Propagation Neural Network model of the brain. ASP-DAC 2014: 578-585 - [c62]Fabien Clermidy, Natalija Jovanovic, Santhosh Onkaraiah, Houcine Oucheikh, Olivier Thomas, Ogun Turkyilmaz, Elisa Vianello, Jean-Michel Portal, Marc Bocquet:
Resistive memories: Which applications? DATE 2014: 1-6 - [c61]Ogun Turkyilmaz, Gerald Cibrario, Olivier Rozeau, Perrine Batude, Fabien Clermidy:
3D FPGA using high-density interconnect Monolithic Integration. DATE 2014: 1-4 - [c60]Robin Wilson, Edith Beigné
27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking. ISSCC 2014: 452-453 - [c59]Fabien Clermidy, O. Turkyimaz, Olivier Billoint, Pierre-Emmanuel Gaillardon:
3D technologies for reconfigurable architectures. ReCoSoC 2014: 1-2 - 2013
- [j6]Imen Mansouri, Pascal Benoit, Lionel Torres, Fabien Clermidy:
Fine-Grain Dynamic Energy Tracking for System on Chip. IEEE Trans. Circuits Syst. II Express Briefs 60-II(6): 356-360 (2013) - [c58]Claude Helmstetter, Sylvain Basset, Romain Lemaire, Fabien Clermidy, Pascal Vivet
A dynamic stream link for efficient data flow control in NoC based heterogeneous MPSoC. ASP-DAC 2013: 41-46 - [c57]Santhosh Onkaraiah, Marc Belleville, Marina Reyboz, Fabien Clermidy, Elisa Vianello, Jean-Michel Portal, Christophe Muller:
A CBRAM-based compact interconnect switch for non-volatile reconfigurable logic circuits. ICICDT 2013: 81-84 - [c56]Fabien Clermidy, Denis Dutoit, Eric Guthmuller
3D stacking for multi-core architectures: From WIDEIO to distributed caches. ISCAS 2013: 537-540 - [c55]Ogun Turkyilmaz, Fabien Clermidy, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET. ISCAS 2013: 2127-2130 - [c54]Santhosh Onkaraiah, Ogun Turkyilmaz, Marina Reyboz, Fabien Clermidy, Elisa Vianello, Jean-Michel Portal, Christophe Muller:
A hybrid CBRAM/CMOS Look-Up-Table structure for improving performance efficiency of Field-Programmable-Gate-Array. ISCAS 2013: 2440-2443 - [c53]Romain Prolonge, Fabien Clermidy:
Network-on-chip traffic modeling for data flow applications. RAPIDO 2013: 2:1-2:6 - 2012
- [c52]Diego Melpignano, Luca Benini
Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications. DAC 2012: 1137-1142 - [c51]Marc Belleville, Olivier Thomas, Alexandre Valentian, Fabien Clermidy:
Design challenges for nano-scale devices. ESSDERC 2012: 69-72 - [c50]Ogun Turkyilmaz, Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Hraziia, Costin Anghel, Jean-Michel Portal, Marc Bocquet:
RRAM-based FPGA for "normally off, instantly on" applications. NANOARCH 2012: 101-108 - [c49]Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Jean-Michel Portal, Marc Bocquet, Christophe Muller
Bipolar ReRAM Based non-volatile flip-flops for low-power architectures. NEWCAS 2012: 417-420 - 2011
- [j5]Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor
Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method. ACM J. Emerg. Technol. Comput. Syst. 7(1): 3:1-3:23 (2011) - [c48]Benny Akesson
Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends. CODES+ISSS 2011: 3-12 - [c47]Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Paul-Henry Morel, Jean-Philippe Noël, Fabien Clermidy, Ian O'Connor
Can we go towards true 3-D architectures? DAC 2011: 282-283 - [c46]Christian Bernard, Fabien Clermidy:
A low-power VLIW processor for 3GPP-LTE complex numbers processing. DATE 2011: 234-239 - [c45]Pallavi Reddy, Fabien Clermidy, Amer Baghdadi, Michel Jézéquel:
A low complexity stopping criterion for reducing power consumption in turbo decoders. DATE 2011: 649-654 - [c44]Fabien Clermidy, Florian Darve, Denis Dutoit, Walid Lafi, Pascal Vivet:
3D Embedded multi-core: Some perspectives. DATE 2011: 1327-1332 - [c43]Partha Pratim Pande, Fabien Clermidy, Diego Puschini, Imen Mansouri, Paul Bogdan, Radu Marculescu, Amlan Ganguly:
Sustainability through massively integrated computing: Are we ready to break the energy efficiency wall for single-chip platforms? DATE 2011: 1656-1661 - [c42]Romain Prolonge, Fabien Clermidy, Leonel Tedesco
Dynamic Flow Reconfiguration Strategy to Avoid Communication Hot-Spots. DSD 2011: 519-524 - [c41]Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy, Ian O'Connor
Evaluation of a crossbar multiplexer in a lithography-based nanowire technology. ISCAS 2011: 2930-2933 - [c40]Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy, Ian O'Connor
Ultra-fine grain FPGAs: A granularity study. NANOARCH 2011: 9-15 - [c39]Santhosh Onkaraiah, Pierre-Emmanuel Gaillardon, Marina Reyboz, Fabien Clermidy, Jean-Michel Portal, Marc Bocquet, Christophe Muller
Using OxRRAM memories for improving communications of reconfigurable FPGA architectures. NANOARCH 2011: 65-69 - [c38]Fabien Clermidy, Nicolas Cassiau, N. Coste, Denis Dutoit, M. Fantini, Dimitri Ktenas, Romain Lemaire, L. Stefanizzi:
Reconfiguration of a 3GPP-LTE telecommunication application on a 22-core NoC-based system-on-chip. NOCS 2011: 261-262 - [c37]Pascal Vivet
3D NoC using through silicon Via: An asynchronous implementation. VLSI-SoC 2011: 232-237 - [p1]Lionel Torres, Pascal Benoit, Gilles Sassatelli, Michel Robert, Fabien Clermidy, Diego Puschini:
An Introduction to Multi-Core System on Chip - Trends and Challenges. Multiprocessor System-on-Chip 2011: 1-21 - 2010
- [j4]Imen Mansouri, Pascal Benoit, Diego Puschini, Lionel Torres, Fabien Clermidy, Gilles Sassatelli:
Dynamic Energy Optimization in Network-on-Chip-Based System-on-Chips. J. Low Power Electron. 6(4): 564-577 (2010) - [c36]Etienne Faure, Gabriel Marchesan Almeida, Mounir Benabdenbi, Pascal Benoit, Fabien Clermidy, François Pêcheux, Gilles Sassatelli, Lionel Torres:
An in-memory monitoring database for self adaptive MP2SoCs. DASIP 2010: 97-104 - [c35]Yvain Thonnart, Pascal Vivet
A fully-asynchronous low-power framework for GALS NoC integration. DATE 2010: 33-38 - [c34]Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Marina Reyboz, Giovanni Beneventi
Phase-change-memory-based storage elements for configurable logic. FPT 2010: 17-20 - [c33]Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Giovanni Betti Beneventi
Emerging memory technologies for reconfigurable routing in FPGA architecture. ICECS 2010: 62-65 - [c32]Ian O'Connor
Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics. ICECS 2010: 66-69 - [c31]Fabien Clermidy, Christian Bernard, Romain Lemaire, Jérôme Martin
A 477mW NoC-based digital baseband for MIMO 4G SDR. ISSCC 2010: 278-279 - [c30]Pallavi Reddy, Fabien Clermidy, Rasheed Al Khayat, Amer Baghdadi
Power consumption analysis and energy efficient optimization for turbo decoder implementation. SoC 2010: 12-17 - [c29]Imen Mansouri, Camille Jalier, Fabien Clermidy, Pascal Benoit, Lionel Torres:
Implementation Analysis of a Dynamic Energy Management Approach Inspired by Game-Theory. ISVLSI 2010: 422-427 - [c28]Kotb Jabeur, David Navarro, Ian O'Connor
Reducing transistor count in clocked standard cells with ambipolar double-gate FETs. NANOARCH 2010: 47-52 - [c27]Yvain Thonnart
Distributed Sequencing for Resource Sharing in Multi-applicative Heterogeneous NoC Platforms. NOCS 2010: 233-240 - [c26]Leonel Tedesco
Implementation and evaluation of a congestion aware routing algorithm for networks-on-chip. SBCCI 2010: 91-96 - [c25]Imen Mansouri, Fabien Clermidy, Pascal Benoit, Lionel Torres:
A run-time distributed cooperative approach to optimize power consumption in MPSoCs. SoCC 2010: 25-30
2000 – 2009
- 2009
- [j3]Edith Beigné
An Asynchronous Power Aware and Adaptive NoC Based Circuit. IEEE J. Solid State Circuits 44(4): 1167-1177 (2009) - [c24]Leonel Tedesco
A monitoring and adaptive routing mechanism for QoS traffic on mesh NoC architectures. CODES+ISSS 2009: 109-118 - [c23]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Dynamic and distributed frequency assignment for energy and latency constrained MP-SoC. DATE 2009: 1564-1567 - [c22]Dominique Nussbaum, Karim Khalfallah, Christophe Moy
Open Platform for Prototyping of Advanced Software Defined Radio and Cognitive Radio Techniques. DSD 2009: 435-440 - [c21]Fabien Clermidy, Romain Lemaire, Xavier Popon, Dimitri Ktenas, Yvain Thonnart
An Open and Reconfigurable Platform for 4G Telecommunication: Concepts and Application. DSD 2009: 449-456 - [c20]Jérôme Martin
A Microprogrammable Memory Controller for high-performance dataflow applications. ESSCIRC 2009: 348-351 - [c19]Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor
Reconfigurable nanoscale logic cells : a comparison study. ICECS 2009: 483-486 - [c18]Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor
Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme. ICECS 2009: 888-891 - [c17]Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor
Interconnection scheme and associated mapping method of reconfigurable cell matrices based on nanoscale devices. NANOARCH 2009: 69-74 - [c16]Fabien Clermidy, Romain Lemaire, Yvain Thonnart
A Communication and configuration controller for NoC based reconfigurable data flow architecture. NOCS 2009: 153-162 - [c15]Leonel Tedesco
A path-load based adaptive routing algorithm for networks-on-chip. SBCCI 2009 - [c14]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Adaptive energy-aware latency-constrained DVFS policy for MPSoC. SoCC 2009: 89-92 - [c13]Ian O'Connor, Junchen Liu, Kotb Jabeur, Nataliya Yakymets, Renaud Daviot, David Navarro, Pierre-Emmanuel Gaillardon, Fabien Clermidy, Maimouna Amadou, Gabriela Nicolescu:
Emerging Technologies and Nanoscale Computing Fabrics. VLSI-SoC 2009: 1-20 - 2008
- [j2]Diego Puschini
A Game-Theoretic Approach for Run-Time Distributed Optimization on MP-SoC. Int. J. Reconfigurable Comput. 2008: 403086:1-403086:11 (2008) - [j1]Didier Lattard, Edith Beigné
A Reconfigurable Baseband Platform Based on an Asynchronous Network-on-Chip. IEEE J. Solid State Circuits 43(1): 223-235 (2008) - [c12]Edith Beigné
A fully integrated power supply unit for fine grain power management application to embedded Low Voltage SRAMs. ESSCIRC 2008: 138-141 - [c11]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Convergence analysis of run-time distributed optimization on adaptive systems using game theory. FPL 2008: 555-558 - [c10]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Temperature-Aware Distributed Run-Time Optimization on MP-SoC Using Game Theory. ISVLSI 2008: 375-380 - [c9]Edith Beigné, Fabien Clermidy, Sylvain Miermont, Pascal Vivet:
Dynamic Voltage and Frequency Scaling Architecture for Units Integration within a GALS NoC. NOCS 2008: 129-138 - [c8]Ivan Miro Panades, Fabien Clermidy, Pascal Vivet, Alain Greiner:
Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture. NOCS 2008: 139-148 - [c7]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Game-Theoretic Approach for Temperature-Aware Frequency Assignment with Task Synchronization on MP-SoC. ReConFig 2008: 235-240 - 2007
- [c6]Didier Lattard, Edith Beigné
A Telecom Baseband Circuit based on an Asynchronous Network-on-Chip. ISSCC 2007: 258-601 - 2006
- [c5]Antoine Jalabert, Fabien Clermidy, Amara Amara:
A Non-Volatile Multi-Level Memory Cell Using Molecular-Gated Nanowire Transistors. ICECS 2006: 1034-1037 - [c4]Diego Puschini, Fabien Clermidy:
A Comparison between NoC and Bus Architectures Based on a Real-Application. ReCoSoC 2006: 194-200 - 2005
- [c3]Edith Beigné
An Asynchronous NOC Architecture Providing Low Latency Service and Its Multi-Level Design Framework. ASYNC 2005: 54-63 - [c2]Romain Lemaire, Fabien Clermidy, Yves Durand, Didier Lattard, Ahmed Amine Jerraya:
Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2. IEEE International Workshop on Rapid System Prototyping 2005: 24-30
1990 – 1999
- 1999
- [c1]Fabien Clermidy, Thierry Collette, Michael Nicolaidis:
A New Placement Algorithm Dedicated to Parallel Computers: Bases and Application. PRDC 1999: 242-
Coauthor Index
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