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Stéphane Chevobbe
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2020 – today
- 2023
- [j6]Maria Lepecq
, Thomas Dalgaty
End-to-End Implementation of a Convolutional Neural Network on a 3D-Integrated Image Sensor with Macropixel Array. Sensors 23(4): 1909 (2023) - [i1]Quentin Picard
A survey on real-time 3D scene reconstruction with SLAM methods in embedded systems. CoRR abs/2309.05349 (2023) - 2022
- [c22]Quentin Picard
Work-in-Progress: Smart data reduction in SLAM methods for embedded systems. CASES 2022: 23-24 - [c21]Quentin Picard
Image Quantization Towards Data Reduction: Robustness Analysis for SLAM Methods On Embedded Platforms. ICIP 2022: 4158-4162
2010 – 2019
- 2019
- [j5]Laurent Millet
A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing. IEEE J. Solid State Circuits 54(4): 1096-1105 (2019) - [c20]Pascal Vivet
Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. DATE 2019: 674-679 - 2018
- [c19]Laurent Millet, Stéphane Chevobbe
A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing. VLSI Circuits 2018: 245-246 - 2015
- [c18]Pascal Cotret, Stéphane Chevobbe
Embedded wavelet-based face recognition under variable position. Real-Time Image and Video Processing 2015: 94000A - 2013
- [j4]Sébastien Courroux, Stéphane Chevobbe
Use of wavelet for image processing in smart cameras with low hardware resources. J. Syst. Archit. 59(10-A): 826-832 (2013) - [c17]Aziz Dziri, Stéphane Chevobbe
Gesture recognition on smart cameras. Sensors, Cameras, and Systems for Industrial and Scientific Applications 2013: 86590L - [c16]Celine Azar, Stéphane Chevobbe
SNet, a flexible, scalable network paradigm for manycore architectures. NOCS 2013: 1-2 - 2012
- [j3]Erwan Raffin
Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture. Int. J. Embed. Real Time Commun. Syst. 3(1): 1-30 (2012) - 2011
- [c15]Valentin Gherman, J. Massas, Samuel Evain, Stéphane Chevobbe
Error prediction based on concurrent self-test and reduced slack time. DATE 2011: 1626-1631 - [c14]Celine Azar, Stéphane Chevobbe
Dynamic routing strategy for embedded distributed architectures. ICECS 2011: 653-656 - [c13]Charly Bechara, Aurelien Berhault, Nicolas Ventroux, Stéphane Chevobbe
A small footprint interleaved multithreaded processor for embedded systems. ICECS 2011: 685-690 - 2010
- [j2]Stéphane Chevobbe
Service de reconfiguration prédictif pour plateforme multicoeur hétérogène. Tech. Sci. Informatiques 29(2): 179-199 (2010) - [c12]Sébastien Courroux, Stéphane Guyetant, Stéphane Chevobbe
A wavelet-based demosaicking algorithm for embedded applications. DASIP 2010: 90-96 - [c11]Erwan Raffin
Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architecture. DASIP 2010: 168-175 - [c10]Stéphane Chevobbe
Exploration platform of embedded simd architecture for autonomous retinas. DASIP 2010: 281-288 - [c9]Céline Azar, Maroun Ojail, Stéphane Chevobbe
CERA: A Channel Estimation Reconfigurable Architecture. ICT 2010: 957-964
2000 – 2009
- 2009
- [j1]Stéphane Chevobbe
Reducing Reconfiguration Overheads in Heterogeneous Multicore RSoCs with Predictive Configuration Management. Int. J. Reconfigurable Comput. 2009: 390167:1-390167:7 (2009) - [c8]Daniel Ménard, Emmanuel Casseau, Shafqat Khan, Olivier Sentieys
Reconfigurable Operator Based Multimedia Embedded Processor. ARC 2009: 39-49 - [c7]Maroun Ojail, Raphaël David, Stéphane Chevobbe
Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems. DSD 2009: 575-581 - [c6]Maroun Ojail, Raphaël David, Stéphane Chevobbe
A reconfigurable FIR/FFT unit for wireless telecommunication systems. FPL 2009: 645-648 - [c5]Davide Rossi
A multi-core signal processor for heterogeneous reconfigurable computing. SoC 2009: 106-109 - 2006
- [c4]Stéphane Chevobbe, Raphaël David, Frédéric Blanc, Thierry Collette, Olivier Sentieys:
Control Unit for Parallel Embedded System. ReCoSoC 2006: 168-176 - 2004
- [c3]Nicolas Ventroux, Stéphane Chevobbe
An Auto-adaptative Reconfigurable Architecture for the Control. Asia-Pacific Computer Systems Architecture Conference 2004: 72-87 - [c2]Eva Dokládalová, Stéphane Chevobbe, Frédéric Blanc:
Advances in Practical Implementation of the Digital Media Processing: Towards Reconfigurable Computation. EWIMT 2004 - [c1]Stéphane Chevobbe
RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems. SAMOS 2004: 20-29
Coauthor Index
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