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Claudio Brunelli
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2010 – 2019
- 2011
- [j4]Omer Anjum, Tapani Ahonen
, Fabio Garzia, Jari Nurmi
State of the art baseband DSP platforms for Software Defined Radio: A survey. EURASIP J. Wirel. Commun. Netw. 2011: 5 (2011) - [c16]Claudio Brunelli, Eero Aho, Heikki Berg:
OpenCL implementation of Cholesky matrix decomposition. SoC 2011: 62-67 - 2010
- [j3]Claudio Brunelli, Fabio Garzia, Davide Rossi
A coarse-grain reconfigurable architecture for multimedia applications supporting subword and floating-point calculations. J. Syst. Archit. 56(1): 38-47 (2010) - [c15]Tomi Aarnio, Claudio Brunelli, Timo Viitanen
Efficient floating-point texture decompression. SoC 2010: 31-34 - [c14]Claudio Brunelli, Roberto Airoldi, Jari Nurmi
Implementation and benchmarking of FFT algorithms on multicore platforms. SoC 2010: 59-62
2000 – 2009
- 2009
- [c13]Fabio Garzia, Roberto Airoldi, Jari Nurmi
Mapping of the FFT on a reconfigurable architecture targeted to SDR applications. SoC 2009: 157-160 - [c12]Claudio Brunelli, Heikki Berg, David Guevorkian:
Approximating sine functions using variable-precision Taylor polynomials. SiPS 2009: 057-062 - 2008
- [b1]Claudio Brunelli:
Design of hardware accelerators for embedded multimedia applications. University of Tampere, Finland, 2008 - [j2]Claudio Brunelli, Fabio Garzia, Jari Nurmi
A coarse-grain reconfigurable architecture for multimedia applications featuring subword computation capabilities. J. Real Time Image Process. 3(1-2): 21-32 (2008) - [j1]Claudio Brunelli, Fabio Campi, Claudio Mucci, Davide Rossi
Design space exploration of an open-source, IP-reusable, scalable floating-point engine for embedded applications. J. Syst. Archit. 54(12): 1143-1154 (2008) - [c11]Claudio Brunelli, Fabio Garzia, Jari Nurmi
Reconfigurable hardware: The holy grail of matching performance with programming productivity. FPL 2008: 409-414 - [c10]Claudio Brunelli, Fabio Garzia, Carmelo Giliberto, Jari Nurmi
A dedicated DMA logic addressing a time multiplexed memory to reduce the effects of the system bus bottleneck. FPL 2008: 487-490 - [c9]Fabio Garzia, Claudio Brunelli, Davide Rossi
Implementation of a floating-point matrix-vector multiplication on a reconfigurable architecture. IPDPS 2008: 1-6 - [c8]Heikki Berg, Claudio Brunelli, Ulf Lücking:
Analyzing models of computation for software defined radio applications. SoC 2008: 1-4 - [c7]Fabio Garzia, Claudio Brunelli, Carmelo Giliberto, Roberto Airoldi, Jari Nurmi
Implementation of W-CDMA slot synchronization on a reconfigurable System-on-Chip. SoC 2008: 1-4 - 2007
- [c6]Fabio Garzia, Claudio Brunelli, Andrea Ferro, Jari Nurmi:
Implementation of a 2D low-pass image filtering algorithm on a reconfigurable device. ReCoSoC 2007: 166-170 - 2006
- [c5]Claudio Brunelli, Jari Nurmi
Design And Verification of a VHDL Model of a Floating-Point Unit for a RISC Microprocessor. SoC 2006: 1-4 - [c4]Claudio Brunelli, Fabio Garzia, Jari Nurmi:
A Coarse-Grain Reconfigurable Machine with Floating-Point Arithmetic Capabilities. ReCoSoC 2006: 1-7 - 2005
- [c3]Claudio Brunelli, Fabio Garzia, Jari Nurmi, Claudio Mucci, Fabio Campi, Davide Rossi:
A FPGA Implementation of An Open-Source Floating-Point Computation System. SoC 2005: 29-32 - 2004
- [c2]Claudio Brunelli, Fabio Campi, Juha Kylliäinen, Jari Nurmi:
A reconfigurable FPU as IP component for SoCs. SoC 2004: 103-106 - 2003
- [c1]Massimo Bocchi, Claudio Brunelli, Claudia De Bartolomeis, Luca Magagni, Fabio Campi:
A system level IP integration methodology for fast SOC design. SoC 2003: 127-130
Coauthor Index
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