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Thibaud Tonnellier
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2020 – today
- 2022
- [j9]Elie Ngomseu Mambou
, Thibaud Tonnellier
Improved DC-Free Run-Length Limited 4B6B Codes for Concatenated Schemes. IEEE Access 10: 21847-21852 (2022) - [j8]Syed Mohsin Abbas
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 681-693 (2022) - 2021
- [j7]Thibaud Tonnellier
On Systematic Polarization-Adjusted Convolutional (PAC) Codes. IEEE Commun. Lett. 25(7): 2128-2132 (2021) - [j6]Nghia Doan
Neural Successive Cancellation Flip Decoding of Polar Codes. J. Signal Process. Syst. 93(6): 631-642 (2021) - [c16]Thibaud Tonnellier, Marzieh Hashemipour, Nghia Doan, Warren J. Gross, Alexios Balatsoukas-Stimming:
Towards Practical Near-Maximum-Likelihood Decoding of Error-Correcting Codes: An Overview. ICASSP 2021: 8283-8287 - [c15]Syed Mohsin Abbas
High-Throughput VLSI Architecture for Soft-Decision Decoding with ORBGRAND. ICASSP 2021: 8288-8292 - [c14]Jiajie Li
Reduced Complexity RPA Decoder for Reed-Muller Codes. ISTC 2021: 1-5 - [c13]Elie Ngomseu Mambou, Thibaud Tonnellier, Warren J. Gross:
Improved Dimming Scheme based on Non-DC Free RLL Codes for VLC. ISTC 2021: 1-5 - [i12]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI architecture for Soft-Decision decoding with ORBGRAND. CoRR abs/2105.07115 (2021) - [i11]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. CoRR abs/2110.13776 (2021) - 2020
- [j5]Furkan Ercan
Energy-Efficient Hardware Architectures for Fast Polar Decoders. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 322-335 (2020) - [j4]Furkan Ercan
Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation. IEEE Trans. Signal Process. 68: 5441-5456 (2020) - [c12]Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross:
Simplified Dynamic SC-Flip Polar Decoding. ICASSP 2020: 1733-1737 - [c11]Syed Mohsin Abbas
High-Throughput VLSI Architecture for GRAND. SiPS 2020: 1-6 - [i10]Furkan Ercan, Thibaud Tonnellier, Carlo Condo, Warren J. Gross:
Operation Merging for Hardware Implementations of Fast Polar Decoders. CoRR abs/2006.02012 (2020) - [i9]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Warren J. Gross:
High-Throughput VLSI Architecture for GRAND. CoRR abs/2007.07328 (2020) - [i8]Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross:
Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation. CoRR abs/2009.08547 (2020) - [i7]Thibaud Tonnellier, Warren J. Gross:
On Systematic Polarization-Adjusted Convolutional (PAC) Codes. CoRR abs/2011.03177 (2020)
2010 – 2019
- 2019
- [j3]Adrien Cassagne
AFF3CT: A Fast Forward Error Correction Toolbox! SoftwareX 10: 100345 (2019) - [j2]Furkan Ercan
Operation Merging for Hardware Implementations of Fast Polar Decoders. J. Signal Process. Syst. 91(9): 995-1007 (2019) - [c10]Seyyed Ali Hashemi
Deep-Learning-Aided Successive-Cancellation Decoding of Polar Codes. ACSSC 2019: 532-536 - [c9]Thibaud Tonnellier
Length-Compatible Polar Codes: A Survey : (Invited Paper). CISS 2019: 1-6 - [c8]Elie Ngomseu Mambou, Thibaud Tonnellier, Seyyed Ali Hashemi, Warren J. Gross:
Efficient Flicker-Free FEC Codes Using Knuth's Balancing Algorithm for VLC. GLOBECOM 2019: 1-6 - [c7]Adam Cavatassi, Thibaud Tonnellier
Asymmetric Construction of Low-Latency and Length-Flexible Polar Codes. ICC 2019: 1-6 - [c6]Nghia Doan, Seyyed Ali Hashemi
Neural Belief Propagation Decoding of CRC-Polar Concatenated Codes. ICC 2019: 1-6 - [c5]Nghia Doan, Seyyed Ali Hashemi
Neural Dynamic Successive Cancellation Flip Decoding of Polar Codes. SiPS 2019: 272-277 - [c4]Adam Cavatassi, Thibaud Tonnellier, Warren J. Gross:
Fast Decoding of Multi-Kernel Polar Codes. WCNC 2019: 1-6 - [i6]Adam Cavatassi, Thibaud Tonnellier, Warren J. Gross:
Fast Decoding of Multi-Kernel Polar Codes. CoRR abs/1902.01922 (2019) - [i5]Adam Cavatassi, Thibaud Tonnellier, Warren J. Gross:
Asymmetric Construction of Low-Latency and Length-Flexible Polar Codes. CoRR abs/1902.02402 (2019) - [i4]Nghia Doan, Seyyed Ali Hashemi, Furkan Ercan, Thibaud Tonnellier, Warren J. Gross:
Neural Dynamic Successive Cancellation Flip Decoding of Polar Codes. CoRR abs/1907.11563 (2019) - [i3]Elie Ngomseu Mambou, Thibaud Tonnellier, Seyyed Ali Hashemi, Warren J. Gross:
Efficient Flicker-Free FEC Codes using Knuth's Balancing Algorithm for VLC. CoRR abs/1908.05798 (2019) - [i2]Seyyed Ali Hashemi, Nghia Doan, Thibaud Tonnellier, Warren J. Gross:
Deep-Learning-Aided Successive-Cancellation Decoding of Polar Codes. CoRR abs/1912.01086 (2019) - 2018
- [i1]Nghia Doan, Seyyed Ali Hashemi, Elie Ngomseu Mambou, Thibaud Tonnellier, Warren J. Gross:
Neural Belief Propagation Decoding of CRC-Polar Concatenated Codes. CoRR abs/1811.00124 (2018) - 2016
- [j1]Thibaud Tonnellier
Lowering the Error Floor of Turbo Codes With CRC Verification. IEEE Wirel. Commun. Lett. 5(4): 404-407 (2016) - [c3]Thibaud Tonnellier
Hardware architecture for lowering the error floor of LTE turbo codes. DASIP 2016: 107-112 - [c2]Adrien Cassagne
Beyond Gbps Turbo decoder on multi-core CPUs. ISTC 2016: 136-140 - [c1]Thibaud Tonnellier
Lowering the error floor of double-binary turbo codes: The flip and check algorithm. ISTC 2016: 156-160
Coauthor Index
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