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José E. Franca
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2000 – 2009
- 2007
- [c45]Reimund Wittmann, Massimo Vanzi, Hans-Joachim Wassener, Navraj Nandra, Joachim Kunkel, José E. da Franca, Christian Münker:
Life begins at 65: unless you are mixed signal? DATE 2007: 936-941 - 2004
- [j12]Seng-Pan U, Rui Paulo Martins, José E. Franca:
A 2.5-V 57-MHz 15-tap SC bandpass interpolating filter with 320-MS/s output for DDFS system in 0.35-μ hboxm CMOS. IEEE J. Solid State Circuits 39(1): 87-99 (2004) - [j11]Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan, José Epifânio da Franca:
An I/Q mismatch-free switched-capacitor complex sigma-delta Modulator. IEEE Trans. Circuits Syst. II Express Briefs 51-II(5): 254-256 (2004) - 2003
- [j10]Kong-Pang Pun, José E. da Franca, Carlos Azeredo Leme, Ricardo Reis:
Quadrature sampling schemes with improved image rejection. IEEE Trans. Circuits Syst. II Express Briefs 50(9): 641-648 (2003) - [c44]Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, José E. Franca:
Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output. ISCAS (1) 2003: 129-132 - [e1]José E. Franca, Rudolf Koch:
ESSCIRC 2003 - 29th European Solid-State Circuits Conference, Estoril, Portugal, September 16-18, 2003. IEEE 2003, ISBN 0-7803-7995-0 [contents] - 2002
- [j9]Fernando Antonio Pinto Barúqui
, Antonio Petraglia, José E. Franca:
A 48-16-MHz CMOS SC decimation filter. IEEE J. Solid State Circuits 37(10): 1282-1289 (2002) - [c43]Jorge Guilherme
A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dB. ICECS 2002: 193-196 - [c42]Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan, José E. Franca:
A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. ISCAS (4) 2002: 221-224 - [c41]Seng-Pan U., Rui Paulo Martins, José E. Franca:
Design and analysis of low timing-skew clock generation for time-interleaved sampled-data systems. ISCAS (4) 2002: 441-444 - 2001
- [c40]Xu Jingnan, J. Serras, M. Oliveira, R. Belo, M. Bugalho, João C. Vital, Nuno Horta, José E. Franca:
IC design automation from circuit level optimization to retargetable layout. ICECS 2001: 95-98 - [c39]Jorge Guilherme, João C. Vital, José E. Franca:
A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction. ICECS 2001: 393-396 - [c38]Jorge Guilherme, Pedro M. Figueiredo, Pedro Azevedo, Goncalo Minderico, Antonio Leal, João C. Vital, José E. Franca:
Design considerations for high resolution pipeline ADCs in digital CMOS technology. ICECS 2001: 497-500 - [c37]Kong-Pang Pun, José E. Franca, Carlos Azeredo Leme:
A quadrature sampling scheme with improved image rejection for complex-IF receivers. ISCAS (1) 2001: 45-48 - [c36]Seng-Pan U., Rui Paulo Martins, José E. Franca:
High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering. ISCAS (1) 2001: 204-207 - [c35]Seng-Pan U., Rui Paulo Martins, José E. Franca:
A high-speed frequency up-translated SC bandpass filter with auto-zeroing for DDFS systems. ISCAS (1) 2001: 320-323 - [c34]Jorge Guilherme
A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications. ISCAS (1) 2001: 396-399 - 2000
- [c33]Seng-Pan U, Rui Paulo Martins, José E. Franca:
A linear-phase halfband SC video interpolation filter with coefficient-sharing and spread-reduction. ISCAS 2000: 177-180 - [c32]António J. Gano
New multiple input fully differential variable gain CMOS instrumentation amplifier. ISCAS 2000: 449-452 - [c31]Kong-Pang Pun, José E. Franca, Carlos Azeredo Leme:
Wideband digital correction of I and Q mismatch in quadrature radio receivers. ISCAS 2000: 661-664
1990 – 1999
- 1999
- [c30]António J. Gano
Fully differential variable gain instrumentation amplifier based on a fully differential DDA topology. ICECS 1999: 781-784 - [c29]Kong-Pang Pun, José E. Franca, Carlos Azeredo Leme:
Poly-phase switched-capacitor IIR Hilbert transformers. ICECS 1999: 1329-1332 - [c28]José E. Franca, Nuno Horta
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design. ICECS 1999: 1679-1683 - [c27]Seng-Pan U., Rui Paulo Martins, José E. Franca:
Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivity. ISCAS (2) 1999: 57-60 - [c26]Seng-Pan U., Rui Paulo Martins, José E. Franca:
High performance multirate SC circuits with predictive correlated double sampling technique. ISCAS (2) 1999: 77-80 - 1998
- [j8]Carlos Azeredo Leme, José Silva, Paulo Rodrigo, José E. da Franca:
A low-power CMOS nine-channel 40-MHz binary detection system with self-calibrated 500-μV offset. IEEE J. Solid State Circuits 33(4): 565-572 (1998) - [c25]Nuno de Figueiredo Garrido, José E. Franca:
A continuous-time area detector servo demodulator for hard disk drives. ICECS 1998: 127-130 - [c24]Kong-Pang Pun, José E. Franca, Carlos Azeredo Leme:
Basic principles and new solutions for analog sampled-data image rejection mixers. ICECS 1998: 165-168 - [c23]Jorge Guilherme, Nuno C. G. Horta, José E. Franca:
Symbolic synthesis of non-linear data converters. ICECS 1998: 219-222 - [c22]Markus Helfenstein, José E. Franca, George S. Moschytz:
Exact design of multirate switched-current FIR filters with improved phase linearity. ICECS 1998: 351-354 - [c21]Seng-Pan U, Rui Paulo Martins, José E. Franca:
A novel half-band SC architecture for efficient analog impulse sampled interpolation. ICECS 1998: 389-393 - 1997
- [j7]Wang Ping, José E. Franca:
A CMOS 1.0-μm two-dimensional analog multirate system for real-time image processing. IEEE J. Solid State Circuits 32(7): 1037-1048 (1997) - [j6]José E. Franca, Antonio Petraglia, Sanjit K. Mitra:
Multirate analog-digital systems for signal processing and conversion. Proc. IEEE 85(2): 242-262 (1997) - [j5]Nuno C. G. Horta
Algorithm-driven synthesis of data conversion architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(10): 1116-1135 (1997) - 1996
- [j4]A. P. Almeida, José E. da Franca:
Digitally programmable analog building blocks for the implementation of artificial neural networks. IEEE Trans. Neural Networks 7(2): 506-514 (1996) - [c20]Fernando A. P. Barúqui, Antonio Petraglia, Sanjit K. Mitra, José E. Franca:
Efficient IIR switched-capacitor decimators and interpolators. EUSIPCO 1996: 1-4 - [c19]Sanjit K. Mitra, José E. Franca:
Mixed analog-digital multirate signal processing. EUSIPCO 1996: 1-8 - [c18]Seng-Pan U., Rui Paulo Martins, José E. Franca:
New impulse sampled IIR switched-capacitor interpolators. ICECS 1996: 203-206 - [c17]C. Dupuy, José E. Franca, Carlos Azeredo Leme, Franco Maloberti, Roberto Rivoir, Guido Torelli, Yannis Papananos:
ALCD-analog libraries on CMOS digital process. ICECS 1996: 618-622 - 1995
- [j3]Nuno Paulino
Programmable CMOS switched-capacitor biquad using quasi-passive algorithmic DAC's. IEEE J. Solid State Circuits 30(6): 715-719 (1995) - [j2]M. Helena Fino, José E. da Franca, Adolfo Steiger-Garção
Automatic symbolic analysis of switched-capacitor filtering networks using signal flow graphs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(7): 858-867 (1995) - [c16]João Goes, João C. Vital, José E. Franca:
Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration. ISCAS 1995: 525-528 - [c15]Jorge Guilherme, José E. Franca:
New CMOS Logarithmic A/D Converters Employing Pipeline and Algorithmic Architectures. ISCAS 1995: 529-532 - [c14]M. Helena Fino, José E. da Franca, Adolfo Steiger-Garção:
Automatic Symbolic Characterization of SC Multirate Circuits with Finite Grain Operational Amplifiers. ISCAS 1995: 2213-2216 - 1994
- [j1]Bernardo G. Henriques, José E. Franca:
A high-speed programmable CMOS interface system combining D/A conversion and FIR filtering. IEEE J. Solid State Circuits 29(8): 972-977 (1994) - [c13]Wang Ping, José E. Franca:
Switched-Current Multirate Filtering. ISCAS 1994: 321-324 - [c12]João Goes, José E. Franca, Nuno F. Paulino, Jorge A. Grilo, Gabor C. Temes:
High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters. ISCAS 1994: 345-348 - [c11]Nuno C. G. Horta, José E. Franca:
A Methodology for Automatic Generation of Data Conversion Topologies from Algorithms. ISCAS 1994: 371-374 - [c10]Jorge Guilherme, José E. Franca:
Digitally-Controlled Analogue Signal Processing and Conversion Techniques Employing a Logarithmic Building Block. ISCAS 1994: 377-380 - [c9]João Pedro A. Carreira, José E. Franca:
High-Speed CMOS Current Comparators. ISCAS 1994: 731-734 - 1993
- [c8]Wang Ping, José E. Franca:
Switched-capacitor Polyphase Structures for Two-dimensional Analog FIR Filtering. ISCAS 1993: 1038-1041 - [c7]José E. Franca, Sanjit K. Mitra, Antonio Petraglia:
Recent Developments and Future Trends of Multirate Analog-digital Systems. ISCAS 1993: 1042-1045 - [c6]F. P. Martins, Nuno F. Paulino, José E. Franca:
Charge Programming Techniques for SC Biquads. ISCAS 1993: 1160-1163 - [c5]João C. Vital, José E. Franca:
A Concurrent Two-step Flash Analogue-to-digital Converter Architecture. ISCAS 1993: 1196-1199 - [c4]Bernardo G. Henriques, José E. Franca:
High-speed D/A Conversion with Linear Phase Sin x/x Compensation. ISCAS 1993: 1204-1207 - [c3]F. C. Nunes, José E. Franca:
Continuous-time Leapfrog Filter with Precise Successive Approximation Tuning. ISCAS 1993: 1271-1273 - [c2]João C. Vital, José E. Franca, Nuno S. Silva:
Fully-digital Testability of a High-speed Conversion System. ISCAS 1993: 1595-1598 - [c1]João C. Vital, José E. Franca:
High-Speed A/D-D/A Conversion System with Flexible Testing Capabilities. VLSI Design 1993: 357-362
Coauthor Index
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