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ECCTD 2013: Dresden, Germany
- 21st European Conference on Circuit Theory and Design, ECCTD 2013, Dresden, Germany, September 8-12, 2013. IEEE 2013
- Valeri M. Mladenov, Stoyan M. Kirilov
:
Analysis of the mutual inductive and capacitive connections and tolerances of memristors parameters of a memristor memory matrix. 1-4 - Michele Bonnin, Fernando Corinto
Evaluating the influence of noise on the spectrum of an oscillator. 1-4 - Piotr Zegarmistrz, Zbigniew Galias:
Reconstruction of conductances in resistive grids as an optimization problem. 1-4 - Matthias Hock, Andreas Hartel, Johannes Schemmel, Karlheinz Meier:
An analog dynamic memory array for neuromorphic hardware. 1-4 - Yusuke Yamamoto, Keiji Kato, Lei Lin, Masahiro Fukui:
A thermal management system for lithium-ion battery in mobile systems. 1-4 - Tetsuo Nishi, Siegfried M. Rump
A consideration on the condition number of extremely ill-conditioned matrices. 1-4 - Beatriz Blanco-Filgueira, Paula López, Manuel Suarez, Juan Bautista Roldán:
CMOS photodiode model and HDL implementation. 1-4 - Yoko Uwate, Thomas Ott, Yoshifumi Nishio
Clustering phenomena in coupled chaotic circuits with different coupling strength. 1-4 - Kim B. Ostman, Mikko Englund, Olli Viitala, Kari Stadius, Jussi Ryynänen, Kimmo Koli:
Design tradeoffs in N-path GmC integrators for direct delta-sigma receivers. 1-4 - Hongjia Mo, Michael Peter Kennedy:
A high-throughput spur-free hybrid nested bus-splitting/HK-MASH digital delta-sigma modulator. 1-4 - Adrian Walsh, Raymond Carley, Orla Feely
Memristor circuit investigation through a new tutorial toolbox. 1-4 - Manuel Suarez, Víctor M. Brea, Diego Cabello, Jorge Fernández-Berni, Ricardo Carmona-Galán
A 176×120 pixel CMOS vision chip for Gaussian filtering with massivelly Parallel CDS and A/D-conversion. 1-4 - Federico Bizzarri, Angelo Brambilla, Vincenza Ferrara, Giambattista Gruosso, Giancarlo Storti Gajani, Luca Viganò:
Efficiency improvement of partially shaded photovoltaic panels. 1-4 - Izzet Cem Göknar, Shahram Minaei
Pulse Width Modulation using a recently developed CMOS core circuit. 1-4 - Timo Rahkonen, Janne Aikio
Comparison of time-domain and frequency domain polynomial fitting. 1-4 - Câncio Monteiro
Low power secure CSSAL bit-parallel multiplier over GF(24) in 0.18μm CMOS technology. 1-4 - Bartlomiej Garda, Zbigniew Galias:
Coil shape design using the quasi-Newton algorithm. 1-4 - Shotaro Nishimura, Aloys Mvuma, Takao Hinamoto:
Complex adaptive notch filters for frequency estimation of three-phase power systems. 1-4 - Martin Wolkerstorfer, Steffen Trautmann:
Sequential multiobjective optimization for large-scale passive filter synthesis. 1-4 - Nguyen Thi My Hanh, Tadashi Tsubone:
Stabilizing control based on Stability Transformation Method for switching power converter. 1-4 - Tang Tang, Ronald Tetzlaff
Applying Cellular Neural Networks dynamics for image representation. 1-4 - Federico Bizzarri, Angelo Brambilla, Stefano Saggini, Giancarlo Storti Gajani:
Mixed-mode simulations to check stability of an adaptive constant on-time DC-DC converter. 1-4 - Bence J. Borbely, Zoltán Kincses, Zsolt Vörösházi, Zoltán Nagy, Péter Szolgay:
Analysis of myoelectric signals using a Field Programmable SoC. 1-4 - Carlos Sánchez-Azqueta
Design criteria for loop filters in spectrum balancing technique-based adaptive equalisers. 1-4 - Miroslav Vlcek, Pavel Zahradnik:
Approximation of almost equiripple low-pass FIR filters. 1-4 - Quoc-Tai Duong, Jerzy J. Dabrowski:
Focused calibration for advanced RF test with embedded RF detectors. 1-4 - Lubomír Brancík
Simulation of hybrid MTL systems with random parameters based on stochastic DAEs. 1-4 - Samuel Sordo Ibáñez, Blanca Piñero-García, Servando Espejo-Meana, Antonio Ragel-Morales, Joaquin Ceballos Caceres, Manuel Munoz-Diaz, Luis Carranza-González, Alberto Arias-Drake, José Miguel Mora-Gutierrez, Miguel Ángel Lagos-Florido
An adaptive approach to on-chip CMOS ramp generation for high resolution single-slope ADCs. 1-4 - Miklós Koller, András Horváth, Tamás Roska:
Frameless computing for spatial-temporal events. 1-4 - João Capela Duarte, Ernesto Ventura Martins, Luís Nero Alves:
Frequency characterization of memristive devices. 1-4 - Yang Jiao, Weimin Li, Dianwei Zhang, Wu Wen:
A 70 dBΩ 2.3 GHz low noise transimpedance amplifier. 1-4 - Ralph Lukas Stoop, Florian Gomez, Rolf Schonenberger, Claude Baumann, Ruedi Stoop:
Parameter properties of electronic and biological circuits and systems. 1-4 - Ella Gale
Observation of spontaneous bursting spike patterns in simple three memristor circuits. 1-4 - Hourieh Attarzadeh, Trond Ytterdal:
Low power OTA-less I-V-converter with single-ended to differential conversion for capacitive sensor interfaces. 1-4 - Alfio Dario Grasso, Gaetano Palumbo, Salvatore Pennisi:
Optimized frequency compensation topology for low-power three-stage OTAs. 1-4 - Enrico Roverato, Marko Kosunen
A configurable sampling rate converter for all-digital 4G transmitters. 1-4 - Peter Nilsson, Anusha Gundarapu, S. M. Yasser Sherazi:
Power savings in digital filters for wireless communication. 1-4 - Saber Moradi
A memory-efficient routing method for large-scale spiking neural networks. 1-4 - Alfio Dario Grasso, Salvatore Pennisi, Mario Paparo, Davide Patti:
Estimation of in-cylinder pressure using spark plug discharge current measurements. 1-4 - Mikko Honkala, Pekka Miettinen, Martti Valtonen, Janne Roos:
Admittance parameter formulation for realizable model-order reduction. 1-4 - Jakub Gronicz, Lasse Aaltonen, Nikolai Chekurov, Marko Kosunen, Kari Halonen:
A 1.8 MHz MEMS-based oscillator with synchronous amplitude limiter. 1-4 - Pekka Miettinen, Mikko Honkala, Martti Valtonen, Janne Roos:
Realizable reduction of interconnect models with dense coupling. 1-4 - Albrecht Reibiger:
Networks, multipoles and multiports. 1-37 - Kazushige Natsuno, Yoko Uwate, Yoshifumi Nishio
Motion picture processing by two-layer cellular neural networks with switching templates. 1-4 - Radu Matei:
Design of 2D parametric filters for directional Gaussian smoothing. 1-4 - Kristin Majetta, Christoph Clauß, Torsten Schmidt, Ronald Tetzlaff
Application of tool-specific simulation algorithms to Memristor models written in Modelica. 1-4 - Emilie Avignon-Meseldzija
Modeling and optimization of a dedicated FMCW radar frequency synthesizer. 1-4 - Johannes Gorner, Johannes Uhlig, Stefan Hänzsche, René Schüffny:
Behavioral model of a continuous current integrator with time discrete feedback and sampling. 1-4 - Robert Braunschweig, Jens Müller, Jan Müller, Ronald Tetzlaff
NERO mastering 300k CNN cells. 1-4 - Przemyslaw Mroszczyk, Piotr Dudek:
Trigger-wave propagation in arbitrary metrics in asynchronous cellular logic arrays. 1-4 - Stephen Nease, Stephen Brink, Paul E. Hasler:
STDP-enabled learning on a reconfigurable neuromorphic platform. 1-4 - Ramazan Yeniceri
Throughput enhancement for a new time-delay sampled-data system based True Random Bit Generator. 1-4 - Sara S. Ghoreishizadeh, Sandro Carrara, Giovanni De Micheli:
A configurable IC to contol, readout, and calibrate an array of biosensors. 1-4 - María R. Valero
OpAmp design for lock-in amplifiers in portable sensing systems. 1-4 - Masoud Babaie, Robert Bogdan Staszewski
A study of RF oscillator reliability in nanoscale CMOS. 1-4 - Ihsan Çiçek, Günhan Dündar:
A chaos based integrated jitter booster circuit for true random number generators. 1-4 - Carlos Formigli, Riccardo Rovatti, Gianluca Setti:
Power grid dispatch policies and robustness to chain failures. 1-4 - Panagiotis Giounanlis
Modelling of a charge control method for capacitive MEMS. 1-4 - Alberto Oliveri, Matteo Lodi, Marco Storace:
Design and circuit implementation of approximate switched MPC. 1-4 - Elton N. Lima, José Luis Cura
Folded-cascode transimpedance amplifiers employing a CMOS inverter as input stage. 1-4 - Géza Kolumbán, Tamás Krébesz, Chi Kong Tse, Francis Chung-Ming Lau:
Turn your baseband Matlab simulator into a fully functional, 2.4-GHz, operating FM-DCSK transceiver using SDE platform. 1-4 - Fernando Corinto
Complex dynamics in neuromorphic memristor circuits. 1-4 - Malik Summair Asghar, Muhammad Asfandyar Awan, Zhen Huang, Wenyuan Li, Michael Peter Kennedy, Antonio Buonomo, Alessandro Lo Schiavo:
An LC CMOS injection-locked frequency divider for divide-by-two and divide-by-three operation. 1-4 - Peng Wang, Trond Ytterdal, Thomas Halvorsrod:
A low noise single-ended to differential linear charge sampling SC-VGA for second harmonic cardiac ultrasound imaging. 1-4 - Kiyotaka Yamamura, Hideki Tanaka:
Finding all solutions of piecewise-linear resistive circuits using separable programming. 1-4 - Victor R. Gonzalez-Diaz, Aldo Pena-Perez, José-Fermi Guerrero-Castellanos, A. Tome, Gerardo Mino Aguilar:
Compact implementation of a three stages feedforward operational transconductance amplifier with Miller compensation. 1-4 - Thomas Rost, Harshawardhan Ramachandran, Martin P. Nawrot
A neuromorphic approach to auditory pattern recognition in cricket phonotaxis. 1-4 - Wolfgang Mathis
Oscillator synthesis based on Nambu mechanics with canonical dissipative damping. 1-4 - Anu Lehtovuori, Risto Valkonen:
Strategies for finding a bandwidth-optimal topology for impedance matching. 1-4 - Lufei Shen, Klaus Hofmann:
Design strategies for integrated high voltage charge pumps. 1-4 - Hongjia Mo, Michael Peter Kennedy, Vincent O'Brien, Brendan Mullane
Experimental validation of DAC with nested bus-splitting EFM4 DDSM. 1-4 - Hesham Mostafa, Federico Corradi
Automated synthesis of asynchronous event-based interfaces for neuromorphic systems. 1-4 - András Kiss, Zoltán Nagy, Péter Szolgay, Tamás Roska, György Csaba
FPGA-implementation of a holographic pattern-matching algorithm. 1-4 - Khaled Aggour, Renato Negra:
Study of peak and backoff efficiency of different power amplifier classes in outphasing systems. 1-4 - Carsten Wegener:
Method of modeling analog circuits in verilog for mixed-signal design simulations. 1-5 - Nandakishor Yadav, Sunil Dutt, Manisha Pattanaik, G. K. Sharma:
Double-gate FinFET process variation aware 10T SRAM cell topology design and analysis. 1-4 - Luigi Fortuna, Mattia Frasca, Maria Gabriella Xibilia:
A class of generalized orthonormal functions. 1-4 - Gianluca Giustolisi, Gaetano Palumbo, Paolo Finocchiaro, Alfio Pappalardo:
A simple extraction procedure for determining the electrical parameters in Silicon Photomultipliers. 1-4 - Tomoharu Nagashima, Kazuhide Inoue, Xiuqin Wei, Elisenda Bou, Eduard Alarcón, Hiroo Sekiya:
Inductively coupled wireless power transfer with class-E2 DC-DC converter. 1-4 - Jingcheng Zhuang, Robert Bogdan Staszewski
Gain Estimation of a Digital-to-Time Converter for Phase-Prediction All-Digital PLL. 1-4 - Matteo Biggio, Federico Bizzarri, Angelo Brambilla, Giorgio Carlini, Marco Storace:
Reliable and efficient phase noise simulation of mixed-mode integer-N Phase-Locked Loops. 1-4 - Daisuke Takago, Ryo Sakai, Shuitsu Matsumura, Tsuyoshi Takebe:
A construction method of optimum integer-to-integer transform based on an error propagation model. 1-4 - Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti, Salvatore Pennisi:
Effect of components relative tolerance in the magnitude response of a Gm-C biquad. 1-4 - Valeri M. Mladenov, Stoyan M. Kirilov
Syntheses of a PSPICE model of a titanium-dioxide memristor and Wien memristor generator. 1-4 - Johannes Partzsch
Live demonstration: Ethernet communication linking two large-scale neuromorphic systems. 1 - Erik Lindberg:
Oscillators - A simple introduction. 1-4 - Anand Narayanan, Mikael Bengtsson, Rengarajan Ragavan, Quoc-Tai Duong:
A 0.35μm CMOS 6-bit current steering DAC. 1-4 - Cecilia Gimeno, Carlos Sánchez-Azqueta, Santiago Celma, Concepción Aldea
A 1.25 Gb/s fully integrated optical receiver for SI-POF applications. 1-4 - Pier Paolo Civalleri, Marco Gilli, Michele Bonnin:
The spatial Cauchy problem for a dissipative infinite quantum waveguide supporting a single propagating mode. 1-4 - Jens Anders, Maurits Ortmanns:
Frequency noise of CMOS LC tank oscillators operating in weak inversion. 1-4 - Noboru Maeda, Shinji Fukui, Toshikazu Sekine, Yasuhiro Takahashi:
An estimation method for the 3 port S-parameters with 1 port measurements. 1-4 - Pramath Keny, Arya Menon, Madhura Rao, Urvang Gaitonde, Animesh Gupta, Annamaneni Sriharsha:
Development of antenna deployment circuit for nano-satellites. 1-4 - Sara Pashmineh, Stefan Bramburger, Hongcheng Xu, Maurits Ortmanns, Dirk Killat:
An LDO using stacked transistors on 65 nm CMOS. 1-4 - Mark M. Gourary, Sergey L. Ulyanov, Michael M. Zharov:
Model order reduction by state vector selection (SVS) approach. 1-4 - O. Levent Savkay, Nerhun Yildiz
Realization of preprocessing blocks of CNN based CASA system on FPGA. 1-4 - Zbigniew Galias, Xinghuo Yu:
Discretization effects in single input delayed sliding mode control systems. 1-4 - Rakesh Gangarajaiah, Liang Liu, Michal Stala, Peter Nilsson, Ove Edfors:
A high-speed QR decomposition processor for carrier-aggregated LTE-A downlink systems. 1-4 - Fábio Passos, M. Helena Fino, Elisenda Roca
A wideband lumped-element model for arbitrarily shaped integrated inductors. 1-4 - Stefan Hänzsche, René Schüffny:
Analysis of a charge redistribution SAR ADC with partially thermometer coded DAC. 1-4 - Surya Sharma, Trond Ytterdal:
A low power analog RAM implementation for in-probe beamforming in ultrasound imaging. 1-4 - Francesco Brandonisio, Alberto Prodomo, Michael Peter Kennedy, Ettore Napoli:
Implementation of a pulse-holding Time-to-Digital Converter on an FPGA. 1-4 - Sarang Kazeminia
Improved single-stage kickback-rejected comparator for high speed and low noise flash ADCs. 1-4 - Takao Hinamoto, Akimitsu Doi, Wu-Sheng Lu:
Jointly optimal high-order error feedback and realization for roundoff noise minimization in 2-D state-space digital filters. 1-4 - Belén Calvo, Cristina Azcona, Nicolás J. Medrano-Marqués, Santiago Celma, María R. Valero
A compact low-voltage first-order temperature-compensated CMOS current reference. 1-4 - Elbert Bechthum, Georgi I. Radulov, Joost Briaire, Govert Geelen, Arthur H. M. van Roermund:
A novel output transformer based highly linear RF-DAC architecture. 1-4 - Inkyung Hwang, Daehyuk Kim, Ji-Hyun Roh, Mun-Kyo Lee, Sun-Phil Nah, Minkyu Song:
An 8-b cascaded folding A/D converter with a new fully differential source follower. 1-4 - Ilkka Nissinen, Jan Nissinen, Juha Kostamovaara:
A time-gated 4×128 SPAD array with a 512 channel flash 80 ps-TDC for pulsed Raman spectroscopy. 1-4 - Jaeyoung Bae, Daehyuk Kim, Inkyung Hwang, Minkyu Song:
A high dynamic range CMOS image sensor with a digital configurable logarithmic counter. 1-4 - Tamás Krébesz, Géza Kolumbán, Francis Chung-Ming Lau, Chi Kong Tse:
Application of universal software defined PXI platform for the performance evaluation of FM-DCSK communications system. 1-4 - Mauro Di Marco, Mauro Forti, Barnabas Garay, Miklós Koller, Luca Pancioni
Multiple metastable rotating waves and long transients in cooperative CNN rings. 1-4 - Ádám Rák, György Cserey:
Emulation of analog memristors using low yield digital switching memristors. 1-4 - Ryo Matsushiba, Hiroaki Kotani, Takao Waho:
An energy-efficient ΔΣ modulator using dynamic-common-source integrators. 1-4 - Arturo Buscarino, Luigi Fortuna, Mattia Frasca, Lucia Valentina Gambuzza:
A new driven memristive chaotic circuit. 1-4 - Po-Hsun Wu, Mark Po-Hung Lin
Lithography-aware 1-dimensional cell generation. 1-4 - Peng Wang, Trond Ytterdal, Thomas Halvorsrod:
A low noise single-end to differential switched-capacitor VGA for PZT-Xducer ultrasound imaging. 1-4 - Shota Kirikawa, Toshimichi Saito:
Filter-induced bifurcation in simple spiking circuits. 1-4 - Sebastian Höppner, Dennis Walter, Holger Eisenreich, Stefan Schiefer, René Schüffny:
Live demonstration: A 90GBit/s serial NoC link over 6mm in 65nm CMOS technology. 1 - Weiran Cai, Ronald Tetzlaff
Critical role of initial condition in the dynamics of memristive systems: Orbital narrowing revisited. 1-4 - Yan Huang, Horst Schleifer, Dirk Killat:
Design and analysis of novel dynamic latched comparator with reduced kickback noise for high-speed ADCs. 1-4 - Alon Ascoli, Vanessa Senger, Ronald Tetzlaff
Insights on memristor modeling. 1-4 - Ramazan Yeniceri
The Doppler Effect with input driven autowaves. 1-4 - Arturo Buscarino, Luigi Fortuna, Mattia Frasca, Marco Iachello:
A new oscillator scheme for analog modeling. 1-4 - Pawel Turcza:
Low power 2 Mbps radio telemetry system for biomedical applications. 1-4 - Levent Aksoy, Eduardo Costa
Exploration of tradeoffs in the design of integer cosine transforms for image compression. 1-4 - Angela Slavova:
Stabilization of coupled reaction-diffusion CNN. 1-4 - Chenzi Huang, Frank Woittennek
Steady-state analysis of a distributed model of the buck converter. 1-4 - Jon Håvard Eriksrod, Trond Ytterdal:
A 65nm CMOS front-end LNA for medical ultrasound imaging with feedback employing noise and distortion cancellation. 1-4 - Jordi Cosp-Vilella, Herminio Martínez-Garcia:
On chaotic behavior in automatic tuning loops for continuous-time filters. 1-4 - Mireia Vinyoles-Serra, Xavier Vilasís-Cardona:
More on the generalized fisher discriminant based in 2 neuron cellular neural networks. 1-4 - Shailesh Singh Chouhan, Kari Halonen:
A modified cross coupled rectifier based charge pump for energy harvesting using RF to DC conversion. 1-4 - Akio Tsuneda, Kota Morikawa:
A study on random bit sequences with prescribed auto-correlations by post-processing using linear feedback shift registers. 1-4 - Cristina Azcona, Belén Calvo, Nicolás J. Medrano-Marqués, Santiago Celma, Carlos Sánchez-Azqueta
A CMOS quasi-digital temperature sensor for battery operated systems. 1-4 - Chien-Cheng Tseng, Su-Ling Lee:
Design of sparse lowpass differentiator using iterative hard thresholding method. 1-4 - Fahad Qazi, Quoc-Tai Duong, Jerzy J. Dabrowski:
Blocker and image reject low-IF frontend. 1-4 - Raúl Jiménez, Manuel Sanchez-Raya
FPGA-based implementation of a real-time timing measuring device. 1-4 - Christoph Zorn, Tina Thiessen, Timon Brückner, Maurits Ortmanns, Wolfgang Mathis
State space analysis of mixed signal systems with switched feedback and delay. 1-4 - Nobuaki Takahashi, Daisuke Takago, Shuitsu Matsumura, Tsuyoshi Takebe:
Efficient multistage implementation of rational sampling rate converter. 1-4 - Mihaly Radvanyi, Kristóf Karacs:
Autonomous detection of information patterns through hierarchical peeling. 1-4 - Fernando Corinto, András Horváth, Tamás Roska:
Architectures for nanoscale hybrid computing systems. 1-4 - Pavel Masa, Pavel Sovka, Miroslav Vlcek, Radim Spetik:
Using ADZT for a signal reconstruction. 1-4 - Chien-Cheng Tseng, Su-Ling Lee:
Fractional derivative constrained design of FIR filter with prescribed magnitude and phase responses. 1-4 - Daichi Manabe, Tadashi Tsubone:
Analysis of a controlled 3-D piecewise-constant circuit with time-delayed feedback. 1-4 - Chihiro Yoshimura, Masanao Yamaoka, Hidetaka Aoki, Hiroyuki Mizuno
Spatial computing architecture using randomness of memory cell stability under voltage control. 1-4 - Benedikt Schlecker, Maurits Ortmanns, Jens Anders, Georg E. Fantner
Novel electronics for high-speed FM-AFM in life science applications. 1-4 - Melike Atay, Müstak E. Yalçin:
A parallelized distance transformation architecture for FPGAs. 1-4 - Andreas Krinke
Extended constraint management for analog and mixed-signal IC design. 1-4 - Csaba Nemes, Gergely Barcza
Implementation trade-offs of the density matrix renormalization group algorithm on kilo-processor architectures. 1-4 - Sangho Shin, Kyungmin Kim, Sung-Mo Steve Kang:
Memristor macromodel and its application to neuronal spike generation. 1-4 - Oguzhan Yavuz, Sadiye Nergis Tural-Polat
3-D spatio-temporal Gabor-type filter implementations with Time-Derivative Cellular Neural Networks. 1-4
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