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Stephen Brink
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2010 – 2019
- 2014
- [j8]Shubha Ramakrishnan, Arindam Basu
, Leung Kin Chiu, Jennifer Hasler, David V. Anderson, Stephen Brink:
Speech Processing on a Reconfigurable Analog Platform. IEEE Trans. Very Large Scale Integr. Syst. 22(2): 430-433 (2014) - [j7]Stephen Brink, Jennifer Hasler, Richard B. Wunderlich:
Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA. IEEE Trans. Very Large Scale Integr. Syst. 22(11): 2307-2315 (2014) - [j6]Scott Koziol, Stephen Brink, Jennifer Hasler:
A Neuromorphic Approach to Path Planning Using a Reconfigurable Neuron Array IC. IEEE Trans. Very Large Scale Integr. Syst. 22(12): 2724-2737 (2014) - 2013
- [j5]Stephen Brink, Stephen Nease, Paul E. Hasler:
Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit. Neural Networks 45: 39-49 (2013) - [j4]Stephen Brink, Stephen Nease, Paul E. Hasler, Shubha Ramakrishnan, Richard B. Wunderlich, Arindam Basu
A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena. IEEE Trans. Biomed. Circuits Syst. 7(1): 71-81 (2013) - [c9]Stephen Nease, Stephen Brink, Paul E. Hasler:
STDP-enabled learning on a reconfigurable neuromorphic platform. ECCTD 2013: 1-4 - [c8]Scott Koziol, Stephen Brink, Jennifer Hasler:
Path planning using a neuron array integrated circuit. GlobalSIP 2013: 663-666 - [c7]Stephen Brink, Jennifer Hasler, Richard B. Wunderlich:
A large-scale FPAA enabling adaptive floating-gate circuits. MWSCAS 2013: 285-288 - 2012
- [b1]Stephen Brink:
Learning in silicon: a floating-gate based, biophysically inspired, neuromorphic hardware system with synaptic plasticity. Georgia Institute of Technology, Atlanta, GA, USA, 2012 - [j3]Stephen Nease, Suma George, Paul E. Hasler, Scott Koziol, Stephen Brink:
Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform. IEEE Trans. Biomed. Circuits Syst. 6(1): 76-84 (2012) - 2010
- [j2]Arindam Basu
A Floating-Gate-Based Field-Programmable Analog Array. IEEE J. Solid State Circuits 45(9): 1781-1794 (2010) - [j1]Arindam Basu
Neural Dynamics in Reconfigurable Silicon. IEEE Trans. Biomed. Circuits Syst. 4(5): 311-319 (2010) - [c6]Scott Koziol, Craig Schlottmann, Arindam Basu
Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs. ISCAS 2010: 2793 - [c5]Scott Koziol, Craig Schlottmann, Arindam Basu
Hardware and software infrastructure for a family of floating-gate based FPAAs. ISCAS 2010: 2794-2797
2000 – 2009
- 2009
- [c4]Bo Marr, Arindam Basu
A learning digital computer. DAC 2009: 617-618 - [c3]Sheng-Yu Peng, Gokce Gurun, Christopher M. Twigg, Muhammad Shakeel Qureshi, Arindam Basu, Stephen Brink, Paul E. Hasler, Levent Degertekin:
A Large-scale Reconfigurable Smart Sensory Chip. ISCAS 2009: 2145-2148 - 2008
- [c2]Arindam Basu
RASP 2.8: A new generation of floating-gate based field programmable analog array. CICC 2008: 213-216 - [c1]Stephen Brink, Scott Koziol, Shubha Ramakrishnan, Paul E. Hasler:
A biophysically based dendrite model using programmable floating-gate devices. ISCAS 2008: 432-435
Coauthor Index
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