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16th SMACD 2019: Lausanne, Switzerland
- 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019, Lausanne, Switzerland, July 15-18, 2019. IEEE 2019, ISBN 978-1-7281-1201-5
Deep Learning for Analog EDA: Are we There Yet?
- Daniel Guerra, António Canelas, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins:
Artificial Neural Networks as an Alternative for Automatic Analog IC Placement. 1-4 - Martin Grabmann, Frank Feldhoff, Georg Gläser:
Power to the Model: Generating Energy-Aware Mixed-Signal Models using Machine Learning. 5-8 - Gamze Islamoglu, Tugberk Ogulcan Çakici, Engin Afacan, Günhan Dündar:
Artificial Neural Network Assisted Analog IC Sizing Tool. 9-12 - Nuno Lourenço, Engin Afacan, Ricardo Martins, Fábio Passos, António Canelas, Ricardo Póvoa, Nuno Horta, Günhan Dündar:
Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing. 13-16 - Florent Cilici, Gildas Léger, Manuel J. Barragán, Salvador Mir, Estelle Lauga-Larroze, Sylvain Bourdel:
Efficient generation of data sets for one-shot statistical calibration of RF/mm-wave circuits. 17-20
Do You Still Handcraft Your Analog and RF Layouts?
- Sadik Ilik, Nergiz Sahin-Solmaz, Aykut Kabaoglu, Mustafa Berke Yelten:
Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. 21-24 - Ricardo Martins, Nuno Lourenço, Ricardo Póvoa, Nuno Horta:
On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects. 25-28 - Sherif Ahmed Mohamed, Mohamed Dessouky, Fady Atef Naguib, Soha Hamed:
Analog Layout Placement Based on Unit Elements and Routing Channel Estimation. 29-32 - Yu-Hsien Chen, Hao-Yu Chi, Ling-Yen Song, Chien-Nan Jimmy Liu, Hung-Ming Chen:
A Structure-Based Methodology for Analog Layout Generation. 33-36 - Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm. 37-40
Radio Frequency, Microwave and mm-Wave
- Yasir Ismael Abdulraheem Al-Yasir, Naser Ojaroudi Parchin, Ahmed Maan Abdulkhaleq, Khalid W. Hameed, Mohammed A. G. Al-Sadoon, Raed Abd-Alhameed:
Design, Simulation and Implementation of Very Compact Dual-band Microstrip Bandpass Filter for 4G and 5G Applications. 41-44 - Antonio D. Martínez-Pérez, Cecilia Gimeno, Denis Flandre, Francisco Aznar, Guillermo Royo, Carlos Sánchez-Azqueta:
Methodology for Performance Optimization in Noise- and Distortion-Canceling LNA. 45-48 - Patrick Döll, Oner Hanay, Erkan Bayram, Renato Negra:
Verilog-A based Behavioral Modeling of an FBMC Transmitter. 49-52 - Yasir I. A. AI-Yasir, Naser Ojaroudi Parchin, Ali A. S. Alabdullah, Widad Faraj A. Mshwat, Atta Ullah, Raed Abd-Alhameed:
New Pattern Reconfigurable Circular Disk Antenna Using Two PIN Diodes for WiMax/WiFi (IEEE 802.11a) Applications. 53-56 - Fábio Passos, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries. 57-60
Cutting Edge Test Solutions for Analog, Mixed-Signal and RF ICs
- Vladimir Zivkovic, Art Schaldenbrand:
Requirements, for Industrial Analog Faulf-Simulator. 61-64 - Valentin Gutierrez, Gildas Léger:
1 Adaptive defect simulation flow for Defect-oriented Test evaluation. 65-68 - Manuel J. Barragán, Gildas Léger:
Feature selection and feature design for machine learning indirect test: a tutorial review. 69-72 - Hassan El Badawi, Mariane Comte, Florence Azaïs, Vincent Kerzèrho, Serge Bernard, François Lefevre:
Which metrics to use for RF indirect test strategy? 73-76 - Angelos Antonopoulos, Georgios Volanis, Yichuan Lu, Yiorgos Makris:
Post-Production Calibration of Analog/RF ICs: Recent Developments and A Fully Integrated Solution. 77-80 - Sarah A. El-Sayed, Luis A. Camuñas-Mesa, Bernabé Linares-Barranco, Haralampos-G. D. Stratigopoulos:
Self-Testing Analog Spiking Neuron Circuit. 81-84
Modeling the Next Generation of Electronics and Sensors
- Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Giovanni Finocchio, Mario Carpentieri, Marco Lanuzza:
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs. 85-88 - Dimitrios Garyfallou, Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
A Sparsity-Aware MOR Methodology for Fast and Accurate Timing Analysis of VLSI Interconnects. 89-92 - Qiang Huo, Zhenhua Wu, Feng Zhang, Ling Li:
A Modeling Approach for 7nm Technology Node Area-Consuming Circuit Optimization and Beyond. 93-96 - Sotoudeh Hamedi-Hagh:
Error-Free Calculation of Total Referred Noises in Electronic Circuits. 97-100 - Federico Pace, Olivier Marcelot, Philippe Martin-Gonthier, Olivier Saint-Pé, Michel Breart de Boisanger, Rose-Marie Sauvage, Pierre Magnan:
Modeling of Parasitic Light Sensitivity in Global Shutter CMOS Image Sensors. 101-104 - Zsombor Lázár, Yves Bidaux, Markus Roost, Gael F. Close:
Model-Based Engineering of Magnetic Sensors. 105-108
Powering the Smarts Competition
- Arash Pake Talei, Wolfgang A. Pribyl, Günter Hofer:
Wide Frequency Range Impedance Measurement of a Li- ion Prismatic Cell for Power Line Communication Technique. 109-112 - Jun Tan, Ralf Sommer:
Modeling of Low-dropout Regulator to Optimize Power Supply Rejection in System-on-Chip Applications. 113-116 - Min Gu Kim, Ye Rim Lee, Jun Rim Choi:
Wireless Power Transmission of a Smartphone by Three-dimensional Magnetic Resonance. 117-120 - Michele Caselli, Andrea Boni:
3-D Maximum Power Point Searching and Tracking for Ultra Low Power RF Energy Harvesters. 121-124
Design Techniques and Optimization Methods
- Maximilian Neuner, Helmut Graeb:
Power-Down Mode Verification for Hierarchical Analog Circuits. 125-128 - George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
Efficient Circuit Reduction in Limited Frequency Windows. 129-132 - Ahmad Tarraf, Lars Hedrich:
Automatic Modeling of Transistor Level Circuits by Hybrid Systems with Parameter Variable Matrices. 133-136 - Nawel Drira, Mouna Kotti, Mourad Fakhfakh, Patrick Siarry, Esteban Tlelo-Cuautle:
Pseudo Expected Improvement Based-Optimization for CMOS Analog Circuit Design. 137-140 - Yun Zhou, Dries Vercruyce, Dirk Stroobandt:
A New Adaptation of Particle Swarm Optimization Applied to Modern FPGA Placement. 141-144
Bio-Electronics
- Krithikaa Mohanarangam, Min Gu Kim, Jun Rim Choi:
A Low-Frequency 3-Coil Inductive System for Wirelessly Powering Leadless Pacemakers. 145-148 - Ahmet Sari, Okan Zafer Batur, Ceyhun Kirmli:
Wireless Readout System Modeling for Electrodeless QCM. 149-152 - Maria-Alexandra Paun, Catherine Dehollain:
Modeling and performance investigation of insulin injection pen for diabetic persons. 153-156 - Florian Kögler, Alexander Hofmann, Georg Gläser:
Will There be Light? - Simulative Prediction of Fluorescence Measurements. 157-160 - Ricardo Póvoa, António Canelas, Ricardo Martins, Nuno Horta, Nuno Lourenço, João Goes:
A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers. 161-164
Powering Everyday Electronics
- Giulia Di Capua, Nicola Femia, Kateryna Stoyka:
Design of Differential-Mode Input Filters for DC-DC Switching Regulators. 165-168 - Alberto Oliveri, Matteo Lodi, Marco Storace:
A Piecewise-Affine Inductance Model for Inductors Working in Nonlinear Region. 169-172 - Giulia Di Capua, Nicola Femia, Kateryna Stoyka:
Sensitivity Analysis of Inductive Power Transfer Systems for Electric Vehicles Battery Charging. 173-176 - Stefano Maranò, Yannick Maret, Matija Varga, Luca Ghezzi, Agostino Butti:
Realistic Cable Modeling for Low-Voltage Installations. 177-180 - Jun Tan, Ralf Sommer:
Analysis and Optimization of Power Supply Rejection for Power Management Unit Design in RFID Sensor applications. 181-184
EDA Competition
- Julian Leonhard, Marie-Minerve Louërat, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos:
Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application. 185-188 - Boris Contreras, Gladys O. Ducoudray, Rogelio Palomera, Carlos Bernal:
Automated Parameter Extraction and SPICE Model Modification For Gate Enclosed MOSFETs Simulation. 189-192 - Luca Dello Sterpaio, Antonino Marino, Pietro Nannipieri, Luca Fanucci:
Exploiting LabViewFpga Socketed CLIP to Design and Implement Soft-Core Based Complex Digital Architectures on PXI FPGA Target Boards. 193-196 - Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level. 197-200 - Dominik Zupan, Bernd Deutschmann:
Identification of EMI Induced Changes During the Design of ICs using a Post-Processing Framework. 201-204
Very Large Scale Reliability
- Luca Sterpone, Ludovica Bozzoli, Corrado De Sio, Boyang Du, Sarah Azimi:
A new Method for the Analysis of Radiation-induced Effects in 3D VLSI Face-to-Back LUTs. 205-208 - Feng Zhang, Linan Li, Qiang Huo, Cong Fang, Wenqiang Ba:
A Fluctuation Model of a Hf02 RRAM Cell for Memory Circuit Designs. 209-212 - Zeyu Sun, Taeyoung Kim, Marcus Chow, Shaoyi Peng, Han Zhou, Hyoseung Kim, Daniel Wong, Sheldon X.-D. Tan:
Long-Term Reliability Management For Multitasking GPGPUs. 213-216 - Zeyu Sun, Han Zhou, Sheldon X.-D. Tan:
Dynamic Reliability Management for Multi-Core Processor Based on Deep Reinforcement Learning. 217-220
MEMS & Heterogeneous Systems: Which Design Tools and Methodologies are Missing?
- Axel Hald, Robert Wolf, Johannes Seelhorst, Jürgen Scheible, Jens Lienig, Stefan Tibus, Mike Schwarz:
Parasitic Extraction Methodology for MEMS Sensors with Active Devices. 221-224 - Steffen Michael, Ralf Sommer:
Efficient Design and Layout of Capacitive 3D Accelerometer. 225-228
Variability and Aging
- Juan Núñez, Elisenda Roca, Rafael Castro-López, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Experimental Characterization of Time-Dependent Variability in Ring Oscillators. 229-232 - Maike Taddiken, Steffen Paul, Dagmar Peters-Drolshagen:
Charge-Based Model for Reliability Analysis Flow of Flip- Flops under Process Variation and Aging. 233-236 - Elena-Diana Sandru, Corneliu Burileanu, Emilian David, Andi Buzo, Georg Pelz:
Modeling the Dependencies between Circuit and Technology Parameters for Sensitivity Analysis using Machine Learning Techniques. 237-240 - Pablo Martín-Lloret, Juan Núñez, Elisenda Roca, Rafael Castro-López, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks. 241-244 - Engin Afacan, Gönenç Berkol, Günhan Dündar:
Post-Silicon Validation of Yield-Aware Analog Circuit Synthesis. 245-248
System-Level Methodologies
- Dries Peumans, Piet Bronders, Gerd Vandersteen:
Noise leakage suppression in VCO-based ∑Δ-modulators excited by modulated signals. 249-252 - Oner Hanay, Renato Negra:
Symbolic Top-down Design Methodology of a Quadrature Bandpass Delta Sigma Modulator. 253-256 - Mina Louis, Mohamed Dessouky, Ashraf Salem:
PLL Real Number Modeling in SystemVerilog. 257-260 - Elisa Sacco, Johan Vergauwen, Georges G. E. Gielen:
Architectural Analysis of a Novel Closed-Loop VCO-Based 1-1 Sturdy MASH Sensor-to-Digital Converter. 261-264 - Jonas Meier, Fabian Speicher, Christoph Beyerstedt, Tobias Saalfeld, Gregor Boronowsky, Ralf Wunderlich, Stefan Heinen:
Modeling Power Supply Noise Effects for System-Level Simulation of $\Delta\Sigma$ -ADCs. 265-268
Poster Session
- Cristian E. Onete, Maria Cristina C. Onete:
Spiral Generation And Its Implication On Automatic Bi-Terminal Devices Circuits Drawing. 269-272 - Józef Borkowski, Dariusz Kania:
Simulation Comparison of Frequency Estimation Methods Applied for Power Control in Renewable Energy Systems. 273-276 - Ahmad Khusro, Saddam Husain, Mohammad S. Hashmi, Medet Auyuneur, Abdul Quaiyum Ansari:
A Reliable and Fast ANN Based Behavioral Modeling Approach for GaN HEMT. 277-280 - Christoph Beyerstedt, Fabian Speicher, Jonas Meier, Ralf Wunderlich, Stefan Heinen:
Baseband Equivalent Modelling Approach for Analog Linear Transfer Functions in Event-driven Simulations. 281-284 - Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Póvoa, Nuno Horta, Emmanuel Moutaye:
Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization. 285-288 - C. Dooley, Elena Blokhina, Brian Mulkeen, Dimitri Galayko:
FPGA Based Modelling of an ADPLL Network. 289-292 - Nobukazu Takai, Masafumi Fukuda, Masahiro Saruta:
Self-improvement of OPAmp parameters using Q-Learning. 293-296
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