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"Compact modeling of on-chip ESD protection devices using Verilog-A."

Junjun Li et al. (2006)

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DOI: 10.1109/TCAD.2005.855948

access: closed

type: Journal Article

metadata version: 2020-12-09

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Junjun Li, Sopan Joshi, Ryan Barnes, Elyse Rosenbaum:
Compact modeling of on-chip ESD protection devices using Verilog-A. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(6): 1047-1063 (2006)

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