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"High Performance VLSI Architecture for Three-Step Search Algorithm."

Rohan Mukherjee et al. (2015)

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DOI: 10.1007/S00034-014-9919-X

access: closed

type: Journal Article

metadata version: 2020-06-21

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  - journals/cssp/MukherjeeSDCS15
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  - https://dblp.org/rec/journals/cssp/MukherjeeSDCS15
Rohan Mukherjee, Keyur Sheth, Anindya Sundar Dhar, Indrajit Chakrabarti, Somnath Sengupta:
High Performance VLSI Architecture for Three-Step Search Algorithm. Circuits Syst. Signal Process. 34(5): 1595-1612 (2015)

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