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Dimitri Soussan
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2010 – 2019
- 2016
- [c7]Fady Abouzeid
, Christophe Bernicot, Sylvain Clerc, Jean-Marc Daveau, Gilles Gasiot, Daniel Noblet, Dimitri Soussan, Philippe Roche:
30% static power improvement on ARM Cortex®-A53 using static biasing-anticipation. ESSCIRC 2016: 37-40 - 2015
- [c6]Fady Abouzeid
28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processors. ESSCIRC 2015: 108-111 - [c5]Gilles Gasiot, Dimitri Soussan, Jean-Luc Autran, Victor Malherbe, Philippe Roche:
Muons and thermal neutrons SEU characterization of 28nm UTBB FD-SOI and Bulk eSRAMs. IRPS 2015: 2 - [c4]Victor Malherbe, Gilles Gasiot, Dimitri Soussan, Aurelien Patris, Jean-Luc Autran, Philippe Roche:
Alpha soft error rate of FDSOI 28 nm SRAMs: Experimental testing and simulation analysis. IRPS 2015: 11 - [c3]Sylvain Clerc, Mehdi Saligane, Fady Abouzeid
8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasing. ISSCC 2015: 1-3 - 2012
- [c2]Sylvain Clerc, Fady Abouzeid
A 0.32V, 55fJ per bit access energy, CMOS 65nm bit-interleaved SRAM with radiation Soft Error tolerance. ICICDT 2012: 1-4 - [c1]Dimitri Soussan, Alexandre Valentian, Sylvain Majcherczak, Marc Belleville:
A mixed LPDDR2 impedance calibration technique exploiting 28nm Fully-Depleted SOI Back-Biasing. ICICDT 2012: 1-4
Coauthor Index
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