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Robert Schwencker
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2010 – 2019
- 2010
- [c6]Wolfgang Ecker, Volkan Esen, Robert Schwencker, Thomas Steininger, Michael Velten:
TLM+ modeling of embedded HW/SW systems. DATE 2010: 75-80
2000 – 2009
- 2005
- [j1]Martin Streibl, Franz Zängl, Kai Esmark, Robert Schwencker, Wolfgang Stadler, Harald Gossner
, S. Drüen, Doris Schmitt-Landsiedel:
High abstraction level permutational ESD concept analysis. Microelectron. Reliab. 45(2): 313-321 (2005) - 2002
- [c5]Robert Schwencker, Frank Schenkel, Michael Pronath, Helmut E. Graeb:
Analog Circuit Sizing Using Adaptive Worst-Case Parameter Sets. DATE 2002: 581-585 - 2001
- [c4]Frank Schenkel, Michael Pronath, Stephan Zizala, Robert Schwencker, Helmut E. Graeb, Kurt Antreich:
Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search. DAC 2001: 858-863 - 2000
- [c3]Kurt Antreich, Josef Eckmüller, Helmut Graeb, Michael Pronath, Frank Schenkel, Robert Schwencker, Stephan Zizala:
WiCkeD: analog circuit synthesis incorporating mismatch. CICC 2000: 511-514 - [c2]Robert Schwencker, Frank Schenkel, Helmut E. Graeb, Kurt Antreich:
The Generalized Boundary Curve-A Common Method for Automatic Nominal Design and Design Centering of Analog Circuits. DATE 2000: 42-47
1990 – 1999
- 1999
- [c1]Robert Schwencker, Josef Eckmüller, Helmut E. Graeb, Kurt Antreich:
Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints. DATE 1999: 323-327
Coauthor Index
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