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Hiroaki Kunieda
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2010 – 2019
- 2017
- [j34]Zhiqiang Hu, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Hybrid Minutiae Descriptor for Narrow Fingerprint Verification. IEICE Trans. Inf. Syst. 100-D(3): 546-555 (2017) - [j33]Zhiqiang Hu, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Narrow Fingerprint Template Synthesis by Clustering Minutiae Descriptors. IEICE Trans. Inf. Syst. 100-D(6): 1290-1302 (2017) - [j32]Shanlin Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(7): 1384-1395 (2017) - [j31]Shanlin Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
HOG-Based Object Detection Processor Design Using ASIP Methodology. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(12): 2972-2984 (2017) - [j30]Hao Xiao, Busheng Zheng, Tsuyoshi Isshiki, Hiroaki Kunieda:
Hybrid shared-memory and message-passing multiprocessor system-on-chip for UWB MAC layer. IET Comput. Digit. Tech. 11(1): 8-15 (2017) - 2016
- [j29]Farhan Shafiq, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A Fast Trace Aware Statistical Based Prediction Model with Burst Traffic Modeling for Contention Stall in A Priority Based MPSoC Bus. IPSJ Trans. Syst. LSI Des. Methodol. 9: 37-48 (2016) - [j28]Hao Xiao, Ning Wu, Fen Ge, Tsuyoshi Isshiki, Hiroaki Kunieda, Jun Xu, Yuangang Wang:
Efficient Synchronization for Distributed Embedded Multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 779-783 (2016) - [c31]Shanlin Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
An efficient embedded processor for object detection using ASIP methodology. ASAP 2016: 225-226 - 2015
- [j27]Surachai Thongkaew, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Register-Based Process Virtual Machine Acceleration Using Hardware Extension with Hybrid Execution. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(12): 2505-2518 (2015) - [j26]Arif Ullah Khan, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Efficient Design Exploration Framework of SW/HW Systems Based on Tightly-coupled Thread Model. Inf. Media Technol. 10(2): 233-245 (2015) - [j25]Arif Ullah Khan, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Efficient Design Exploration Framework of SW/HW Systems Based on Tightly-coupled Thread Model. IPSJ Trans. Syst. LSI Des. Methodol. 8: 38-50 (2015) - [j24]Surachai Thongkaew, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Dalvik Bytecode Acceleration Using Fetch/Decode Hardware Extension. J. Inf. Process. 23(2): 118-130 (2015) - [c30]Dongju Li, Hiroaki Kunieda, Supawan Kumpituck, Tsuyoshi Isshiki:
Online Detection of Spoof Fingers for Smartphone-Based Applications. HPCC/CSS/ICESS 2015: 1292-1297 - 2014
- [j23]Agus Bejo, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Retargeting Derivative-ASIP with Assembly Converter Tool. IEICE Trans. Inf. Syst. 97-D(5): 1188-1195 (2014) - [j22]Agus Bejo, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
A Method of Software Development Tool and Hardware Generation for ASIP with a Co-processor based on the Derivative ASIP Approach. J. Inf. Process. 22(2): 131-141 (2014) - [c29]Amr Fathy, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Custom instruction search for application specific instruction-set processor using guided simulated annealing. APCCAS 2014: 367-370 - [c28]Surachai Thongkaew, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Dalvik bytecode acceleration using Fetch/Decode Hardware Extension with hybrid Execution. APCCAS 2014: 375-378 - [c27]Hao Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Guanyu Zhu:
Distributed synchronization for message-passing based embedded multiprocessors. ASAP 2014: 82-83 - 2013
- [j21]Hsuan-Chun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A Design of High Performance Parallel Architecture and Communication for Multi-ASIP Based Image Processing Engine. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(6): 1222-1235 (2013) - [j20]Hsuan-Chun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Flexible and High Performance ASIPs for Pixel Level Image Processing and Two Dimensional Image Processing. Inf. Media Technol. 8(3): 626-636 (2013) - [j19]Hsuan-Chun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Flexible and High Performance ASIPs for Pixel Level Image Processing and Two Dimensional Image Processing. J. Inf. Process. 21(3): 552-562 (2013) - 2012
- [j18]SangWoo Sin, Ru Zhou, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Narrow Fingerprint Sensor Verification with Template Updating Technique. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(1): 346-353 (2012) - [j17]Hao Xiao, Tsuyoshi Isshiki, Arif Ullah Khan, Dongju Li, Hiroaki Kunieda, Yuko Nakase, Sadahiro Kimura:
A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer. IEICE Trans. Inf. Syst. 95-D(8): 2027-2038 (2012) - [j16]Hsuan-Chun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A High Level Design of Reconfigurable and High-Performance ASIP Engine for Image Signal Processing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(12): 2373-2383 (2012) - [j15]Hao Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Yuko Nakase, Sadahiro Kimura:
Optimized Communication and Synchronization for Embedded Multiprocessors Using ASIP Methodology. Inf. Media Technol. 7(4): 1331-1345 (2012) - [j14]Hao Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Yuko Nakase, Sadahiro Kimura:
Optimized Communication and Synchronization for Embedded Multiprocessors Using ASIP Methodology. IPSJ Trans. Syst. LSI Des. Methodol. 5: 118-132 (2012) - [c26]Mochamad Asri, Hsuan-Chun Liao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A reconfigurable ASIP-based approach for high performance image signal processing. APCCAS 2012: 611-614 - [c25]Hao Xiao, Tsuyoshi Isshiki, Hiroaki Kunieda, Yuko Nakase, Sadahiro Kimura:
Hybrid shared-memory and message-passing multiprocessor system-on-chip for UWB MAC. ICCE 2012: 658-659 - [c24]Hsuanchun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A Reconfigurable High Performance ASIP Engine for Image Signal Processing. IPDPS Workshops 2012: 368-375 - [c23]Hao Ni, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Robust Multiple Minutiae Partitions for Fingerprint Authentication. ISBAST 2012: 35-44 - [c22]Tsuyoshi Isshiki, Hao Xiao, Hsuan-Chun Liao, Dongju Li, Hiroaki Kunieda:
Application-specific Instruction-Set Processor design methodology for wireless image transmission systems. ISOCC 2012: 293-296 - 2011
- [j13]Hao Ni, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Unique Fingerprint-Image-Generation Algorithm for Line Sensors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(2): 781-788 (2011) - [j12]Yukun Liu, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Practical Orientation Field Estimation for Embedded Fingerprint Recognition Systems. IEICE Trans. Inf. Syst. 94-D(9): 1792-1799 (2011) - 2010
- [j11]Wei Tang, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Orientation Field Estimation for Embedded Fingerprint Authentication System. IEICE Trans. Inf. Syst. 93-D(7): 1918-1926 (2010) - [j10]Arif Ullah Khan, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A Unified Performance Estimation Method for Hardware and Software Components in Multiprocessor System-On-Chips. Inf. Media Technol. 5(4): 1097-1109 (2010) - [j9]Arif Ullah Khan, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A Unified Performance Estimation Method for Hardware and Software Components in Multiprocessor System-On-Chips. IPSJ Trans. Syst. LSI Des. Methodol. 3: 194-206 (2010) - [c21]Yukun Liu, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
A novel similarity measurement for minutiae-based fingerprint verification. BTAS 2010: 1-6 - [c20]Ru Zhou, SangWoo Sin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Ultra fast fingerprint indexing for embedded system. SoCPaR 2010: 87-92
2000 – 2009
- 2009
- [j8]Sumek Wisayataksin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Entropy Decoding Processor for Modern Multimedia Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(12): 3248-3257 (2009) - [c19]Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Toshio Isomura, Kazuo Satou:
Trace-driven workload simulation method for Multiprocessor System-On-Chips. DAC 2009: 232-237 - 2008
- [j7]Mohammad Zalfany Urfianto, Tsuyoshi Isshiki, Arif Ullah Khan, Dongju Li, Hiroaki Kunieda:
A Multiprocessor SoC Architecture with Efficient Communication Infrastructure and Advanced Compiler Support for Easy Application Development. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(4): 1185-1196 (2008) - [j6]Sumek Wisayataksin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Low Cost SoC Design of H.264/AVC Decoder for Handheld Video Player. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(4): 1197-1205 (2008) - [j5]Mohammad Zalfany Urfianto, Tsuyoshi Isshiki, Arif Ullah Khan, Dongju Li, Hiroaki Kunieda:
Decomposition of Task-Level Concurrency on C Programs Applied to the Design of Multiprocessor SoC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(7): 1748-1756 (2008) - [c18]Jianjiang Ceng, Jerónimo Castrillón, Weihua Sheng, Hanno Scharwächter, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tsuyoshi Isshiki, Hiroaki Kunieda:
MAPS: an integrated framework for MPSoC application parallelization. DAC 2008: 754-759 - 2007
- [c17]Sumek Wisayataksin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
H.264/AVC decoder SoC towards the low cost mobile video player. SoCC 2007: 151-154 - 2005
- [j4]Andy Surya Rikin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
A Fingerprint Matching Using Minutia Ridge Shape for Low Cost Match-on-Card Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(5): 1305-1312 (2005) - [c16]Jinqing Qi, Desiree Abdurrachim, Dongju Li, Hiroaki Kunieda:
A Hybrid Method for Fingerprint Image Quality Calculation. AutoID 2005: 124-129 - [c15]Trio Adiono, Dani Fitriyanto, Akhmad Mulyanto, Sumek Wisayataksin, Kazumasa Takeichi, Dongju Li, Tati Rajab Mengko, Hiroaki Kunieda:
New Macroblock Engine Architecture for Video Processing. MVA 2005: 68-71 - 2003
- [j3]Gijun Idei, Hiroaki Kunieda:
A false-lock-free clock/data recovery PLL for NRZ data using adaptive phase frequency detector. IEEE Trans. Circuits Syst. II Express Briefs 50(11): 896-900 (2003) - 2002
- [j2]Trio Adiono, Tsuyoshi Isshiki, Chawalit Honsawek, Kazuhito Ito, Dongju Li, Hiroaki Kunieda:
New Rate Control Method with Minimum Skipped Frames for Very Low Delay in H.263+ Codec. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(6): 1396-1407 (2002) - [c14]Trio Adiono, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A new methodology for low delay real-time videophone software architecture design. APCCAS (2) 2002: 269-273 - [c13]Tsuyoshi Isshiki, Akihisa Ohta, T. Watanabe, T. Nakada, K. Akahane, I. Sisla, Dongju Li, Hiroaki Kunieda:
High density bit-serial FPGA with LUT embedding shift register function. APCCAS (1) 2002: 475-480 - [c12]Andy Surya Rikin, Yiwen Wang, T. Nakada, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda:
Realization of fingerprint identification module on DSP board. APCCAS (1) 2002: 509-512 - [c11]Trio Adiono, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Efficient method for face region quality enhancement in low bit rate video coding. APCCAS (1) 2002: 549-553 - 2001
- [c10]Tsuyoshi Isshiki, Chawalit Honsawek, Trio Adiono, Kazuhito Ito, Tomohiko Ohtsuka, Dongju Li, Hiroaki Kunieda:
H.263+ Video Encoder/Decoder LSI Featuring System-MSPA Architecture and Improved Rate Control Method. ISAS-SCI (1) 2001: 195-200 - 2000
- [j1]Tsuyoshi Isshiki, Makoto Ishikawa, Hiroaki Kunieda:
Cost-effective shadowing method using the ED-buffer on an adaptive light cube. Vis. Comput. 16(7): 453-468 (2000)
1990 – 1999
- 1999
- [c9]Li Jiang, Dongju Li, Shintaro Haba, Chawalit Honsawek, Hiroaki Kunieda:
Motion Estimator LSI for MPEG2 High Level Standard. ASP-DAC 1999: 41-44 - [c8]Tsuyoshi Isshiki, Hiroaki Kunieda:
Efficient anti-aliasing algorithm for computer generated images. ISCAS (4) 1999: 532-535 - 1998
- [c7]Tsuyoshi Isshiki, Takenobu Shimizugashira, Akihisa Ohta, Imanuddin Amril, Hiroaki Kunieda:
FPGA for High-Performance Bit-Serial Pipeline Datapath. ASP-DAC 1998: 331-332 - [c6]Li Jiang, Dongju Li, Shintaro Haba, Chawalit Honsawek, Hiroaki Kunieda:
Towards one chip HDTV MPEG2 encoder LSI. CICC 1998: 173-176 - [c5]Akihisa Ohta, Tsuyoshi Isshiki, Hiroaki Kunieda:
New FPGA Architecture for Bit-Serial Pipeline Datapath. FCCM 1998: 58-67 - [c4]Tsuyoshi Isshiki, Takenobu Shimizugashira, Akihisa Ohta, Imanuddin Amril, Hiroaki Kunieda:
A New FPGA Architecture for High-Performance bit-Serial Pipeline Datapath (Abstract). FPGA 1998: 255 - 1997
- [c3]Tsuyoshi Isshiki, Wayne Wei-Ming Dai, Hiroaki Kunieda:
Bit-serial pipeline synthesis and layout for large-scale configurable systems. ASP-DAC 1997: 441-446 - [c2]Kazuhito Ito, Takenobu Shimizugashira, Hiroaki Kunieda:
High speed bit-serial parallel processing on array architecture. ASP-DAC 1997: 667-668 - 1995
- [c1]Hiroaki Kunieda, Yusong Liao, Dongju Li, Kazuhito Ito:
Automatic design for bit-serial MSPA architecture. ASP-DAC 1995
Coauthor Index
[j34] [j33] [j32] [j31] [j30] [j29] [j28] [c31] [j27] [j26] [j25] [j24] [c30] [j23] [j22] [c29] [c28] [c27] [j21] [j20] [j19] [j18] [j17] [j16] [j15] [j14] [c26] [c25] [c24] [c23] [c22] [j13] [j12] [j11] [j10] [j9] [c21] [c20] [j8] [c19] [j7] [j6] [j5] [c18] [c17] [j4] [j2] [c14] [c13] [c12] [c11] [c10] [j1] [c8] [c7] [c5] [c4] [c3]
[j34] [j33] [j32] [j31] [j29] [c31] [j27] [j26] [j25] [j24] [c30] [j23] [j22] [c29] [c28] [c27] [j21] [j20] [j19] [j18] [j17] [j16] [j15] [j14] [c26] [c24] [c23] [c22] [j13] [j12] [j11] [j10] [j9] [c21] [c20] [j8] [c19] [j7] [j6] [j5] [c17] [j4] [c16] [c15] [j2] [c14] [c13] [c12] [c11] [c10] [c9] [c6] [c1]
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