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ISCAS 1993: Chicago, Illinois, USA - Volume 3
- 1993 IEEE International Symposium on Circuits and Systems, ISCAS 1993, Chicago, Illinois, USA, May 3-6, 1993. IEEE 1993, ISBN 0-7803-1281-3
High Speed VLSI Systems: Timing and Clock Distribution
- Eby G. Friedman:
Clock Distribution Design in VLSI Circuits. An Overview. ISCAS 1993: 1475-1478 - P. R. Mukund, V. Mukund, Charles E. Noon:
Signal Routing with Temporal Constraints. ISCAS 1993: 1479-1482 - Tolga Soyata, Eby G. Friedman, James H. Mulligan Jr.:
Integration of Clock Skew and Register Delays into a Retiming Algorithm. ISCAS 1993: 1483-1486 - Takayasu Sakurai:
High-Speed Circuit Design with Scaled-Down MOSFET's and Low Supply Voltage. ISCAS 1993: 1487-1490 - Razak Hossain, Leszek D. Wronski, Alexander Albicki:
Double Edge Triggered Devices: Speed and Power Considerations. ISCAS 1993: 1491-1494 - Tam Anh Chu:
On the Specification and Synthesis of Hazard-free Asynchronous Control Circuits. ISCAS 1993: 1495-1498
VLSI Testing
- Abdel-Fattah Yousif, Jun Gu:
An Efficient Global Search Algorithm for Test Generation. ISCAS 1993: 1499-1502 - Weitong Chuang, Ibrahim N. Hajj:
Fast Mixed-Mode Simulation for Accurate MOS Bridging Fault Detection. ISCAS 1993: 1503-1506 - Antonio Lioy, Massimo Poncino:
On the Resetability of Synchronous Sequential Circuits. ISCAS 1993: 1507-1510 - Soo Young Lee, Kewal K. Saluja:
Efficient Test Vectors for ISCAS Sequential Benchmark Circuits. ISCAS 1993: 1511-1514 - Cheng-Juei Wu, Wen-Ben Jone:
On Multiple Fault Detection of Parity Checkers. ISCAS 1993: 1515-1518 - Jar-Shone Ker, Yau-Hwang Kuo, Bin-Da Liu:
Functional Text Pattern Generation for Asynchronous Circuits. ISCAS 1993: 1519-1522 - Giacomo Buonanno, Franco Fummi, Donatella Sciuto:
Functional Testing and Constrained Synthesis of Sequential Architectures. ISCAS 1993: 1523-1526 - Bernd K. Koch, Klaus D. Müller-Glaser:
An Examination of Feedback Bridging Faults in Digital CMOS Circuits. ISCAS 1993: 1527-1530
Model Extraction, Interconnects & MMIC's
- Dae-Hyung Cho, S. M. Kang:
An Accurate AC Characteristic Table Look-up Model for VLSI Analog Circuits Simulation Applications. ISCAS 1993: 1531-1534 - Chang-hoon Choi, Jin-Kyu Park, Yeong-Gil Kim, Kyung-Ho Kim, Sang-Hoon Lee:
New Model Parameter Extraction Environment for the Submicron Circuit Models. ISCAS 1993: 1535-1538 - Sherif H. K. Embabi, R. Damodaran, R. Bhagwan, Don E. Ross:
An Accurate Delay Model for BiCMOS Gates and Off-chip Drivers. ISCAS 1993: 1539-1542 - J. Richard Griffith, Qi-Jun Zhang, Michel S. Nakhla:
Parallel Time Domain Analysis and Optimization of Distributed VLSI Interconnects. ISCAS 1993: 1543-1546 - Dimitri Kuznetsov, José E. Schutt-Ainé:
Difference Model Approach for the Transient Simulation of Transmission Lines. ISCAS 1993: 1547-1550 - Corneliu A. Marinov, Pekka Neittaanmäki:
Bounds for Distributed Parameter Trees. ISCAS 1993: 1551-1554 - Nebil Tanzi, Thomas T. Y. Wong:
Computer-aided Sensitivity Analysis of Transistor Microwave Oscillators. ISCAS 1993: 1555-1558
VLSI Signal and Image Processing Architectures
- Yasushi Iwata, Masayuki Kawamata, Tatsuo Higuchi:
Design of Fine Grain VLSI Array Processor for Real-time 2-D Digital Filtering. ISCAS 1993: 1559-1562 - Ming-Hwa Sheu, Jhing-Fa Wang, Jau-Yien Lee, Lian-Ying Liu:
An Expandable Chip Desing for Gray-scale Morphological Operations. ISCAS 1993: 1563-1566 - Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen:
Novel Systolic Array Design for the Discrete Hartley Transform with High Throughput Rate. ISCAS 1993: 1567-1570 - Jiun-In Guo, Chi-Min Liu, Chein-Wei Jen:
A CORDIC-based VLSI Array for Computing 2-D Discrete Hartley Transform. ISCAS 1993: 1571-1574 - Yu-Sheng Lin, Jiun-In Guo, C. Bernard Shung, Chein-Wei Jen:
A Multi-phase Shared Bus Structure for the Fast Fourier Transform. ISCAS 1993: 1575-1578 - Emmanuel Boutillon, Nicolas Demassieux:
A Generalized Precompiling scheme for Surviving Path Memory Management in Viterbi decoders. ISCAS 1993: 1579-1582 - Klaus Gaedke, Jens Franzen, Peter Pirsch:
A Fault-tolerant DCT-Architecture Based on Distributed Arithmetic. ISCAS 1993: 1583-1586 - Ming-Hwa Sheu, Jau-Yien Lee, Jhing-Fa Wang, An-Nan Suen, Lian-Ying Liu:
A High Throughput-Rate Architecture for 8*8 2-D DCT. ISCAS 1993: 1578-1590 - Matthias Sauer, Ernst G. Bernard, Josef A. Nossek:
Block Sequential CORDIC Architectures. ISCAS 1993: 1591-1594
Testability and BIST
- João C. Vital, José E. Franca, Nuno S. Silva:
Fully-digital Testability of a High-speed Conversion System. ISCAS 1993: 1595-1598 - Michael F. Toner, Gordon W. Roberts:
Towards Built-In-Self-Test for SNR Testing of a Mixed-Signal IC. ISCAS 1993: 1599-1602 - Maria J. Avedillo, José M. Quintana, José L. Huertas:
Easily Testable PLA-based FSMS. ISCAS 1993: 1603-1606 - Geetani Edirisooriya, Samantha Edirisooriya, John P. Robinson:
On the Performance of Augmented Signature Testing. ISCAS 1993: 1607-1610 - Mohamed Jamoussi, Bozena Kaminska:
A Functional-level Testability Evaluation Using a New M-Testability. ISCAS 1993: 1611-1614 - Chiyuan Chang, Chauchin Su:
A Universal BIST Methodology for Interconnects. ISCAS 1993: 1615-1618 - Naim Ben-Hamida, Bozena Kaminska, Yvon Savaria:
Initiability: A Measure of Sequential Testability. ISCAS 1993: 1619-1622 - Kaushik Roy:
On Fault Modeling and Fault Tolerance of Antifuse Based FPGAs. ISCAS 1993: 1623-1626
Circuit Simulation
- Jirí Vlach, Ajoy Opal, Jacek Wojciechowski:
Simulation of Networks with Inconsistent Initial Conditions. ISCAS 1993: 1627-1630 - H. Song, Dileep A. Divekar, L. Mills, P. Wang:
A Method for Improving the Efficiency of Simulating Large Electronic Circuits. ISCAS 1993: 1631-1634 - Mi-Chang Chang, Jue-Hsien Chern, Ping Yang:
Efficient and Robust Path Tracing Algorithm for DC Convergence Problem. ISCAS 1993: 1635-1638 - Lena Peterson, Sven Mattisson:
Dynamic Partitioning for Concurrent Waveform Relaxation-based Circuit Simulation. ISCAS 1993: 1639-1642 - Shawki Areibi, Anthony Vannelli:
Circuit Partitioning Using a Tabu Search Approach. ISCAS 1993: 1643-1646 - Tadashi Matsumoto, Tetsuya Sakabe, Kohkichi Tsuji:
On Parallel Symbolic Analysis of Large Networks and Systems. ISCAS 1993: 1647-1650 - Marwan Hassoun, Prakash Atawale:
Hierarchical Symbolic Cirucit Analysis of Large-scale Networks on Multi-processor Systems. ISCAS 1993: 1651-1654 - Roman V. Dmytryshyn:
The Use of Symbolic-numerical Methods for Electronic Circuit Analysis. ISCAS 1993: 1655-1657
High-Level DSP Synthesis
- Frederico Buchholz Maciel, Yoshikazu Miyanaga, Koji Tochinai:
A Performance-driven Approach to the High-level Synthesis of DSP Algorithms. ISCAS 1993: 1658-1661 - Ching-Yi Wang, Keshab K. Parhi:
Loop List Scheduler for DSP Algorithms under Resource Consraints. ISCAS 1993: 1662-1665 - Said Amellal, Bozena Kaminska:
Scheduling of a Control and Data Flow Graph. ISCAS 1993: 1666-1669 - William Robertson, S. Periyalwar, William J. Phillips:
RTL Synthesis for Systolic Arrays. ISCAS 1993: 1670-1673 - Samir Lejmi, Bozena Kaminska, Edouard Wagneur:
Resynthesis and Retiming of Synchronous Sequential Cirucits. ISCAS 1993: 1674-1677 - Michael R. Rhinehart, John A. Nestor:
SALSE II: A Fast Transformational Scheduler for High-level Synthesis. ISCAS 1993: 1678-1681 - Ian G. Harris, Alex Orailoglu:
Intertwined Scheduling, Module Selection and Allocation in Time-and-Area. ISCAS 1993: 1682-1685 - Ruchir Puri, Jun Gu:
Signal Transition Graph Constraints for Speed-independent Ciruit Synthesis. ISCAS 1993: 1686-1689
Logic Verification and Synthesis
- Pi-Yu Chung, Ibrahim N. Hajj, Janak H. Patel:
Efficient Variable Ordering Heuristics for Shared ROBDD. ISCAS 1993: 1690-1693 - Bogdan J. Falkowski:
An Algorithm for the Calculation of Generalized Walsh Transform of Boolean Functions. ISCAS 1993: 1694-1697 - Bogdan J. Falkowski:
Calculation of Rademacher-Walsh Spectral Coefficients for Systems of Completely and Incompletely Specified Boolean Functions. ISCAS 1993: 1698-1701 - S. Summerfield:
Design Methodology of VLSI with Multiple Valued Logic. ISCAS 1993: 1702-1705 - Chauchin Su, Jyrghong Wang:
ECCSyn: a Synthesis Tool for ECC Circuits. ISCAS 1993: 1706-1709 - Elizabeth J. Brauer, Sung-Mo Kang:
Functional Verification of ECL Circuits Including Voltage Regulators. ISCAS 1993: 1710-1713 - Michael Ogbonna Esonu, Dhamin Al-Khalili, Côme Rozon:
Fault Characterization and Testability Analysis of Emitter Coupled Logic and Comparison with CMOS & BiCMOS Circuits. ISCAS 1993: 1714-1717 - Ion Constatin Tesu, Florentin Dartu:
Piecewise Linear Macromodels for Elementary Logic and Fuzzy Circuits. ISCAS 1993: 1718-1721
Parallel DSP Architectures
- Xiaqi Liu, Hong Fan:
A Spatial Schur Type LS Algorithm and Its Pyramid Systolic Array Implementation. ISCAS 1993: 1722-1725 - Scott T. Campbell, Soon Myoung Chung:
Video Decimator Design Using A Systolic Array. ISCAS 1993: 1726-1729 - Haris M. Stellakis, Elias S. Manolakos:
Time- and Order-recursive Estimation of Higher Order Moments in a Linear Array. ISCAS 1993: 1730-1733 - Keshab K. Parhi, Takao Nishitani:
Folded VLSI Architectures for Discrete Wavelet Transforms. ISCAS 1993: 1734-1737 - Dimitrios Soudris, P. D. Georgakopoulos, Constantinos E. Goutis:
A Systematic Methodology for Designing Multilevel Systolic Architectures. ISCAS 1993: 1738-1741 - Jiann-Jenn Wang, Chein-Wei Jen:
A High Throughput Systolic Design for QR Algorithm. ISCAS 1993: 1742-1745 - L. Wang, Iiro Hartimo:
Systolic Array for 2-D Circular Convolution Using the Chinese Remainder Theorem. ISCAS 1993: 1746-1749 - Peter Pirsch, Winfried Gehrke, Richard Hoffer:
A Hierarchical Multiprocessor Achitecture for Video Coding Applications. ISCAS 1993: 1750-1753 - Nobuyuki Yagi, Kazuo Fukui, Kazumasa Enami, Nobuyuki Sasaki, Hidetaka Saitou, Yuji Konno, Ryuichiro Tomita:
A Programmable Video Signal Multi-processor for HDTV Signals. ISCAS 1993: 1754-1757
VLSI Floor Planning and Partitioning
- Mitsuho Seki, Shun'ichi Kobayashi, Munehiro Takubo, Kazuyoshi Kurosawa:
A New Floorplan Simultaneously Placing Blocks over Two Logic Layers for Sea-of-gate Gate Arrays. ISCAS 1993: 1758-1761 - Kai Wang, Wai-Kai Chen:
A Class of Zero Wasted Area Floorplan for VLSI Design. ISCAS 1993: 1762-1765 - Sharat Prasad, Paul Kollaritsch, P. Anirudhan, D. K. Hwang, Steve Lusky, R. Farrow:
Efficient Floorplan Enumeration Using Dynamic Programming. ISCAS 1993: 1766-1769 - Nasir-ud-Din Gohar, Peter Y. K. Cheung:
A New Schematic-driven Floorplanning Algorithm for Analog Cell Layout. ISCAS 1993: 1770-1773 - Cheng-Hsi Chen, Ioannis G. Tollis:
A Fast Parallel Algorithm for Slicing Floorplans. ISCAS 1993: 1774-1777 - Yao-Ping Chen, Ting-Chi Wang, D. F. Wong:
A Graph Partitioning Problem for Multiple-chip Design. ISCAS 1993: 1778-1781 - Malgorzata Chrzanowska-Jeske, Steffen Goller, Ingo Schäfer:
An Architecture-driven Approach for the Fitting Problem in an Application-specific EPLD. ISCAS 1993: 1782-1785
Statistical Design
- Sachin S. Sapatnekar, Pravin M. Vaidya, Sung-Mo Kang:
Feasible Region Approximation Using Convex Polytopes. ISCAS 1993: 1786-1789 - Xiangming Xiao, Robert Spence:
Speeding Design Centering By Reusing Simulated Data. ISCAS 1993: 1790-1792 - Richard M. M. Chen, Wilson W. Chan:
An Efficient Tolerance Design Procedure for Yield Maximization Using Optimzation Techniques and Neural Network. ISCAS 1993: 1793-1796 - Yeong-Gil Kim, Jai-Hoon Lee, Kyung-Ho Kim, Sang-Hoon Lee:
SENSATION: A New Environment for Automatic Circuit Optimization and Statistical Analysis. ISCAS 1993: 1797-1801 - Hua Su, Mohammed Ismail, Christopher Michael:
Yield Optimzation of Analog MOS Integrated Including Transistor Mismatch. ISCAS 1993: 1801-1804 - Jian Chen, M. A. Styblinski:
A Systematic Approach of Statistical Modeling and Its Application to CMOS Circuits. ISCAS 1993: 1805-1808 - Ming Qu, M. A. Styblinski:
A Heursitsic Global Optimization Algorithm and Its Application to CMOS Circuit Variability Minimization. ISCAS 1993: 1809-1812 - B. R. S. Rodrigues, M. A. Styblinski:
Adaptive Hierarchical Multi-objective Fuzzy Optimization for Circuit Design. ISCAS 1993: 1813-1816
Computer Arithmetic
- Min C. Park, Bang W. Lee, Gwang Moon Kim, Dong H. Kim:
Compact and Fast Multiplier Using Dual Array Tree Structure. ISCAS 1993: 1817-1820 - Seon Wook Kim, Thanos Stouraitis, Alexander Skavantzos:
Full Adder-based Inner Product Step Processors for Residue and Quadratic Residue Number Systems. ISCAS 1993: 1821-1824 - Farhad Fuad Islam, Keikichi Tamaru:
An Architecture for Intermediate Area-time Complexity Multiplier. ISCAS 1993: 1825-1828 - Stefan Wolter, Andreas Schubert, Holger Matz, Rainer Laur:
On the Comparison Between Architectures for the Implementation of Distributed Arithmetic. ISCAS 1993: 1829-1832 - Vassilis Paliouras, Dimitrios Soudris, Thanos Stouraitis:
Methodology for the Design of Signed-digit DSP Processors. ISCAS 1993: 1833-1836 - Zhongde Wang, Graham A. Jullien, William C. Miller, June Wang:
New Concepts for the Design of Carry Lookahaead Adders. ISCAS 1993: 1837-1840 - Ishaq H. Unwala, Earl E. Swartzlander Jr.:
Superpipelined Adder Designs. ISCAS 1993: 1841-1844
VLSI Layout Styles, Compaction, and Routing
- Karol Doerffer, Attila T. Téby, Oskar Anton, Dieter A. Mlynski:
KLaGen - A Generator of Static CMOS-cell Layout from Circuit Schematics. ISCAS 1993: 1845-1848 - Lih-Yang Wang, Yen-Tai Lai, Bin-Da Liu, Tin-Chung Chang:
Layout Compaction with Minimzed Delay Bound on Timing Critical Paths. ISCAS 1993: 1849-1852 - Oskar Anton, Karol Doerffer, Dieter A. Mlynski:
Automatic Design of Transparent Standard Cells with TRANSCAD II. ISCAS 1993: 1853-1856 - Charles Wiley, K. M. Lau, Stephen A. Szygenda:
m3D: A Multidimensional Dynamic Configurable Router. ISCAS 1993: 1857-1860 - Siddharth Bhingarde, Anand Panyam, Naveed A. Sherwani:
Efficient Over-the-cell Routing Algorithm for General Middle Terminal Model. ISCAS 1993: 1861-1864 - Charles J. Alpert, Jason Cong, Andrew B. Kahng, Gabriel Robins, Majid Sarrafzadeh:
Minimum Density Interconneciton Trees. ISCAS 1993: 1865-1868 - Charles J. Alpert, T. C. Hu, Jen-Hsin Huang, Andrew B. Kahng:
A Direct Combination of the Prim and Dijkstra Constructions for Improved Performance-driven Global Routing. ISCAS 1993: 1869-1872 - Yu Hen Hu, Chi-Yu Mao:
Solving Gate-Matrix Layout Problems by Simulated Evolution. ISCAS 1993: 1873-1876
Poster: VLSI and Parallel Processing
- Hazem H. Ali, Mona E. Zaghloul:
VLSI Implementation of an Associative Memory Using Temporal Relations. ISCAS 1993: 1877-1880 - D. K. Harris-Dowsett, S. Summerfield:
Low Latency Architectures for Wave Digital Filters. ISCAS 1993: 1881-1884 - S. C. Chan, Chi-Wah Kok, S. W. Chau:
Codebook Generation and Search Algorithm for Vector Quantization Using Arbitrary Hyperplanes. ISCAS 1993: 1885-1888 - Shawmin Lei:
Finite Word-length Effects on Arithmetic Codes. ISCAS 1993: 1889-1892 - Ghassan Y. Yacoub, Tarun Soni, Walter H. Ku:
A Compact Array Processor Based on Self-timed Simultaneous Bidirectional Signalling. ISCAS 1993: 1893-1896 - Eel-Wan Lee, Jae-Hee Won, Soo-Ik Chae:
Modified Probabilistic RAM Archticture for VLSI Implementation of a Backpropagation Learning Algorithm. ISCAS 1993: 1897-1900 - Laurent Letellier, Didier Juvin, Jean-Luc Basille, Jean Rebillat:
High Performance Graphics on a SIMD Linear Processor Array. ISCAS 1993: 1901-1904 - Hong-Yi Huang, Chung-Yu Wu:
Redundant Algebra and Integrated Circuit Implementation of Ternary Logic and Their Applications. ISCAS 1993: 1905-1908 - Clifford Sze-Tsan Choy, Wan-Chi Siu:
Generation of Chain-coded Contours and Contours Inclusion Relationship Under Multiprocessor Environment. ISCAS 1993: 1909-1912 - Crystal J. Su, Kai-Pui Lam:
Digital Circuit Implementation of a Continuous-time Inference Network for the Transitive Closure Problem. ISCAS 1993: 1913-1916 - Spiridon Nikolaidis, D. E. Metafas, Constantinos E. Goutis:
CORDIC Based Pipeline Architecture for All-pass Filters. ISCAS 1993: 1917-1920 - Tsuyoshi Kawaguchi:
Static Allocation of a Task Tree onto a Linear Array. ISCAS 1993: 1921-1924 - Yi-Min Wang:
Reducing Message Logging Overhead for Log-based Recovery. ISCAS 1993: 1925-1928 - Stephen P. S. Lam:
A New Approach to Reconfigure Faulty Systolic Array. ISCAS 1993: 1929-1932 - Moon Key Lee, Byeong Yoon Choi, Kwang Yub Lee, Seong Ho Lee:
Data-stationary Controller for 32-bit Application-specific RISC. ISCAS 1993: 1933-1936 - Young-Hyun Jun, Weon-Hwa Jeong, Jong-Hoon Park, Tae-Hoon Kim, Seong-Wook Kim, Jae-Sik Lee, Seong-Jin Jang, Chang-Man Khang, Hee-Gook Lee:
A New Colum Redundancy Scheme For Fast Access Time of 64-Mb DRAM. ISCAS 1993: 1937-1940 - J. David Narkiewicz, Wayne P. Burleson:
Rank-order Filtering Algorithms: A Comparison of VLSI Implementations. ISCAS 1993: 1941-1944 - Gennady Feygin, Paul Chow, P. Glenn Gulak, John Chappel, Grant Goodes, Oswin Hall, Ahmad Sayes, Satwant Singh, Michael B. Smith, Steven J. E. Wilton:
A VLSI Implementation of a Cascade Viterbi Decoder with Traceback. ISCAS 1993: 1945-1948 - Fida H. Chishti, Anthony R. Clare, Moe Razaz:
Parallel Solution of Symmetric Banded Systems on Transputers. ISCAS 1993: 1949-1952 - Belle W. Y. Wei, Richard Tarver, Jong-Seop Kim, Kevin Ng:
A Single Chip Lempel-Ziv Data Compressor. ISCAS 1993: 1953-1955 - Naresh R. Shanbhag, Keshab K. Parhi:
A Pipelined Adaptive Differential Vector Quantizer for Low-power Speech Coding Applications. ISCAS 1993: 1956-1958 - Kalavai J. Raghunath, Keshab K. Parhi:
High Speed RLS Using Scaled Tangent Rotations (STAR). ISCAS 1993: 1959-1962 - Robert Adams, Tom Kwan:
A Monolithic Asynchronous Sample-Rate Converter for Digital Audio. ISCAS 1993: 1963-1966 - Mark W. Mao, B. Y. Chen, James B. Kuo:
A Coded Block Neural Network System Suitable for VLSI Implementation Using an Adaptive Learning-rate Epoch-based Back Propagation Technique. ISCAS 1993: 1967-1970 - Hakim Khali, Jean-Louis Houle, Yvon Savaria:
A High Speed Parallel Structure for the Basic Wavelet Transform Algorithm. ISCAS 1993: 1971-1974 - Ulrich Ramacher, Jörg Beichter, Nico Brüls, Elisabeth Sicheneder:
Architecture and VLSI Design of a VLSI Neural Signal Processor. ISCAS 1993: 1975-1978 - K. C. Lo, Alan Purvis:
Parallel Random Sampling with Multiprocessor System. ISCAS 1993: 1979-1982 - Karol Doerffer, Oskar Anton, Dieter A. Mlynski:
Time Efficient Method for MOS Circuit Extraction. ISCAS 1993: 1983-1986 - Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya:
Test Generation for BiCMOS Circuits. ISCAS 1993: 1987-1990 - Salil Raje, Majid Sarrafzadeh:
GEM: A Geometric Algorithm for Scheduling. ISCAS 1993: 1991-1994 - Suresh Rai, Jerry L. Trahan, Thomas Smailus:
Processor Allocation in Faulty Hypercube Multiprocessors. ISCAS 1993: 1995-1998 - K. J. Ray Liu, An-Yeu Wu:
A Multi-layer 2-D Adaptive Filtering Architecture Based on McClellan Transformation. ISCAS 1993: 1999-2002 - Chan S. Kim, Sang W. Song, Man Y. Kim, Young T. Han, Sang A. Kang, Bang W. Lee:
200 Mega Pixel Rate IDCT Processor for HDTVC Applications. ISCAS 1993: 2003-2006
VLSI Design and Applications
- Kenneth J. Schultz, P. Glenn Gulak:
A Logic-enhanced Memory for Digital Data Recovery Circuits. ISCAS 1993: 2007-2010 - Srini W. Seetharam, Gary J. Minden, Joseph B. Evans:
A Parallel SONET Scrambler/Descrambler Architecture. ISCAS 1993: 2011-2014 - Laurent Lemaitre, Marek J. Patyra:
Fuzzy Logic Functions Synthesis - A CMOS Current Mirror Based Solution. ISCAS 1993: 2015-2018 - Manuel J. Bellido, Manuel Valencia-Barrero, Antonio J. Acosta, Angel Barriga, José Luis Huertas, Rafael Domínguez-Castro:
A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch. ISCAS 1993: 2019-2022 - Mohamed Nekili, Yvon Savaria:
Parallel Regeneration of Interconnections in VLSI & ULSI Circuits. ISCAS 1993: 2023-2026 - James B. Kuo, Hung-Pin Chen, H. J. Huang:
A BiCMOS Dynamic Divider Circuit Using a Restoring Iterative Architecture with Carry Look Ahead for CPU VLSI. ISCAS 1993: 2027-2030 - D. Wagner, Subhash C. Kwatra, Mohsin M. Jamali:
A Single Chip High Data Rate QPSK Demodulator. ISCAS 1993: 2031-2034 - H. Kumar, Magdy A. Bayoumi, Akhilesh Tyagi, Nam Ling, R. Kalyan:
Parallel Implementation of a Cut and Paste Maze Routing Algorithm. ISCAS 1993: 2035-2038 - Kuei-Ann Wen, Shihn-Cheng Chen, Jo-Tan Yao:
Single Processor Design for 2-D Wiener Filter. ISCAS 1993: 2039-2042
VLSI Placement
- Ray-I Chang, Pei-Yung Hsiao:
Arbitrarily Sized Cell Placement by Self-organizing Neural Networks. ISCAS 1993: 2043-2046 - M. Kemal Unaltuna, Vijay Pitchumani:
Quadrisectioning Based Placement with a Normalized Mean Field Neural Network. ISCAS 1993: 2047-2050 - M. Razaz:
A Fuzzy C-means Clustering Placement Algorithm. ISCAS 1993: 2051-2054 - Achim G. Hoffmann:
A New Strategy for Library-independent Layout Design. ISCAS 1993: 2055-2058 - Shin'ichi Wakabayashi, Hiroshi Kusumoto, Hideki Mishima, Tetsushi Koide, Noriyoshi Yoshida:
Gate Array Placement Based on Mincut, Partitioning with Path Delay Constraints. ISCAS 1993: 2059-2062 - Bernd E. Freier:
Reducing the Physical Design Cycle by Means of Topological Placement with Hard Timing Restraints. ISCAS 1993: 2063-2066 - Chen-Xiong Zhang:
Timing-, Heat- and Area-driven Placement Using Self-organizing Semantic Maps. ISCAS 1993: 2067-2070 - E. I. Horvath:
A Parallel Force Direct Based VLSI Standard Cell Placement Algorithm. ISCAS 1993: 2071-2074
Poster: Computer-Aided Analysis, Design and Simulation
- Christopher M. Wolff, Jung-hui Cheng:
Symbolic Precompilation of Piecewise-linear Behavioral Models for Efficient Simulation of Dual Time Scale Systems. ISCAS 1993: 2075-2078 - Subbarao Somanchi, Mark L. Manwaring:
Analog Synthesis from Behavioural Descriptions. ISCAS 1993: 2079-2082 - Jorge Chávez Orzáez, Miguel Angel Aguirre Echánove, Antonio Jesús Torralba Silgado:
Analog Design Optimization : A Case Study. ISCAS 1993: 2083-2085 - Carlos A. Losada, David G. Haigh, Paul M. Radmore:
A Systematic Method for Nonlinear Analysis of a Class of FET Circuits. ISCAS 1993: 2086-2089 - K. Wayne Current, James F. Parker, Wes Hardaker:
Block-Diagram-Level Design Capture, Functional Simulation, and Layout Assembly of Analog CMOS ICs. ISCAS 1993: 2090-2093 - Mineo Kaneko, Masahiro Masuda, Tomohiro Hayashi:
A Novel Capacitor Placement Strategy in ASCCOT: Automatic Layouter for Switched Capacitor Circuits. ISCAS 1993: 2094-2097 - Valentino Liberali, Enrico Malavasi, Davide Pandini:
Automatic Generation of Transistor Stacks for CMOS Analog Layout. ISCAS 1993: 2098-2102 - N. S. Nagaraj:
A New Optimizer for Performance Optimization of Integrated Circuits by Device Sizing. ISCAS 1993: 2102-2105 - Kumar Venkat:
Generalized Delay Optimization of Resistive Interconnections through an Extension of Logical Effort. ISCAS 1993: 2106-2109 - Brian S. Cherkauer, Eby G. Friedman:
The Effects of Channel Width Tapering on the Power Dissipation of Serially Connected MOSFETs. ISCAS 1993: 2110-2113 - Perng-Shyong Lin, Charles A. Zukowski:
Jitter Due to Signal History in Digital Logic Circuits and Its Control Strategies. ISCAS 1993: 2114-2117 - Qiuting Huang:
Speed Optimization of Edge-Triggered Nine-Transistor D-Flip-Flops for Gigahertz Single-Phase Clocks. ISCAS 1993: 2118-2121 - José E. Schutt-Ainé, Kyung-soo Oh:
Modeling Interconnections with Nonlinear Discontinuities. ISCAS 1993: 2122-2124 - D. S. Gao, Dian Zhou:
Propagation Delay in RLC Interconnection Networks. ISCAS 1993: 2125-2128 - Dian Zhou, S. Su, F. Tsui, D. S. Gao, Jason Cong:
A Two-pole Circuit Model for VLSI High-speed Interconnection. ISCAS 1993: 2129-2132 - Richard M. M. Chen, Xing Dong Jia:
A Technique to Improve the Convergency Speed of Relaxation-based Simulations in Tightly Coupled Circuits. ISCAS 1993: 2133-2136 - Hans Fleurkens, Pim H. W. Buurman:
Flexible Mixed-mode and Mixed-level Simulation. ISCAS 1993: 2137-2140 - Domenico Biey, Mario Biey, Maurizio Molinaro:
SCANSA: A Computer Program for the Statistical Analysis of Switched Capacitor Networks. ISCAS 1993: 2141-2144 - Songxin Qi, Quanrang Yang:
An Improved Random Walk Approach for Yield Optimization. ISCAS 1993: 2145-2147
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