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DFTS 2015: Amherst, MA, USA
- 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015. IEEE Computer Society 2015, ISBN 978-1-4799-8606-4
- Salin Junsangsri, Fabrizio Lombardi, Jie Han:
Evaluating the impact of spike and flicker noise in phase change memories. 1-6 - Jimson Mathew, Yuamfam Yang, M. Ottavia, T. Browna, A. Zampettia, A. Di Carloa, A. M. Jabirb, Dhiraj K. Pradhan:
Fault detection and repair of DSC arrays through memristor sensing. 7-12 - Hyunseung Han, Joon-Sung Yang:
Asymmetric ECC organization in 3D-memory via spare column utilization. 13-16 - Adedotun A. Adeyemo, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan:
Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays. 17-20 - Badrun Nahar, Brett H. Meyer:
RotR: Rotational redundant task mapping for fail-operational MPSoCs. 21-28 - Jerry Backer, David Hély
, Ramesh Karri
On enhancing the debug architecture of a system-on-chip (SoC) to detect software attacks. 29-34 - Sami Teravainen, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen
Software-based on-chip thermal sensor calibration for DVFS-enabled many-core systems. 35-40 - Glenn H. Chapman, Rahul Thomas, Rohan Thomas, Klinsmann J. Coelho Silva Meneses, Tommy Q. Yang, Israel Koren, Zahava Koren:
Single Event Upsets and Hot Pixels in digital imagers. 41-46 - Manolis Kaliorakis, Sotiris Tselonis, Athanasios Chatzidimitriou, Dimitris Gizopoulos:
Accelerated microarchitectural Fault Injection-based reliability assessment. 47-52 - Seyyed Hasan Mozafari, Brett H. Meyer:
Hot spare components for performance-cost improvement in multi-core SIMT. 53-59 - Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich:
Low-overhead fault-tolerance for the preconditioned conjugate gradient solver. 60-65 - Mani Soma:
On-line detection of intermittent faults in digital-to-analog converters. 66-71 - Ignacio Herrera-Alzu, Marisa López-Vallejo
A Dual-Layer Fault Manager for systems based on Xilinx Virtex FPGAs. 72-75 - Jyothish Soman, Negar Miralaei, Alan Mycroft
REPAIR: Hard-error recovery via re-execution. 76-79 - Pedro Reviriego, Salvatore Pontarelli, Juan Antonio Maestro
A method to protect Bloom filters from soft errors. 80-84 - Nicolas Borrel, Clement Champeix, Edith Kussener, Wenceslas Rahajandraibe
Influence of triple-well technology on laser fault injection and laser sensor efficiency. 85-90 - Abdulaziz Eker, Oguz Ergin
Using value similarity of registers for soft error mitigation. 91-96 - Muhammad Yasin
Security analysis of logic encryption against the most effective side-channel attack: DPA. 97-102 - Mehran Mozaffari Kermani
Reliable hash trees for post-quantum stateless cryptographic hash-based signatures. 103-108 - Shuai Chen, Junlin Chen, Domenic Forte
Chip-level anti-reverse engineering using transformable interconnects. 109-114 - Sk Subidh Ali
Scan attack on Elliptic Curve Cryptosystem. 115-118 - Senwen Kan, Marco Ottavi
Enhancing embedded SRAM security and error tolerance with hardware CRC and obfuscation. 119-122 - Puneet Ramesh Savanur, Phaninder Alladi, Spyros Tragoudas:
A BIST approach for counterfeit circuit detection based on NBTI degradation. 123-126 - Muralidharan Venkatasubramanian, Vishwani D. Agrawal, James J. Janaher:
Quest for a quantum search algorithm for testing stuck-at faults in digital circuits. 127-132 - Irith Pomeranz:
Piecewise-functional broadside tests based on intersections of reachable states. 133-138 - Gustavo K. Contreras, Nisar Ahmed, LeRoy Winemberg, Mark M. Tehranipoor:
Predictive LBIST model and partial ATPG for seed extraction. 139-146 - Cagatay Ozmen, Aydin Dirican, Nurettin Tan, Hieu Nguyen, Martin Margala
A CMOS ripple detector for integrated voltage regulator testing. 147-150 - Mohammad Hashem Haghbayan, Sami Teravainen, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen
Adaptive fault simulation on many-core microprocessor systems. 151-154 - Kamran Saleem, Sreenivaas S. Muthyala, Nur A. Touba:
Compacting output responses containing unknowns using an embedded processor. 155-160 - Tengteng Zhang, D. M. H. Walker:
Impact of test compression on power supply noise control. 161-166 - Asad Amin Bawa, Nur A. Touba:
Improving X-tolerant combinational output compaction via input rotation. 167-170 - Junlin Chen, Lei Wang:
Low-power LDPC decoder design exploiting memory error statistics. 171-176 - Clement Champeix, Nicolas Borrel, Jean-Max Dutertre
SEU sensitivity and modeling using pico-second pulsed laser stimulation of a D Flip-Flop in 40 nm CMOS technology. 177-182 - Zhixi Yang, Jie Han, Fabrizio Lombardi:
Approximate compressors for error-resilient multiplier design. 183-186 - Daniele Felici, Sandro Bonacini
Characterization of low power radiation-hard reed-solomon code protected serializers in 65-nm for HEP experiments electronics. 187-190 - Alirad Malek, Stavros Tzilis, Danish Anis Khan, Ioannis Sourdis, Georgios Smaragdos
Reducing the performance overhead of resilient CMPs with substitutable resources. 191-196 - Tomohiro Yoneda, Masashi Imai, Hiroshi Saito, Kenji Kise:
Dependable real-time task execution scheme for a many-core platform. 197-204 - Michael Opoku Agyeman
Towards reliability and performance-aware Wireless Network-on-Chip design. 205-210 - Felipe Rosa, Fernanda Lima Kastensmidt
A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability. 211-214 - Bahar J. Farahani
A cross-layer approach to online adaptive reliability prediction of transient faults. 215-220 - Diego G. Rodrigues, Ghazaleh Nazarian, Álvaro F. Moreira, Luigi Carro, Georgi Gaydadjiev
A non-conservative software-based approach for detecting illegal CFEs caused by transient faults. 221-226 - Cristiana Bolchini
A configurable board-level adaptive incremental diagnosis technique based on decision trees. 227-232 - Mohammad Raashid Ansari, Shucheng Yu
IntelliCAN: Attack-resilient Controller Area Network (CAN) for secure automobiles. 233-236
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