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APCCAS 2018: Chengdu, China
- 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018, Chengdu, China, October 26-30, 2018. IEEE 2018, ISBN 978-1-5386-8240-1
Analog and Mixed-Signal Circuits and Systems
- Montree Kumngern, Usa Torteanchai, Sathian Yutthanaboon, Fabian Khateb
:
Sub-Volt Bulk-Driven Transconductance Amplifier and Filter Application. 1-4 - Chen-I Chiu, Kea-Tiong Tang:
An Area-Efficient Differential Serial DAC with Mismatch Compensation Scheme. 5-9 - Mostafa Rashdan
High-Resolution PPM for Time-Based Architectures. 10-13 - Zhanke Yan, Chunming Zhang, Menghai Wang:
Low-Voltage Bandgap Reference Circuit in 28nm CMOS. 14-17 - Yuefeng Cao
An 11b 80MS/s SAR ADC With Speed-Enhanced SAR Logic and High-Linearity CDAC. 18-21 - Fukuyama Tokuya, Takao Kihara, Tsunehiro Yoshio, Tsutomu Yoshimura:
A Standard-cell Based A/D Converter with a Back-gate VCO and a Fat Tree Encoder. 22-25 - Prajuab Pawarangkoon, Chutham Sawigun
A Compact Bulk-Driven Four-Quadrant Analog Multiplier in Weak Inversion. 26-29 - Yulang Feng
A 25-GS/s 4-bit Single-core Flash ADC in 28 nm FDSOI CMOS. 30-33 - Yung-Hui Chung, Yi-Shen Lin, Qi-Feng Zeng:
A 12-bit 20-MS/s SAR ADC With Fast-Binary-Window DAC Switching in 180nm CMOS. 34-37 - Yi Zhang, Lianxi Liu:
A Novel Digitally-Controlled DC Offset Calibration Circuit for the Chopper Instrumentation Amplifier. 38-41 - Zhekan Ni, Yongzhen Chen, Fan Ye, Junyan Ren:
A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic. 42-45 - Jin Hu
A 10-KS/s 625-Hz-Bandwidth 60-dB SNDR Noise-Shaping ADC for Bio-potential Signals Detection Application. 46-49 - Da Li, Libo Qian, Xitao He, Jifei Song, Yinshui Xia:
A Transient-Enhanced Digital Low-Dropout Regulator with Bisection Method Tuning. 50-52 - Dengquan Li, Ruixue Ding, Zhangming Zhu, Yintang Yang:
A Background Timing Skew Calibration Technique in Time-Interleaved ADCs With Second Order Compensation. 53-56 - Naizao Zhong, Runxi Zhang, Chunqi Shi, Jinghong Chen:
A Bandwidth-Tracking Self-Biased 5-to-2800 MHz Low-Jitter Clock Generator in 55nm CMOS. 57-60 - Sanfeng Zhang, Xiong Zhou, Qiang Li:
A Voltage Swing Robust Pseudo-Resistor Structure for Biomedical Front-end Amplifier. 61-64 - Yuya Nishio, Atsuki Kobayashi, Kiichi Niitsu
A Constant-Power Inductive-Coupling Transmitter Using Auxiliary Driving Technique in 65nm SOTB CMOS for Low-Power Supply-Sensing Biosensing Platform toward Healthcare IoTs. 65-68 - Ge Xu, Kenya Hayashi, Shigeki Arata, Shunya Murakami, Cong Dang Bui, Atsuki Kobayashi, Kiichi Niitsu
A BER-Modulated Inductive-Coupling Transceiver Using Dynamic Intermediate Interference Control Technique for Low-Power Communication. 69-73 - Vikas Rana:
Switched Capacitor based Area Efficient Positive and Negative Voltage Multiplier. 74-77 - Vikas Rana, Abhishek Mittal:
Switched Capacitor based High Positive and Negative Voltage Charge-pump using Sample and Hold technique. 78-81 - Huajie Huang, Yanhan Zeng, Jinrui Liao, Rongjun Chen, Hong-Zhou Tan
Performance optimization for the CMOS voltage reference circuit based on NSGA-II. 82-85 - Jing Li, Jian Luo, Yongfeng Ding, Ning Ning:
A Supply Noise Compensation Circuit for Clock Buffers to Reduce Timing Jitter. 86-89 - Yanfei Ma, Zhen Meng, Shengming Huang, Yuemin Ding
A 7.4 μW Temperature Detecting Circuit for Battery Monitoring System. 90-93 - Jiajia Wang, Shaowei Zhen, Yajuan He, Penghao Zeng, Jiawei Chen, Wanli Zhou, Ping Luo, Bo Zhang
Digital PID Based on Pseudo Type-III Compensation for DC-DC Converter. 94-97 - Yi-Han Ou-Yang
A 0.65-V 10-bit 320-kS/s SAR-ADC with Charge Average and Skip Switching Algorithm. 98-101 - Vaibhav Venugopal Rao, Ioannis Savidis:
Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory. 102-106 - Haoyu Zhuang, He Tang, Xizhu Peng, Zhangming Zhu:
A 0.5-nW 29ppm/°C Voltage Reference Circuit. 107-110
Artificial Intelligent (AI) System and Advanced Processing (AP) Core Technology
- Chen-Chia Chen, Chih-Ting Kuo, Ssu-Ying Chen, Chih-Hsing Lin, Jin-Ju Chue, Yi-Jie Hsieh, Chun-Wen Cheng, Chieh-Ming Wu, Chun-Ming Huang:
Calibration of Low-Cost Particle Sensors by Using Machine-Learning Method. 111-114 - Lan-Da Van, Tsung-Che Lu, Pei-Yu Chen, Hari C. Reddy:
Type-4 2-D Diagonal and Four-Fold Rotational Symmetry Digital Filter Architectures. 115-118 - Zhang Zhang, Lingling Wei, Xiaojuan Zhou, Taolue Zhu, Guangjun Xie, Xin Cheng:
Study of High Voltage Deep Brain Stimulation. 119-122 - Yeong-Kang Lai, Chu-Ying Ho, Yu-Hau Huang, Chuan-Wei Huang, Yi-Xian Kuo, Yu-Chieh Chung:
Intelligent Vehicle Collision-Avoidance System with Deep Learning. 123-126 - Yu-Chih Hsu, Jie-Ru Lin, Mei-Juan Chen
Acceleration of Depth Intra Coding for 3D-HEVC by Efficient Early Termination Algorithm. 127-130
Biomedical and Healthcare Circuits and Systems
- Maya Chennafi, Muhammad Adeel Khan, Gang Li, Yong Lian
Study of Music Effect on Mental Stress Relief Based on Heart Rate Variability. 131-134 - Prajuab Pawarangkoon:
A Nanopower 4th-Order Chebyshev Lowpass Filter For ECG Detection System. 135-138 - Qingsong Xie, Guoxing Wang, Yong Lian
Heart Rate Estimation from Ballistocardiography Based on Hilbert Transform and Phase Vocoder. 139-142 - Zhiming Liang, Bin Li, Zhaohui Wu:
A Fully Integrated Chopper IA for Implantable Multichannel EEG Recording Without Impedance Boosting Circuits. 143-146 - Zhiheng Zheng, Mingyi Chen, Jie Zhou, Guoxing Wang:
A CMOS Temperature Sensor With Single-Point Calibration for Retinal Prosthesis. 147-150 - Ziran He, Min Wang, Qingsong Xie, Guoxing Wang, Yang Zhao, Yong Lian
A Heart Rate Measurement System Based on Ballistocardiogram for Smart Furniture. 151-154 - Hui Li, Boxiao Liu, Yongfu Li, Guoxing Wang, Yong Lian
A High Accuracy and High Sensitivity System Architecture for Electrical Impedance Tomography System. 155-158
Communication Circuits and Systems
- Yujie Sang, Li Alex Li:
Application of novel architectures for Modulation Recognition. 159-162 - Yuma Isobe, Takao Kihara, Tsutomu Yoshimura:
A Polyphase Decimation Filter for Time-Interleaved ADCs in Direct-RF Sampling Receivers. 163-166 - Yanzhao Ma, Kai Cui, Zhengjie Ye, Song Fang, Xiaoya Fan:
A ZVS Active Rectifier with Adaptive On/Off Delay Compensation for WPT Systems. 167-170 - Yuxuan Tang, Yulang Feng
A Current Reuse Wideband LNA with Complementary Noise and Distortion Cancellation for Ultrasound Imaging Applications. 171-174 - Kazuki Miyao, Tatsuya Okafuji, Takao Kihara, Tsutomu Yoshimura:
Study of mutual injection pulling in a 5-GHz, 0.18-μm CMOS cascaded PLL. 175-178 - Hongmin Li, Gang Li, Yikang Zhang, Wen Qiao, Falin Liu
Forward Modeling Assisted Digital Predistortion Method for Hybrid Beamforming Transmitters with a Single PA Feedback. 179-182 - Wei-Lun Tsai, Sau-Gee Chen, Shen-Jui Huang:
A Low-Complexity Mixed-Radix FFT Rotator Architecture. 183-186 - Run Zhe Hu, Fang Lu, Yan Dong:
Relaxed Half-Stochastic Iterative Decoding for Rate Compatible Modulation. 187-190 - Zengchao Yan, Wenjie Li
Fast and Low-Complexity Decoding Algorithm and Architecture for Quadruple-Error-Correcting RS codes. 191-194 - Chao Yang, Shusen Jing, Xiao Liang, Zaichen Zhang, Xiaohu You, Chuan Zhang:
A Low-Complexity Codebook Design for Large-Scale SCMA. 195-198 - Mury Thian:
High-Efficiency Wilkinson-Power-Combining Class-EF Amplifier with Lumped-Element Load Network. 199-202 - Yaping Zhang, Anlan Yu, Xiaosi Tan, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Adaptive Damped Jacobi Detector and Architecture for Massive MIMO Uplink. 203-206 - Yang Chen, Xu Yan
The Design and Miniaturization of 6-15 GHz Lumped-Element Wilkinson Power Divider Based on GaAs IPD Technology. 207-210 - Xiaofeng Zhou, Yifei Shen
An Adjustable Hybrid SC-BP Polar Decoder. 211-214
Design and Implementation for Advanced Baseband Signal Processing
- Ting Lin, Shan Cao, Shunqing Zhang, Shugong Xu
A Unified Reconfigurable Datapath for 5G Compatible LDPC Decoding. 215-218 - Jiejun Jin, Xiao Liang, Yunhao Xu, Zaichen Zhang, Xiaohu You, Chuan Zhang:
LDPC Decoder Based on Markov Chain Monte Carlo Method. 219-222 - Meiqi Wang, Siyuan Lu, Danyang Zhu, Jun Lin, Zhongfeng Wang:
A High-Speed and Low-Complexity Architecture for Softmax Function in Deep Learning. 223-226 - Jing Tian, Jun Lin, Zhongfeng Wang:
Analysis of the Dual-Threshold-Based Shrinking Scheme for Efficient NB-LDPC Decoding. 227-230 - Shuai Li, Qi Wang, Xiaojie Liu, Jienan Chen:
Low Cost LSTM Implementation based on Stochastic Computing for Channel State Information Prediction. 231-234
Design Automation
- Kiyotaka Yamamura, Takumi Shimada:
An Efficient Variable-Gain Homotopy Method for Finding DC Operating Points of Transistor Circuits. 235-238 - Mian Riaz-ul-haque
Decimal Multiplication Using Combination of Software and Hardware. 239-242 - Kiyotaka Yamamura, Hiroki Takahara:
Finding All Solutions of Piecewise-Linear Resistive Circuits Using Triangular LP Test. 243-246 - Hao Yu, Guoyong Shi:
Symbolic Circuit Reduction for Multistage Amplifier Macromodeling. 247-250 - Xin Jin, Jun Lin, Zhongfeng Wang:
A Novel Compiler for Regular Expression Matching Engine Construction. 251-256 - Anala M., B. P. Harish:
Analytical Modeling of Process Variability in Subthreshold Regime for Ultra Low Power Applications. 257-260 - I-Lun Tseng, Yongfu Li, Valerio Perez, Vikas Tripathi, Zhao Chuan Lee, Yoong Seang Jonathan Ong:
An Automated System for Checking Lithography Friendliness of Standard Cells. 261-265
Digital Circuits and Systems
- Zahit Evren Kaya, Salih Ergun
High-Speed Random Number Generator Design in 22nm FD-SOI Process. 266-269 - Chenxi Lin, Hui Qian, Zhongfeng Wang:
A High-Throughout Real-Time Prewitt Operator on Embedded NEON+ARM System. 270-273 - Mehmet Alp Sarkisla, Salih Ergun
An Area Efficient True Random Number Generator Based on Modified Ring Oscillators. 274-278 - Chua-Chin Wang, Zong-You Hou, Ssu-Wei Huang:
40-nm 2×VDD Digital Output Buffer Design With DDR4-Compliant Slew Rate. 279-282 - Ibrahim Tastan, Salih Ergun
Experimental Cryptanalysis of A Chaos-Based Random Number Generator. 283-286 - Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee:
A GALS Design with Opposite-Phase Local Clock Assignment for Power Supply Noise Reduction. 287-290 - Yi Guo, Heming Sun, Li Guo, Shinji Kimura:
Low-Cost Approximate Multiplier Design using Probability-Driven Inexact Compressors. 291-294 - Weiwei Ge, Lijuan Han, Yuan Cao, Enyi Yao
A Novel Low Voltage DCVSL Circuit Design based on Wilson Current Mirror. 295-298 - Yue Lu, Tom J. Kazmierski, Lianxi Liu:
A Bit-Serial Variable-Accuracy FFT Processor For Energy-Harvesting Systems. 299-304 - Jiubai Zhang, Yajuan He, Xiaoqing Wu, Bo Zhang
A Disturb-Free 10T SRAM Cell with High Read Stability and Write Ability for Ultra-Low Voltage Operations. 305-308 - Jiawang Hu, Dongsheng Liu, Cong Zhang, Changxing Li, Hualong Zhao:
Design and Hardware Implementation of a STT-MRAM Based SoC Architecture for Smart Card Chip. 309-312 - Olga Krestinskaya
Programmable Memristive Threshold Logic Gate Array. 313-316 - Moshe Avital, Anatoli Mordakhay, David Zooker Zabib, Yoav Weizman, Alexander Fish
Utilization of Process and Supply Voltage Random Variations for Random Bit Generation. 317-320 - Yajuan He, Xilin Yi, Bin Ma, Ziji Zhang, Bo Zhang
A Probabilistic Prediction Based Fixed-Width Booth Multiplier. 321-324 - Xue Liu, Kui Cai, Zhen Mei:
FPGA Implementation of A Hybrid Decoder for STT-MRAM. 325-328 - Wangqian Chen, Mo Huang
A Branch-and-Bound Algorithm with Reduced Search Space for Sparse Filter Design. 329-332
Digital Signal Processing
- Jeong Keun Jang, Ho Keun Kim, Myung Hoon Sunwoo, Oscar Gustafsson
Area-Efficient Scheduling Scheme Based FFT Processor for Various OFDM Systems. 338-341 - Qiaoyu Tian, Yinan Wang
Hardware-Efficient Parallel FIR Filter Structure Based on Modified Cook-Toom Algorithm. 342-345
Education in Circuits and Systems
- Hua Fan, Sujie Li, Shuhan Yang, Quanyuan Feng, Weijian Chen, Xingning Ye, Shimeng Xie, Hadi Heidari
Reform and Practice of Analog Circuits. 346-349 - Jin Zhang, Hua Fan, Man Fang, Weijian Chen, Chenyi Wang:
How to Construct a Resonable Teaching Quality Assurance System in Universities. 350-353 - Kuojun Yang, Peng Ye, Duyu Qiu, Jiali Shi:
Teaching Practice Platform and Innovation Course Construction for Postgraduate Majoring in Electronics Information. 354-357
Emerging Threats in the IoT Era: Chip Reliability and Security
- B. Srinivasu, Vikramkumar Pudi, Anupam Chattopadhyay, Kwok-Yan Lam
CoLPUF : A Novel Configurable LFSR-based PUF. 358-361 - Makoto Nishizawa, Kento Hasegawa, Nozomu Togawa
Capacitance Measurement of Running Hardware Devices and its Application to Malicious Modification Detection. 362-365 - Kyle Juretus, Ioannis Savidis:
Importance of Multi-parameter SAT Attack Exploration for Integrated Circuit Security. 366-369 - Jerrin Pathrose, Ghazanfar Ali, Hans G. Kerkhoff:
Enhancing Physical Unclonable Function Robustness Employing Embedded Instruments. 370-373 - Kai Sun, Yifei Shen
A New Error Correction Scheme for Physical Unclonable Function. 374-377
Future Circuits and Systems Based on Emerging Memory Technologies
- Xiaochen Peng, Shimeng Yu
Benchmark of RRAM based Architectures for Dot-Product Computation. 378-381 - He Zhang, Wang Kang, Zhaohao Wang, Erya Deng, Youguang Zhang, Weisheng Zhao:
High-Density and Fast-Configuration Non-Volatile Look-Up Table Based on NAND-Like Spintronic Memory. 382-385 - Menglin Han, Hao Cai, Jun Yang, Lirida A. B. Naviner
Stability and Variability Emphasized STT-MRAM Sensing Circuit With Performance Enhancement. 386-389 - Chenchen Liu, Tong Wu:
ReRAM-based Circuit and System Design for Future Storage and Computing. 390-393
Hardware Security and Hardware Implementation of Post-Quantum Cryptography
- Yue Fang, Chenghua Wang, Qingqing Ma, Chongyan Gu, Máire O'Neill, Weiqiang Liu:
Attacking Arbiter PUFs Using Various Modeling Attack Algorithms: A Comparative Study. 394-397 - Wei Ge, Ji Quan Huang, Bo Liu, Min Zhu, Yuan Cao:
A Deep Learning Modeling Attack Method for MISR-APUF Protection Structures. 398-402 - Sailong Fan, Weiqiang Liu, James Howe
Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography. 403-406 - Shuguo Li, Zhen Gu
Lazy Reduction and Multi-Precision Division Based on Modular Reductions. 407-410 - Ayesha Khalid, Ciara Rafferty, James Howe
Error Samplers for Lattice-Based Cryptography -Challenges, Vulnerabilities and Solutions. 411-414 - Wei Hu
Security Path Verification Through Joint Information Flow Analysis. 415-418
Multimedia Systems and Applications
- Biyin Wang, Shiting Li, Wenbin Ye, Abubakar Abubakar
Image Denoising Algorithms for DoFP Polarization Image Sensors with Non-Gaussian Noises. 419-422 - Alexandre Constantin
Accurate Road Detection from Satellite Images Using Modified U-net. 423-426 - Hang Wang, Hongbin Sun, Xuchong Zhang, Qiubo Chen, Pengju Ren, Xiaogang Wu, Shouyi Yin, Zhiqiang Jiang, Xiang Li, Daqiang Han, Shiquan Yu, Shaojun Wei, Nanning Zheng:
A 4K×2K@60fps Multi-format Multi-function Display Processor for High Perceptual Quality. 427-430
Nanoelectronics, Devices and Hybrid System Integration
- Chengzhi Wang
A Novel 15T-4MTJ based Non-volatile Ternary Content-Addressable Memory Cell for High-Speed, Low-Power and High-Reliable Search Operation. 431-434 - Debjyoti Bhattacharjee
MAMI: Majority and Multi-Input Logic on Memristive Crossbar Array. 435-438 - Yang Liu, Zhangming Zhu, Ruixue Ding, Xiaoxian Liu, Qijun Lu, Xiangkun Yin, Yintang Yang:
Inductance of Different Profiles of Through Glass Vias based on magnetic flux density. 439-442 - Xiangliang Jin, Yang Wang:
A Novel Dual Direction SCR With Dummy Gate Structure for High Voltage ESD Protection. 443-446
Neural Networks and Neuromorphic Engineering
- Kai-Yuan Tsai, Jian-Jiun Ding, Yih-Cherng Lee:
Frontalization with Adaptive Exponentially-Weighted Average Ensemble Rule for Deep Learning Based Facial Expression Recognition. 447-450 - Yonglei Zhao, Guoyong Shi:
A Circuit Implementation Method for Memristor Crossbar with On-chip Training. 451-454 - Hung-Wei Hsu, Yih-Cherng Lee, Jian-Jiun Ding, Ronald Y. Chang:
Dolphin Recognition with Adaptive Hybrid Saliency Detection for Deep Learning Based on DenseNet Recognition. 455-458 - Kazybek Adam, Kamilya Smagulova
Memristive LSTM network hardware architecture for time-series predictive modeling problems. 459-462
Power/Energy Devices, Circuits and Systems
- Feng Yang, Hao Wu, Xiaojun Fu, Fan Xiang, Zhi Zheng, Fei Xiang:
A Radiation-Hardened Trench Power MOSFET for Aerospace Applications. 463-467 - Zekun Zhou, Junyuan Rong, Yue Shi, Bo Zhang
A Fast-Response BUCK Converter with Adaptive Detect and Transient Enhancement Techniques. 468-472 - Lin Cheng, Xinyuan Ge, Wing-Hung Ki
A Simplified PWM Controller for Wireless Power Receiver Using a 3-Mode Reconfigurable Resonant Regulating Rectifier. 473-475 - Zekun Zhou, Hongming Yu, Yue Shi:
A Time-domain Bandgap Reference with Continuous Output Voltage. 476-479 - Mingyu Yang, Shaowei Zhen, Sunze Zhou, Penghao Zeng, Jiawei Chen, Wanli Zhou, Ping Luo, Bo Zhang
Effect of Control Delay on Small Signal Model for Buck Converter with Constant on Time Control. 480-483 - Zekun Zhou, Yunkun Wang, Yue Shi:
A Bandgap Reference Using a Novel Soft Self-start Bias Circuit. 484-488 - Junxiao Chen, Lenian He:
Fully Integrated High-Voltage Level Shifts and Drivers for Buck Converters. 489-492 - Kangqi Liu, Mingyi Chen, Yiyu Gong, Songhai Fan, Guoxing Wang:
A 100μW AC-DC Boost Converter for Electromagnetic Energy Harvesting With 0.2 VPeak Self-starting Voltage and 85% Efficiency. 493-496 - Yu Lei, Chenchang Zhan, Chenyu Huang, Lidan Wang:
A Chip-Area-Efficient Subthreshold CMOS Voltage Reference with High PSRR Based on Compensated ΔVGS of NMOS Transistors. 497-500 - Langyu Hu, Lin Cheng, Yuan Yao, Tak-Sang Yim, Wing-Hung Ki
A 40.68MHz Active Rectifier with Hybrid Delay Compensation Scheme. 501-504 - Yuan Yao, Xiaodong Meng, Chi-Ying Tsui, Wing-Hung Ki
Polyimide-Based Flexible 3-Coil Inductive Link Design and Optimization. 505-508 - Yan Lu:
A Reconfigurable Switched-Capacitor DC-DC Converter and Cascode LDO for Dynamic Voltage Scaling and High PSR. 509-511 - Ping Luo, Dingming Peng, Yuanfei Wang, Xinyi Zheng:
Review of Solar Energy Harvesting for IoT Applications. 512-515 - Mo Huang
An Overview of Digital Low Drop-out Regulator Design. 516-519
Reconfigurable Architecture for Future Intelligent System
- Xiangxi Zou, Yonghui Zhang, Shuaiyan Zhang, Jian Zhang:
FPGA implementation of edge detection for Sobel operator in eight directions. 520-523
Sensors and Interfaces
- Huifeng Zhu, Qi Wei, Fei Qiao, Yi Yang, Xinjun Liu, Shuzheng Xu, Huazhong Yang:
CMOS Image Sensor Data-Readout Method for Convolutional Operations with Processing Near Sensor Architecture. 528-531
Smart and Secure Integrated Systems for Autonomous Vehicle
- Robert Lajos Bücs, Rainer Leupers, Gerd Ascheid:
Multi-Scale Multi-Domain Co-Simulation for Rapid ADAS Prototyping. 532-535 - Wenda Li, Xianjie Meng, Zheng Wang, Wenqi Fang, Jie Zou, Huiyun Li, Tianfu Sun
Low-cost vector map assisted navigation strategy for autonomous vehicle. 536-539 - Minglan Liang, Mingsong Chen, Zheng Wang, Jingwei Sun:
A CGRA based Neural Network Inference Engine for Deep Reinforcement Learning. 540-543 - Shanliao Li, Ouyang Ning, Zheng Wang:
Accelerator Design for Convolutional Neural Network with Vertical Data Streaming. 544-547 - Sananda Mitra, Sumanta Bose, Sourav Sen Gupta
Secure and Tamper-resilient Distributed Ledger for Data Aggregation in Autonomous Vehicles. 548-551 - Zakaria Najm, Dirmanto Jap, Bernhard Jungk, Stjepan Picek, Shivam Bhasin:
On Comparing Side-channel Properties of AES and ChaCha20 on Microcontrollers. 552-555
Visual Signal Processing and Communications
- Syed Mudassir, Shaojie Su, Mingzhu Long, Zhihua Wang:
Patterns Detection and Recognition in Visual Aided System for Prosthesis Pose Estimation during Total Hip Replacement Surgery. 556-559 - Hung-Yi Chen, Jian-Jiun Ding, Yih-Cherng Lee:
Novel Adaptive Rood Path Searches with Small Motion Prejudgments for Fast Block Motion Estimation. 560-563 - Munir Ahmad Al-Absi
A New High Multiplication Factor Tunable Grounded Positive and Negative Capacitance Simulator. 564-567
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