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16th NANOARCH 2021: AB, Canada
- IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2021, AB, Canada, November 8-10, 2021. IEEE 2021, ISBN 978-1-6654-0959-9
- Junqi Huang, T. Nandha Kumar
, Haider A. F. Almurib, Fabrizio Lombardi:
Commutative Approximate Adders: Analysis and Evaluation. 1-6 - Farzaneh Zokaee, Bing Li, Fan Chen:
FeFET-based Process-in-Memory Architecture for Low-Power DNN Training. 1-6 - Xiaoming Chen, Tao Song, Yinhe Han:
RRAM-based Analog In-Memory Computing : Invited Paper. 1-6 - Yu-ang Wu, Lirida A. B. Naviner
Hybrid MTJ-CMOS Integration for Sigma-Delta ADC. 1-5 - Prathyush Poduval, Mariam Issa, Farhad Imani, Cheng Zhuo, Xunzhao Yin, M. Hassan Najafi, Mohsen Imani:
Robust In-Memory Computing with Hyperdimensional Stochastic Representation. 1-6 - Yaoru Hou
Cryogenic In-MRAM Computing. 1-6 - Kangqiang Pan
A Novel Programmable Variation-Tolerant RRAM-based Delay Element Circuit. 1-2 - Junyi Qian
Reconfigurable Approximate Multiplication Architecture for CNN-Based Speech Recognition Using Wallace Tree Tensor Multiplier Unit. 1-6 - Dewmini Sudara Marakkalage, Heinz Riener, Giovanni De Micheli:
Optimizing Adiabatic Quantum-Flux-Parametron (AQFP) Circuits using an Exact Database. 1-6 - Zhendong Lin, Guangjun Xie, Shaowei Wang, Jie Han, Yongqiang Zhang:
A Review of Deterministic Approaches to Stochastic Computing. 1-6 - An Qi Zhang, Amr M. S. Tosson, Lan Wei:
Error Resilience and Recovery of Process Induced Stuck-at Faults in MLP Neural Networks using Emerging Technology. 1-6 - Maoshen Zhang
Experimental Verification of EMPA Fault Mechanism. 1-6 - Jiang Li
Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar. 1-6 - Tong Zhou, Yuheng Zhang, Shijin Duan, Yukui Luo, Xiaolin Xu:
Deep Neural Network Security From a Hardware Perspective. 1-6 - Shijin Duan, Xiaolin Xu:
HDCOG: A Lightweight Hyperdimensional Computing Framework with Feature Extraction. 1-6 - Zuolei Hao, Yue Zhang, Jinkai Wang, Hongyu Wang, Yining Bai, Guanda Wang, Weisheng Zhao:
A Computing-in-memory Scheme with Series Bit-cell in STT-MRAM for Efficient Multi-bit Analog Multiplication. 1-6 - Sebastian Brandhofer, Simon J. Devitt
Error Analysis of the Variational Quantum Eigensolver Algorithm. 1-6 - Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen:
A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch. 1-6 - Yuancheng Zhou, Guangjun Xie, Jie Han, Yongqiang Zhang:
Absolute Subtraction and Division Circuits Using Uncorrelated Random Bitstreams in Stochastic Computing. 1-6 - Weimin Fu, Orlando Arias, Yier Jin
Fuzzing Hardware: Faith or Reality? : Invited Paper. 1-6
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