Counters, Ripple Counters, Ring Counters
Counters, Ripple Counters, Ring Counters
Counters, Ripple Counters, Ring Counters
A. Jawahar
SSN College of Engineering
Session Objectives
Session Outcomes
27/01/23
Counter: A register that goes through a prescribed sequence of
states
• Binary counter
Counter that follows a binary sequence
N bit binary counter counts in binary from n to 2n -1
• Ripple counters triggered by initial Count signal
• Applications:
Watches
Clocks
Alarms
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Counters- Introduction
Counters are basically classified into two types based on
how the clock is applied.
(1) Asynchronous/Ripple Counters
(2) Synchronous Counters
Asynchronous/Ripple Counters:
• The flip-flop output transition serves as a source for
triggering other flip-flops.
• The CP inputs of all flip-flops (except the first) are triggered
not by the incoming pulses, but rather by the transition that
occurs in other flip-flops.
Synchronous Counters:
• Input pulses are applied to all the CP inputs of all flip-flops.
• Change of state of a particular flip-flop is dependent on the
present state of other flip-flops.
Binary Ripple Counter:
o
consists of a series connection of complementing
flip-flops (T or JK type), with output of each flip-
flop connected to CP input of next higher order
flip-flop.
o
reset signal sets all outputs to 0.
o
small circle in C input indicates that the flip-flop
complements during negative-going transition or
when the output to which it is connected goes
from 1 to 0.
o lower order bit A → complemented with each
0
count pulse.
o when A moves from 1 to 0 → complements A
0 1
o when A moves from 1 to 0 → complements A
1 2
o when A moves from 1 to 0 → complements A
2 3
and so on.
o
Flip-flops change one at a time in rapid
succession, and the signal propagates through
the counter in a ripple fashion.
Logic-1
A0
J Q
Count pulses
K
Binary counter with reverse count is
called binary down-counter.
A1
J Q Here the value is decremented with
every input count pulse.
K Figure using JK & T flip-flops
works as binary down-counter
A2 (1) if outputs are taken from
J Q
complement terminals Q’.
K (2) if all the flip-flops are
triggered on the positive edge of the
A3 pulse.
J Q
A0
A1
A2
A3
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000
(A3A2A1A0)
• Ring counter:
– a circular shift register with only one flip-flop being
set at any particular time, all others are cleared
(initial value = 1 0 0 … 0 )
– The single bit is shifted from one flip-flop to the next
to produce the sequence of timing signals.
• Counter definition
• Types of counter
• 4-Bit binary ripple counter, operation, timing diagram
• BCD Ripple counter, operation, timing diagram
• Three decade counter
• Ring counter
Practice Questions