LG+ EAY62810301+LGP32-13PL1 Crystal Sysb
LG+ EAY62810301+LGP32-13PL1 Crystal Sysb
LG+ EAY62810301+LGP32-13PL1 Crystal Sysb
Product Specification
SPECIFICATION
FOR
APPROVAL
( ) Preliminary Specification
( ● ) Final Specification
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DATE DATE
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Please return 1 copy for your confirmation with TV Products Development Dept.
your signature and comments. LG. Display LCD Co., Ltd
CONTENTS
Number ITEM Page
COVER 1
CONTENTS 2
RECORD OF REVISIONS 3
1 GENERAL DESCRIPTION 4
3 ELECTRICAL SPECIFICATIONS 6
4 OPTICAL SPECIFICATIONS 13
5 MECHANICAL CHARACTERISTICS 19
6 MECHANICAL DIMENSION 20
7 RELIABILITY 23
8 INTERNATIONAL STANDARDS 24
8-1 ENVIRONMENT 24
9 PACKING 25
RECORD OF REVISIONS
Revision No. Revision Date Page Description
0.1 Sep, 19, 2012 - Preliminary Specification(First Draft)
0.2 Oct, 11, 2012 - Kit. Biz New CAS Up-dated
0.3 Jan, 07, 2013 4 Up-dated General Features
15 Up-dated Table 6. OPTICAL CHARACTERISTICS
25, 28, 29 Up-dated 9-1. Packing Form, APPENDIX-I, APPENDIX-I-2
1.0 Jan, 08, 2013 - CAS Version 1.0 Release
- Final Specification
1. General Description
The LC320DDXJ is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel (GIP). The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 31.51 inch diagonally measured
ac tive dis pla y area wi th W XGA r es olution ( 768 vertic al b y 1366 hori zontal pix el arra y) .
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7M(6bit + FRC) colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
Mini-LVDS(RGB)
EEPROM
Source Driver Circuit
SCL SDA
S1 S1366
LVDS Select #9 G1
CN1
(30pin) Timing Controller
LVDS 1Port [LVDS Rx] Control
Signals TFT - LCD Panel
+12.0V (1366 × 768 x RGB pixels)
[Gate In Panel]
General Features
Active Screen Size 31.51 inches(800.4mm) diagonal
Outline Dimension 715.0(H) x 411.0 (V) x 1.3 mm(D) (Typ.)
Pixel Pitch 170.25㎛ x 510.75㎛ x RGB
Pixel Format 1366 horiz. by 768 vert. Pixels, RGB stripe arrangement
Color Depth 8-bit (D), 16.7 M colors
Source D-IC : 6-bit mini-LVDS, gamma reference voltage, and control signals
Drive IC Data Interface
Gate D-IC : Gate In Panel
Transmittance (With POL) 6.15 % (Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Weight 0.86 Kg (Typ.)
Display Mode Transmissive mode, Normally black
Surface Treatment (Top) Hard coating(3H), Anti-glare treatment of the front polarizer (Haze < 1%)
Value
Parameter Symbol Unit Note
Min Max
90%
60
60%
50 Storage
Wet Bulb
Temperature [°C]
40
Humidity
[(%)RH]
40%
Operation
30
20
10
0
10%
-20 0 10 20 30 40 50 60 70 80
Dry Bulb Temperature [°C]
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight
Circuit :
- 255 332 mA 1
Power Input Current ILCD
- 320 416 mA 2
Notes : 1. The specified current and power consumption are under the VLCD=12.0V, Ta=25 2°C, fV=60Hz
condition, and mosaic pattern(8 x 6) is displayed and f V is the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ± 5% of typical voltage
Mosaic Pattern(8 x 6)
Notes :
1. All GND (Ground) pins should be connected together to the LCD module‟s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. These pins are used only for LGD (Do not connect)
5. Specific pin No. #30 is used for “No signal detection” of system signal interface.
It should be GND for NSB (No Signal Black) while the system interface signal is not.
If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).
Display
tHV - 1366 - tclk
Period
Horizontal Blank tHB 90 162 410 tclk
Display
tVV - 768 - tHP
Period
20 22 240
Vertical Blank tVB tHP 1
(126) (180) (295)
Frequency 2
57 60 63 NTSC :
Vertical fV Hz
(47) (50) (53) 57~63Hz
(PAL : 47~53Hz)
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
0.7VDD
DE, Data
0.3VDD
tCLK
DCLK 0.5 Vcc
Valid data
DE(Data Enable)
tHV
tHT
DE(Data Enable)
768 1 768
tVV
tVT
LVDS +
V CM V IN _ MAX V IN _ MIN
# V CM = {( LVDS +) + ( LVDS - )} /2
0V
LVDS Clock
LVDS Data
( F clk = 1 /T clk )
tSKEW tSKEW
A
Tclk
LVDS 1‟st Clock 80%
0.5tui tui
LVDS Data
360ps
VTH
0V
(Differential) VTL
360ps
teff
0V
(Differential)
Mini-LVDS Clock
CLK 3.0V≤VCC ≤3.6V - 290 MHz
frequency
VID
△VID
△VIB
VCM (0V) VIB
△VID △VID
VID
* Differential Probe * Active Probe
* Source PCB
△VIB
VIB
e Probe
The brightness of each primary color(red,green,blue) is based on the 8bit gray scale data input for the color.
The higher binary input, the brighter the color. Table 7 provides a reference for color versus data input.
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green (255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Magenta 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
RED (000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RED (001) 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RED (254) 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RED (255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
GREEN (000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
GREEN (001) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
GREEN (254) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
GREEN (255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
BLUE (000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BLUE (001) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
BLUE (254) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0
BLUE (255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
90% 90%
Power Supply For LCD
VLCD 10% 10% 10%
0V
T7
T1
T5
T2
Valid Data Vcm : LVDS Common mode Voltage
30%
Interface Signal (Tx_clock) 0V
100% T3 T4
T6
User Control Signal
(LVDS_select)
Value
Parameter Unit Note
Min Typ Max
T1 0.5 - 20 ms 1
T2 0 - - ms 2
T3 400 - - ms 3
T4 200 - - ms 3
T5 1.0 - - s 4
T6 0 - T2 ms 5
T7 0 - - ms 6
1. Even though T1 is over the specified value, there is no problem if I2T spec of fuse is satisfied.
Note : 2. If T2 is satisfied with specification after removing LVDS Cable, there is no problem.
3. The T3 / T4 is recommended value, the case when failed to meet a minimum specification,
abnormal display would be shown. There is no reliability problem.
4. T5 should be measured after the Module has been fully discharged between power off and on period.
5. If the on time of signals (Interface signal and user control signals) precedes the on time of Power (VLCD),
it will be happened abnormal display. When T6 is NC status, T6 doesn‟t need to be measured.
6. It is recommendation specification that T7 has to be 0ms as a minimum value.
※ Please avoid floating state of interface signal at invalid period.
※ When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V.
4. Optical Specification
Optical characteristics are determined after the unit has been „ON‟ and stable in a dark environment at 25± 2°C.
The values are specified at distance 50cm from the LCD surface at a viewing angle of and equal to 0 °.
FIG. 6 shows additional information concerning the measurement equipment and method.
50cm
FIG. 3 Optical Characteristic Measurement Equipment and Method
G to G (σ) =
√ Σ(Xi- u)2
N
Xi = Individual Data
u = Data average
N : The number of Data
5. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are
determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which
is normal to the LCD module surface. For more information, see the FIG. 6.
6. Gray scale specification
Gamma Value is approximately 2.2. For more information, see the Table 7.
H
A
② ③
①
V
B
A : H / 4 mm
④ ⑤ B : V / 4 mm
@ H,V : Active Area
Response time is defined as the following figure and shall be measured by switching the input signal for
“Black” ~ “White” and “White” ~ “Black”.
Tr Tf
100
90
Optical
Response
10
Black White White Black
0
FIG. 5 Response Time
Normal
E Y
= 90, Up
= 180, Left
= 0, Right
= 270, Down
5. Mechanical Characteristics
Item Value
Horizontal 715.0mm
Outline Dimension
Vertical 411.0mm
(Only Glass)
Thickness 1.3 mm
Horizontal 697.9mm
Active Display Area
Vertical 392.3mm
notes : Please refer to a mechanic drawing in terms of tolerance at the next page.
6. Mechanical Dimension
6-1. Board Assembly Dimension
Adhesive
Area
60.0± 1.0
Silicone Tape
Area
Adhesive
Area
- Material List
◈ Note
- Layer : Single Side
- Pad : GOLD Plating
- #e dimension : Cpk 1.0 more
- ## dimension : Cpk 1.33 more
- Stiffener Color : Sky Blue
- H-F
- Dimension Unit : mm
7. Reliability
Table 9. ENVIRONMENT TEST CONDITION
notes : Before and after Reliability test, Board ass‟y should be operated with normal function.
8. International Standards
8-1. Environment
a) RoHS, Directive 2002/95/EC of the European Parliament and of the council of 27 January 2003
9. Packing
9-1. Packing Form
a) Package quantity in one Pallet : 160 pcs
10. Precautions
Please pay attention to the followings when you use this TFT LCD panel.
10-5. Storage
When storing the board ass‟y as spares for a long time, the following precautions are necessary.
(1) Store them in a dark place. Do not expose the board ass‟y to sunlight or fluorescent light. Keep the
temperature between 5°C and 35°C at normal humidity.
(2) The polarizer surface should not come in contact with any other object.
It is recommended that they be stored in the container in which they were shipped.
# APPENDIX-I
■ Pallet Ass‟y
① ②
ⓐ ⓑ
ⓓ
③ ④
ⓒ
⑤ ⑥ ⓗ
ⓐ Pallet Plywood
ⓘ
ⓑ Carton Plate Single Wall
ⓒ PE Sheet Carbon
ⓖ Tape OPP
ⓗ Band PP
ⓘ Clip PP
# APPENDIX-I-2
■ Control PCB Packing Ass’y
[18Tray+Empty Tray]
[10pcs/Tray]
2 Tray PET
3 Box SWR4
# APPENDIX- II-1
■ Board Ass’y ID Label
Model
LC320DXJ-SFE1
Serial No. XXXX
Work Other
# APPENDIX- II-2
■ BOX Label
LC320DXJ-SFE1
QTY : 10
■ Pallet Label
LC320DXJ
SFE1
160 PCS 001/01-01
MADE IN KOREA RoHS Verified
XXXXXXXXXXXXX XXX
# APPENDIX- III-1
■ Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter(Pin7= “L” or “NC”)
Vsync 28
Data Enable 30
LCD Module
CLOCK 31
Note: 1. The LCD module uses a 100 Ohm[Ω] resistor between positive and negative lines of each receiver
input.
2. Refer to LVDS Transmitter Data Sheet for detail descriptions. (THC63LVD103 or Compatible)
3. „7‟ means MSB and „0‟ means LSB at R,G,B pixel data.
Ver. 1.0 32 /37
LC320DXJ
Product Specification
# APPENDIX- III-2
■ Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter(Pin7= “H” )
Vsync
Data Enable 30
LCD Module
CLOCK 31
Note :1. The LCD module uses a 100 Ohm[Ω] resistor between positive and negative lines of each receiver
input.
2. Refer to LVDS Transmitter Data Sheet for detail descriptions. (THC63LVD103 or Compatible)
3. „7‟ means MSB and „0‟ means LSB at R,G,B pixel data.
Ver. 1.0 33 /37
LC320DXJ
Product Specification
# APPENDIX- IV
■ LVDS Data-Mapping Information (8 Bit )
RCLKP
RCLKM
RAP R13’ R12’ G12 R17 R16 R15 R14 R13 R12 G12”
RBP G14’ G13’ B13 B12 G17 G16 G15 G14 G13 B13”
RCP B15’ B14’ DE VSYNC HSYNC B17 B16 B15 B14 DE”
RCLKP
RCLKM
RAP R11’ R10’ G10 R15 R14 R13 R12 R11 R10 G10”
RBP G12’ G11’ B11 B10 G15 G14 G13 G12 G11 B15”
RCP B13’ B12’ DE VSYNC HSYNC B15 B14 B13 B12 DE”
# APPENDIX- V
■ Option Pin Circuit Block Diagram
1KΩ
LVDS Select
(Pin 7) LVDS Select
50kΩ
ASIC
(TCON)
■ Flicker Adjustment
Position - Center
R G B R G B R G B R G B R G B
Row 1
Row 3
0Gray
Row 4
SCL
PMIC
SDA
B A : Pull-up Resistors
(If it is necessary)
Adjustment JIG LCD Module B : I2C Connector
(Refer to Appendix IX)