A 2.2 W, Current Sensing Readout Interface IC With Injection-Locking Clock Generation
A 2.2 W, Current Sensing Readout Interface IC With Injection-Locking Clock Generation
A 2.2 W, Current Sensing Readout Interface IC With Injection-Locking Clock Generation
7, JULY 2016
Abstract—This paper presents a wireless-powering curren- a point of care, these devices need to be capable of portable
t-sensing readout system on a CMOS platform for portable elec- biomedical analysis at a low cost. With the advent of CMOS
trochemical measurement. The wireless sensing system includes technology, an electrochemical sensor array can be integrated
energy-efficient power management circuitry, a sensor readout
interface, and a backscattering wireless communication scheme. on a single silicon chip [4] for bio-implants and wearables.
For power-and-area-constrained bio-sensing applications, the The dense sensing array, small form factor, and reduced long
proposed readout circuitry incorporates an ultra-low-power po- external connections of these microsystems extend the limit
tentiostatic system that generates a current according to the elec- of detection resolution by improving the signal-to-noise ratio
trochemical reaction, as well as an oscillator-based time-to-digital and reducing environmental interference coupling. The de-
converter instead of a voltage-domain analog-to-digital converter.
To avoid a bulky battery and power-hungry clock reference, the velopment of a CMOS-based electrochemical platform would
chip is wirelessly powered and injection-locked by the modulated enable a new breed of highly valuable biological research and
radio waves, which includes a 918 MHz carrier signal mixed applications. However, despite the extreme potential of CMOS
with a 3.2 MHz modulated signal. The chip, implemented using electrochemical sensors, portable biomedical analysis is still
a 0.18-μm CMOS process, occupies a silicon area of 1 mm2 . The limited to the complexity of the associated interfaces and bulky
proposed design achieves a sensitivity of 289 Hz/nA and an R2
linearity of 0.997 over a current range of 200 nA while consuming energy storage components.
2.2 μW at a supply voltage of 0.8 V. The chip, integrated with Many CMOS potentiostats and electrochemical impedance
a PCB antenna, has minimum sensitivities of −12 dBm and spectroscopy circuits have been reported in the literature
−25 dBm for RF-powering and injection-locking mechanisms, [4]–[10]. An active CMOS sensor array [5], which is integrated
respectively. with potentiostats, a controlled amplifier, and dual-slope ADCs,
Index Terms—Electrochemical sensing, reference-free, temper- performs biomolecular detection by accessing the current flow
ature stabilization. from the biochemical reaction on a gold electrode surface.
The design complexity of using ADCs and precise clock gen-
I. I NTRODUCTION eration increases the power consumption, which makes the
sustainability of long-term operation using a miniature battery
Fig. 4. VGS variations of thin and thick gate oxide and the difference between
Fig. 2. Schematic of the proposed CMOS-only bandgap. them at five process corners.
where the temperature-dependent threshold voltage is reference. By summing the two voltages, the temperature-
Vth = Vth0 − α · T (α > 0) (3) independent voltage can be attained as follows:
and the subtraction of the threshold voltages between two nkT W5 L6 nkT (μCox )2 W2 L1
VREF = ln + ln +ΔVth .
transistors can be represented by q W6 L5 q (μCox )1 W1 L2
(5)
ΔVth = ΔVth0 − (αx − αy ) · T. (4)
From (5), since the temperature-dependent coefficient of the
In (2), the first term is a proportional to absolute temperature bandgap reference is related to the difference between two
(PTAT) voltage, and the second term is a complementary to transistors, the mobility and size deviations can be cancelled.
absolute temperature (CTAT) voltage. First, assuming two tran- Fig. 4 shows the simulation results of the VGS variations of a
sistors with the same length and gate thickness, the threshold single transistor and after subtraction over corners. The voltage
voltage is equal. Therefore, the gate-source voltage difference deviations of a single transistor can be larger than ±10%;
creates a PTAT voltage reference. While using two different when the voltage difference is used, the voltage deviations
transistor gate thicknesses, VGSx − VGSy becomes a CTAT are reduced to ±3.5%. The simulation results of the output
voltage reference since ΔVth becomes dominant. Fig. 3 shows voltage versus over five typical process corners of the proposed
the simulated temperature-caused voltage deviations between voltage reference circuit from −30 ◦ C to 130 ◦ C are shown in
thin and thick gate oxide transistors at the same bias current. Fig. 5. In addition, from (5), VREF does not depend on the
In this design, to ensure the same bias current, the transistors supply voltage (Vdd), and thus this architecture can achieve
are stacked to generate the temperature-dependent voltage. high power-supply rejection. Fig. 6 shows the Monte Carlo
Moreover, thin-thickness transistors, M5 and M6 , are used for simulation results. Among 200 runs, the standard deviation of
the PTAT voltage reference; a thin-thickness transistor (M2 ) the voltage deviations from the average voltage (310 mV) is
and a thick-thickness transistor (M1 ) create a CTAT voltage about 4.8%.
LIN et al.: A 2.2 μW, −12 dBm RF-POWERED WIRELESS CURRENT SENSING READOUT INTERFACE IC 953
C. Potentiostat of the counter. Since the frequency counter filters out high-
frequency noise, the noise is mainly contributed by the low-
A conventional electrochemical sensor converts the product
frequency fluctuation and clock noise.
of biochemical reactions to an electrical current, which can
Fig. 7(b) shows the schematic of the proposed charge-based
be analyzed using electronic signal conditioning and process-
oscillator. An offset cancellation technique [22] is applied by
ing devices. Generally, an electrochemical sensor consists of
switching the inputs of the comparator in each half period
three electrodes: a working electrode (WE) for an oxidation
to eliminate the period fluctuation. In the first half cycle, the
or reduction process, a reference electrode (RE) for providing
positive input of the comparator is connected to the reference
reference potentials, and a counter electrode (CE) for electrical
voltage, and the other side is connected to the capacitor (C1 ),
current collection. The electrodes require a potentiostat inter-
which is charged by the sensing current from the output of the
face, which is used to sense the current from the sensor and to
potentiostat until the voltage reaches VREF . In the next half
provide a stable potential difference between the RE and WE by
cycle, this capacitor (C1 ) is discharged to ground, and the other
injecting the proper current into the counter electrode according
capacitor (C2 ) begins to be charged until its voltage reaches
to the biochemical reaction for charge balance.
VREF . The offset voltage of the comparator is presented in each
A transimpedance amplifier is one of the common current
half cycle, thereby leading to a constant period. The half period
readout circuit topologies [18]. However, transimpedance am-
(Tφ=1 , Tφ=0 ) can be calculated as follows:
plifiers use a large amount of power and large silicon areas due
to the use of two operational amplifiers and resistors, which CVREF CVOS
always occupy a large area, especially in a low-power design. Tφ=1 = + +tdelay (7)
IPTAT + ISense IPTAT + ISense
To achieve area-and-power efficiency, a current-mirror-based
topology [19] is employed in this design. CVREF CVOS
Fig. 7(a) shows the schematic of the current-mirror-based Tφ=0 = − +tdelay (8)
IPTAT + ISense IPTAT + ISense
potentiostat. A voltage feedback loop is employed to force and
stabilize the voltage difference across the WE and RE. The where C is the capacitance of C1 and C2 , IPTAT is the biased
reaction current through the CE is collected by a pass transistor current, ISense is the sensing current from the potentiostat,
(Mp1 ), and then mirrored to a demodulator for digitization and VREF is the reference voltage, VOS is the offset voltage of the
decoding. The current mirror herein provides isolation between comparator, and tdelay is the delay time of the Schmitt trigger
the sensor electrodes and the demodulator, thereby reducing and inverters. The Schmitt trigger is used to improve the noise
the coupling effects. The reference voltage (0.4 V) is divided tolerance of the oscillator. By taking the sum of (7) and (8), the
from the regulated supply voltage using pseudo-resistors [20], period of the oscillator can be derived
which are built with reversely-biased transistors to save power
and area.
CVREF
T=2 + tdelay (9)
IPTAT + ISense
D. Current-to-Frequency Converter
Instead of converting the current to voltage for digitization, where T is the period generated by the oscillator. From (9), the
this design adopts a frequency/time domain digitization ar- offset voltage of the comparator has no effect on the period,
chitecture for lower power consumption and a smaller area. resulting in stable frequency outputs. Moreover, the frequency
For counter-based time-to-digital converter (TDC), according stability is mainly dominated by the stability of VREF . To
to [21], the frequency noise can be expressed as improve the stability, the reference voltage (VREF ) is created
∞ by the voltage division from the stable regulator output, which
Δωn.,rms = Sφ (ω) · (jω)2 |HLPF (ω)|2 dω
2
(6) follows the on-chip bandgap voltage reference. The voltage di-
vider is implemented using reversely-biased transistors to save
0
area. The PTAT current is used to compensate for the frequency
where SΦ(ω) is the SSB phase noise of the oscillator and drifts due to temperature variations. For further cancellation of
HLPF (ω) is the transfer function due to the averaging function low-frequency drifts, the measurement is switched between the
954 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 63, NO. 7, JULY 2016
Fig. 12. Simulation results of (a) |S11| and (b) the radiation pattern at
918 MHz. Fig. 16. Measured power supply rejection of the bandgap reference.
Fig. 19. Measured results of (a) output frequency versus the supply voltage
and (b) output frequency versus temperatures of the current readout circuit.
Fig. 23. Assembled PCB of antenna and the wireless current readout IC (front
and back sides).
Fig. 20. Measured Allan deviation of the sensing oscillator at a central fre-
quency of 2 kHz.
TABLE I
P ERFORMANCE C OMPARISON
from 1 V to 2.6 V, giving a supply sensitivity of 0.96%/V. half period of 10.9 ms, the output frequency of the free-running
Fig. 19(b) shows the measured frequency drifts of the sensing oscillator is transmitted, and then in the next half cycle, the
oscillator from temperature changes. The frequency drifts over sensing data are transmitted for data extraction and calibration.
the range of 0–100 ◦ C are about 100 Hz. Fig. 20 shows Table I shows the performance summary and the comparisons
the measured Allan deviations of the sensing oscillator. The with state-of-the-art RF-powered wireless current readout cir-
minimum residual frequency noise is about 0.9 Hz at a one- cuitry. Compared to other works, this design achieves low
second integral time window. power consumption and high-precision current sensing without
To mimic the current changes of the electrochemical sensor, a bulky crystal oscillator and battery.
the widely-used resistor model from [19] is adopted. The cur-
rent injected to the readout circuits is changed by adjusting the V. C ONCLUSION
resistor (WE) and the voltage across WE is fixed at 0.4 V by
the potentiostat. Fig. 21 shows the measured output frequency This paper presents an RF-powered, wireless current sensing
of the charge-based oscillator versus the injected current. The readout IC with an injection locking clock generation. The
measured R2 linearity is 0.9975, and the conversion gain is carrier signal of 918 MHz radio waves is rectified for DC power
0.289 kHz/nA in the current range of 200 nA. In this design, generation and the periodical 3.2 MHz modulation signal is
the minimum detectable current is 3 pA (0.9 Hz/289 Hz/nA). extracted for an injection-locked clock reference. Temperature-
Fig. 22 shows the results of continuous current flow measure- stable CMOS-only bias circuitry and compensation schemes
ment. The current flow is injected to the readout circuitry with are used to reduce the low-frequency drifts caused by envi-
increments of 10 nA. Finally, the converted current is digitized ronmental variations. A 160-nW on-chip CMOS-only bandgap
by the frequency counter and encoded with the header to drive reference provides a stable output voltage of 0.3 V with a
the load modulator. temperature coefficient of 30 ppm/◦ C over a temperature range
of 0–100 ◦ C and a PSR of −56 dB while the standard deviation
is 6.5 mV over 26 sample measurements. The design achieves
D. System
a current-to-frequency conversion gain of 0.289 kHz/nA and
Fig. 23 shows the photos of the assembled PCB of the an R2 linearity of 0.9975 while only consuming 2.2 μW.
antenna and the wireless current readout chip. The chip is The chip can be wirelessly powered by −12 dBm incident
placed on the one side of the PCB and the antenna is fabricated RF power and only occupies 1 mm2 silicon area without any
on the other side to avoid the strong coupling between the bulky crystal reference or battery. The design offers a power-
two. Fig. 24 depicts the measured output digital codes from the and-area-constrained solution for wearable and implantable
modulator when an injection current of 100 nA is applied. In a electrochemical sensing applications.
LIN et al.: A 2.2 μW, −12 dBm RF-POWERED WIRELESS CURRENT SENSING READOUT INTERFACE IC 959