INTEGRATED CIRCUITS

DATA SHEET

74HC/HCT258
Quad 2-input multiplexer; 3-state;
inverting
Product specification 1999 Sep 02
File under Integrated Circuits, IC06
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

FEATURES Data appears at the outputs (1Y to 4Y) in inverted form

from the select inputs.
Inverting data path
3-state outputs interface directly with system bus The 258 is the logic implementation of a 4-pole, 2-position
switch, where the position of the switch is determined by
Output capability: bus driver
the logic levels applied to S. The outputs are forced to a
ICC category: MSI. high impedance OFF-state when OE is HIGH.
The logic equations for the outputs are:
GENERAL DESCRIPTION
The 74HC/HCT258 are high-speed Si-gate CMOS devices 1Y = OE ( 1I 1 S + 1I 0 S )
and are pin compatible with Low power Schottky TTL
2Y = OE ( 2I 1 S + 2I 0 S )
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
3Y = OE ( 3I 1 S + 3I 0 S )
The 74HC/HCT258 have four identical 2-input multiplexers
with 3-state outputs, which select 4 bits of data from two 4Y = OE ( 4I 1 S + 4I 0 S )
sources and are controlled by a common data select
input (S). The 258 is identical to the 257 but has inverting outputs.

The data inputs from source 0 (1I0 to 4I0) are selected

when input S is LOW and the data inputs from source 1
(1I1 to 4I1) are selected when S is HIGH.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 C; tr = tf = 6 ns.

TYPICAL
SYMBOL PARAMETER CONDITIONS UNIT
HC HCT
tPHL/tPLH propagation delay CL = 15 pF;
nI0, nI1 to nY VCC = 5 V 9 13 ns
S to nY 14 16 ns
CI input capacitance 3.5 3.5 pF
CPD power dissipation capacitance per multiplexer notes 1 and 2 55 38 pF

Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD VCC2 fi + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
(CL VCC2 fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. For HC the condition is VI = GND to VCC;
For HCT the condition is VI = GND to VCC 1.5 V.

1999 Sep 02 2
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

ORDERING INFORMATION

PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
74HC258N; DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1
74HCT258N
74HC258D; SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HCT258D
74HC258DB SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

1 S common data select input
2, 5, 11 and 14 1I0 to 4I0 data inputs from source 0
3, 6, 10 and 13 1I1 to 4I1 data inputs from source 1
4, 7, 9 and 12 1Y to 4Y 3-state multiplexer outputs
8 GND ground (0 V)
15 OE 3-state output enable input (active LOW)
16 VCC positive supply voltage

fpage 1
1 G1
fpage fpage
S 1 16 VCC 15
S EN
2 1I0
1I0 2 15 OE 1Y 4
3 1I1
2 MUX
1I1 3 14 3I0 1
5 2I0 4
2Y 7 3
1Y 4 13 3I1 6 2I1 1
258
2I0 5 12 4Y 14 3I0 5
3Y 9 7
13 3I1 6
2I1 6 11 4I0
11 4I0 11
2Y 7 10 4I1 4Y 12 9
10 4I1 10
GND 8 9 3Y 15 OE 14
12
MGA830 13
MGA832

MGA831

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

1999 Sep 02 3
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

handbook, full pagewidth 2 3 5 6 14 13 11 10

1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1

1 S
SELECTOR

15 OE
3-STATE MULTIPLEXER OUTPUTS

1Y 2Y 3Y 4Y
4 7 12 9 MBL095

Fig.4 Functional diagram.

FUNCTION TABLE
See note 1
INPUTS OUTPUT
1I0
OE S nI0 nI1 nY
1Y
H X X X Z
1I1
L H X L H
L H X H L
2I0
L L L X H
L L H X L 2Y
2I1
Note
1. H = HIGH voltage level; 3I0
L = LOW voltage level;
X = dont care; 3Y
3I1
Z = high impedance OFF-state.

4I0

4Y
4I1

OE

MBL096
S

Fig.5 Logic diagram.

1999 Sep 02 4
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

DC CHARACTERISTICS FOR 74HC

For the DC characteristics see chapter HCMOS family characteristics, section Family specifications.
Output capability: bus driver.
ICC category: MSI.

AC CHARACTERISTICS FOR 74HC

GND = 0 V; tr = tf = 6 ns; CL = 50 pF.

Tamb (C) TEST CONDITIONS

SYMBOL PARAMETER 25 40 to +85 40 to +125 UNIT V
CC
WAVEFORMS
MIN. TYP. MAX. MIN. MAX. MIN. MAX. (V)

tPHL/tPLH propagation delay; 30 95 120 145 ns 2.0 see Fig.6

nI0 to nY; nI1 to nY 11 19 24 29 4.5
9 16 20 25 6.0
propagation delay; 47 140 175 210 ns 2.0 see Fig.6
S to nY 17 28 35 42 4.5
14 24 30 36 6.0
tPZH/tPZL 3-state output 39 140 175 210 ns 2.0 see Fig.7
enable time 14 28 35 42 4.5
OE to nY
11 24 30 36 6.0
tPHZ/tPLZ 3-state output 55 150 190 225 ns 2.0 see Fig.7
disable time 20 30 38 45 4.5
OE to nY
16 26 33 38 6.0
tTHL/tTLH output transition 14 60 75 90 ns 2.0 see Fig.6
time 5 12 15 18 4.5
4 10 13 15 6.0

1999 Sep 02 5
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see chapter HCMOS family characteristics, section Family specifications.
Output capability: bus driver.
ICC category: MSI.

Note to HCT types

The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications.
To determine ICC per input, multiply this value by the unit load coefficient shown in Table 1.

Table 1
INPUT UNIT LOAD COEFFICIENT
nI0 0.50
nI1 0.50
OE 1.50
S 1.50

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; tr = tf = 6 ns; CL = 50 pF.

Tamb (C) TEST CONDITIONS

SYMBOL PARAMETER 25 40 to +85 40 to +125 UNIT VCC
WAVEFORMS
MIN. TYP. MAX. MIN. MAX. MIN. MAX. (V)

tPHL/tPLH propagation delay; 16 27 34 41 ns 4.5 see Fig.6

nI0 to nY; nI1 to nY
propagation delay; 19 34 43 51 ns 4.5 see Fig.6
S to nY
tPZH/tPZL 3-state output enable 18 30 38 45 ns 4.5 see Fig.7
time; OE to nY
tPHZ/tPLZ 3-state output disable 17 30 38 45 ns 4.5 see Fig.7
time; OE to nY
tTHL/tTLH output transition time 5 12 15 18 ns 4.5 see Fig.6

1999 Sep 02 6
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

AC WAVEFORMS

handbook, full pagewidth

S, nl0, nl1 INPUT VM(1)

tPHL tPLH

nY OUTPUT VM(1)

MBL097
tTHL tTLH

(1) HC: VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.6 Waveforms showing input (nI0, nI1 and S) to output (nY) propagation delays and output transition times.

handbook, full pagewidth tr tf

OE INPUT VM(1)

tPLZ tPZL

OUTPUT
LOW-to-OFF VM(1)
OFF-to-LOW
10%

tPHZ tPZH

90%
OUTPUT
HIGH-to-OFF VM(1)
OFF-to-HIGH

outputs outputs outputs

MBL098 enabled disabled enabled

(1) HC: VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.7 Waveforms showing the 3-state enable and disable times.

1999 Sep 02 7
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

PACKAGE OUTLINES
DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1

D ME
seating plane

A2 A

A1
L

c
Z e w M
b1
(e 1)
b
16 9 MH

pin 1 index
E

1 8

0 5 10 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

UNIT
A A1 A2
b b1 c D (1) E (1) e e1 L ME MH w Z (1)
max. min. max. max.
1.40 0.53 0.32 21.8 6.48 3.9 8.25 9.5
mm 4.7 0.51 3.7 2.54 7.62 0.254 2.2
1.14 0.38 0.23 21.4 6.20 3.4 7.80 8.3
0.055 0.021 0.013 0.86 0.26 0.15 0.32 0.37
inches 0.19 0.020 0.15 0.10 0.30 0.01 0.087
0.045 0.015 0.009 0.84 0.24 0.13 0.31 0.33

Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

92-10-02
SOT38-1 050G09 MO-001AE
95-01-19

1999 Sep 02 8
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

D E A
X

y HE v M A

16 9

Q
A2
(A 3) A
A1
pin 1 index

Lp

1 8 L

e w M detail X
bp

0 2.5 5 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1)

0.25 1.45 0.49 0.25 10.0 4.0 6.2 1.0 0.7 0.7
mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1 o
0.10 1.25 0.36 0.19 9.8 3.8 5.8 0.4 0.6 0.3 8
0.010 0.057 0.019 0.0100 0.39 0.16 0.244 0.039 0.028 0.028 0o
inches 0.069 0.01 0.050 0.041 0.01 0.01 0.004
0.004 0.049 0.014 0.0075 0.38 0.15 0.228 0.016 0.020 0.012

Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

95-01-23
SOT109-1 076E07S MS-012AC
97-05-22

1999 Sep 02 9
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

D E A
X

c
y HE v M A

16 9

Q
A2 A
A1 (A 3)

pin 1 index

Lp
L

1 8 detail X

w M
e bp

0 2.5 5 mm
scale

DIMENSIONS (mm are the original dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1)
max.
o
0.21 1.80 0.38 0.20 6.4 5.4 7.9 1.03 0.9 1.00 8
mm 2.0 0.25 0.65 1.25 0.2 0.13 0.1
0.05 1.65 0.25 0.09 6.0 5.2 7.6 0.63 0.7 0.55 0o

Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

94-01-14
SOT338-1 MO-150AC
95-02-04

1999 Sep 02 10
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

SOLDERING Typical reflow peak temperatures range from

215 to 250 C. The top-surface temperature of the
Introduction
packages should preferable be kept below 230 C.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in WAVE SOLDERING
our Data Handbook IC26; Integrated Circuit Packages
Conventional single wave soldering is not recommended
(document order number 9398 652 90011).
for surface mount devices (SMDs) or printed-circuit boards
There is no soldering method that is ideal for all IC with a high component density, as solder bridging and
packages. Wave soldering is often preferred when non-wetting can present major problems.
through-hole and surface mount components are mixed on
To overcome these problems the double-wave soldering
one printed-circuit board. However, wave soldering is not
method was specifically developed.
always suitable for surface mount ICs, or for printed-circuit
boards with high population densities. In these situations If wave soldering is used the following conditions must be
reflow soldering is often used. observed for optimal results:
Use a double-wave soldering method comprising a
Through-hole mount packages turbulent wave with high upward pressure followed by a
SOLDERING BY DIPPING OR BY SOLDER WAVE smooth laminar wave.

The maximum permissible temperature of the solder is For packages with leads on two sides and a pitch (e):
260 C; solder at this temperature must not be in contact larger than or equal to 1.27 mm, the footprint
with the joints for more than 5 seconds. The total contact longitudinal axis is preferred to be parallel to the
time of successive solder waves must not exceed transport direction of the printed-circuit board;
5 seconds. smaller than 1.27 mm, the footprint longitudinal axis
The device may be mounted up to the seating plane, but must be parallel to the transport direction of the
the temperature of the plastic body must not exceed the printed-circuit board.
specified maximum storage temperature (Tstg(max)). If the The footprint must incorporate solder thieves at the
printed-circuit board has been pre-heated, forced cooling downstream end.
may be necessary immediately after soldering to keep the For packages with leads on four sides, the footprint must
temperature within the permissible limit. be placed at a 45 angle to the transport direction of the
printed-circuit board. The footprint must incorporate
MANUAL SOLDERING solder thieves downstream and at the side corners.
Apply the soldering iron (24 V or less) to the lead(s) of the During placement and before soldering, the package must
package, either below the seating plane or not more than be fixed with a droplet of adhesive. The adhesive can be
2 mm above it. If the temperature of the soldering iron bit applied by screen printing, pin transfer or syringe
is less than 300 C it may remain in contact for up to dispensing. The package can be soldered after the
10 seconds. If the bit temperature is between adhesive is cured.
300 and 400 C, contact may be up to 5 seconds.
Typical dwell time is 4 seconds at 250 C.
Surface mount packages A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of MANUAL SOLDERING
fine solder particles, flux and binding agent) to be applied Fix the component by first soldering two
to the printed-circuit board by screen printing, stencilling or diagonally-opposite end leads. Use a low voltage (24 V or
pressure-syringe dispensing before package placement. less) soldering iron applied to the flat part of the lead.
Several methods exist for reflowing; for example, Contact time must be limited to 10 seconds at up to
infrared/convection heating in a conveyor type oven. 300 C.
Throughput times (preheating, soldering and cooling) vary When using a dedicated tool, all other leads can be
between 100 and 200 seconds depending on heating soldered in one operation within 2 to 5 seconds between
method. 270 and 320 C.

1999 Sep 02 11
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

Suitability of IC packages for wave, reflow and dipping soldering methods

SOLDERING METHOD
MOUNTING PACKAGE
WAVE REFLOW(1) DIPPING
Through-hole mount DBS, DIP, HDIP, SDIP, SIL suitable(2) suitable
Surface mount BGA, SQFP not suitable suitable
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, not suitable(3) suitable
SMS
PLCC(4), SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended(4)(5) suitable
SSOP, TSSOP, VSO not recommended(6) suitable

Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1999 Sep 02 12
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

NOTES

1999 Sep 02 13
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

NOTES

1999 Sep 02 14
Philips Semiconductors Product specification

Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

NOTES

1999 Sep 02 15
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Philips Electronics N.V. 1999 SCA 67

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Printed in The Netherlands 245002/02/pp16 Date of release: 1999 Sep 02 Document order number: 9397 750 06308