1410 SoC Verification 2013 1v0
1410 SoC Verification 2013 1v0
1410 SoC Verification 2013 1v0
SoC testaus
2013
What is SoC?
SOC is an integrated circuit that forms an electronic
system, which is usually programmable to a degree
It may contain digital, analog, mixed-signal and radiofrequency functions on a single chip substrate
SoC typically contains
Processors subsystem(s)
Many (possibly hundreds of) memory subsystems
Interface(s) for external memory
High-speed on-chip interconnect subsystem(s)
External communication interface(s)
On-chip power and error monitoring and management
subsystem(s)
Generic
I/O
USB
I/F
Ethernet
I/F
Display
DMA
Graphics
Accelerator
CPU
CPU
Internal
Memory
Ext Mem
I/F
Touchscr
I/F
Internal
Memory
Bridge
High-speed data bus
Keyboard
I/F
Audio
I/F
Bridge
Internal
Memory
GPU
Camera
I/F
Interconnect Verification
Normally the first verification task in SoC verification
Connectivity
Correctness of wiring
Address mapping
Topology correctness in NoC architectures
Bridge
Slave
Slave
Slave
Master
Master
Slave
Master
Master
Memory
Stub
Slave
Memory
Stub
Slave
Slave
Bridge
Memory
Stub
Master
Slave
Slave
Master
Master
Internal
Memory
Ext Mem
I/F
Memory
Stub
Internal
Memory
Bridge
Internal
Memory
Verification IP (VIP)
Pre-defined and tested data generator for standard interface
Verification focuses on
Parameterization through register interface
Data transfer to/from interface
Interaction between interface and other components, e.g.
DMA functionality
USB
I/F
Ethernet
I/F
Ethernet
VIP
Memory
Stub
Master
Master
Touchscr
I/F
USB
VIP
Bridge
High-speed data bus
Keyboard
I/F
Audio
I/F
Bridge
Memory
Stub
Camera
VIP
Camera
I/F
Verification IP
Verification IP is a standalone plug and play
verification component that enables verification of the
DUT at block, subsystem and SoC level
VIP can act as a Bus Functional Model (BFM) to drive
DUT signals or monitor the signals and validate them
for correctness and data integrity
It may have a set of protocol checkers and test
scenarios to confirm compliance with the standards or
cover groups identifying corner cases and test
completeness
Verification IP (2)
VIP is always target or standard specific
The common VIPs available include
Mobile Industry Processor Interface (MIPI) protocols like DSI,
CSI, HSI, SlimBus, Unipro, DigRF & RFFE
Bus protocols like AXI, AHB, APB, OCP & AMBA4
Interfaces like PCIexpress, USB2.0, USB3.0, Interlaken,
RapidIO, JTAG, CAN, I2C, I2S, UART & SPI
Memory models & protocol checkers for SD/SDIO, SATA,
SAS, ATAPI, DDR2/DDR3, LPDDR etc
Generic
I/O
USB
I/F
Ethernet
I/F
Display
DMA
Graphics
Accelerator
Virtual
CPU
Virtual
CPU
Memory
Stub
Ext Mem
I/F
Touchscr
I/F
Memory
Stub
Bridge
High-speed data bus
Keyboard
I/F
Audio
I/F
Bridge
Memory
Stub
Virtual
GPU
Camera
I/F
Requirement capture
Specification
Hardware verification and validation
Software development and integration
System validation
Processors
Interconnect (except in interconnect test!)
Memories
Interface peripherals
Summary
SoC verification expects that a thorough block-level
verification is done separately
SoC-level verification focuses on
system level HW functionality
connectivity
interaction between the blocks
Interconnect tests
Memory subsystem tests
Communication interface tests
Software driven tests