DSDUnit1

Digital design in the context of DSD (Digital System Design) refers to creating systems or
circuits that operate using digital signals (typically 0s and 1s). These systems can be as
simple as a logic gate or as complex as a computer.

Here’s a simple introduction:

1. Basics of Digital Systems:

 Digital signals are discrete, meaning they have only two states: 0 (low voltage) and 1
(high voltage).
 Digital systems process these signals using components like logic gates (AND, OR,
NOT) to perform operations.

2. Components of Digital Systems:

 Logic Gates: These are basic building blocks that perform logical operations (AND,
OR, NOT).
 Combinational Circuits: Circuits where the output is based only on the current
inputs. Examples include adders and multiplexers.
 Sequential Circuits: Circuits where the output depends on both current inputs and
past states (history). Examples are flip-flops and counters.

3. Design Process:

 Specification: Defining what the system needs to do.

 Design: Using tools like Boolean algebra or HDLs (Hardware Description
Languages) like Verilog or VHDL to design the system.
 Implementation: Creating the actual hardware or simulation of the design, often
using FPGAs (Field-Programmable Gate Arrays).

4. Advantages of Digital Design:

 Accuracy: Less prone to noise compared to analog signals.

 Storage: Digital data can be easily stored and retrieved.
 Automation: Easy to automate and scale.

Electronics aspects of digital design

Digital design is a field that involves the creation and optimization of digital circuits and systems. This
process encompasses several electronics aspects, which are critical for the proper functioning,
efficiency, and reliability of digital devices.

Here are some key electronics aspects of digital design:

1. Logic Gates and Circuits

Basic Logic Gates: Digital design begins with understanding basic logic gates like AND, OR, NOT,
NAND, NOR, XOR, and XNOR. These gates are the building blocks of all digital circuits.

Combinational Circuits: These circuits combine multiple logic gates to perform specific operations
like addition, subtraction, and data comparison. Examples include multiplexers, decoders, and
adders.

Sequential Circuits: These circuits, like flip-flops and registers, store information and are used in
memory elements and finite state machines.

2. Digital Signal Representation

Binary System: Digital electronics represent data using binary digits (0 and 1). Understanding binary
arithmetic, including addition, subtraction, multiplication, and division, is essential.

Boolean Algebra: Boolean algebra is the mathematical framework used to analyze and simplify
digital logic circuits.

Number Systems: Knowledge of various number systems (binary, octal, hexadecimal) is crucial,
especially for tasks like coding, addressing, and data representation.

3. Timing Analysis

Clock Signals: Digital systems often operate on clock signals that synchronize the operation of
different components. The design must account for clock frequency, duty cycle, and phase.

Propagation Delay: The time taken for a signal to propagate through a circuit element can affect the
overall speed of the system. Timing analysis ensures that the circuit meets the required speed and
timing constraints.

Setup and Hold Times: These are critical parameters for the correct operation of flip-flops and other
sequential elements, ensuring data is correctly latched.

4. Power Consumption

Power Dissipation: Digital circuits consume power, and managing this power consumption is vital,
especially in portable and battery-powered devices. Techniques like clock gating and power gating
are used to reduce power usage.

Dynamic and Static Power: Dynamic power is consumed during switching (due to charging and
discharging of capacitors), while static power is consumed due to leakage currents even when the
circuit is idle.

5. Noise and Signal Integrity

Noise Margins: Digital circuits must tolerate some level of noise. The noise margin is the amount of
noise that can be superimposed on a signal without causing an error in the logic level interpretation.
Signal Integrity: Signal integrity involves ensuring that the signal maintains its integrity over long
distances or at high speeds, preventing issues like crosstalk, reflection, and attenuation.

6. Circuit Design Techniques

CMOS Technology: Complementary Metal-Oxide-Semiconductor (CMOS) is the most common

technology used in digital circuit design due to its low power consumption and high noise immunity.

RTL (Register Transfer Level) Design: RTL design is a high-level abstraction used to describe the
operation of digital circuits in terms of data flow between registers.

VLSI (Very Large Scale Integration): VLSI involves integrating thousands or millions of transistors onto
a single chip, enabling complex digital systems like microprocessors and memory chips.

7. Data Path and Control Path Design

Data Path: The data path involves the components (like ALUs, registers, and multiplexers) that
process data. It is designed to ensure efficient data processing and transfer.

Control Path: The control path manages the operation of the data path by generating control signals
based on the input conditions and the state of the system.

8. Memory Design

RAM/ROM: Understanding the design and operation of different types of memory, including volatile
(RAM) and non-volatile (ROM) memory, is crucial in digital design.

Memory Hierarchy: Efficient memory design considers the hierarchy (cache, main memory, storage)
to optimize speed, cost, and power consumption.

9. Testing and Debugging

Design for Testability (DFT): Ensuring that the digital design can be easily tested for manufacturing
defects is essential. Techniques like boundary scan, Built-In Self-Test (BIST), and scan chains are
used.

Simulation and Verification: Before physical implementation, digital designs are simulated to verify
their correctness and performance using tools like Verilog, VHDL, or SystemC.

10. Hardware Description Languages (HDLs)

Verilog/VHDL: These are languages used to model and simulate digital circuits at a high level. They
are essential for designing, verifying, and synthesizing digital systems.

Behavioral and Structural Descriptions: Understanding the different levels of abstraction in HDLs
allows designers to model complex systems efficiently.

11. Physical Design Considerations

Layout Design: The physical layout of the circuit on silicon, considering factors like area, routing, and
placement, is crucial for performance and manufacturability.
Fabrication: Understanding the fabrication process and its impact on the design, including
considerations like lithography, doping, and etching, is important.

These electronics aspects form the foundation of digital design and are crucial for creating efficient,
reliable, and high-performance digital systems, whether in the form of simple logic circuits or
complex integrated circuits like microprocessors.

Software aspects of digital design

The software aspects of digital design are critical in modern electronics and computing, as
they enable the creation, simulation, optimization, and validation of digital systems. Here are
the key software-related aspects of digital design:

1. Hardware Description Languages (HDLs)

 Verilog and VHDL: These are the most commonly used HDLs for digital design.
They allow designers to describe the behavior and structure of digital circuits at
various levels of abstraction (from high-level behavioral descriptions to detailed gate-
level implementations).
 SystemVerilog: An extension of Verilog, SystemVerilog includes additional features
for design and verification, making it widely used in complex digital design projects.

2. Electronic Design Automation (EDA) Tools

 Schematic Capture: Tools like Cadence Virtuoso and OrCAD allow designers to
create circuit schematics that can be translated into digital designs.
 Simulation and Verification Tools: These tools, such as ModelSim, Questa, and
VCS, are used to simulate digital designs to verify their functionality before hardware
implementation. They help in identifying and fixing bugs early in the design process.
 Synthesis Tools: Tools like Synopsys Design Compiler and Xilinx Vivado convert
HDL code into gate-level netlists that can be mapped to physical hardware. Synthesis
includes optimization for area, speed, and power consumption.
 Place-and-Route (P&R): After synthesis, tools like Cadence Innovus or Synopsys IC
Compiler are used to place the synthesized gates onto a physical chip layout and route
the interconnections, considering timing constraints and physical limitations.

3. Digital Design Verification

 Formal Verification: Formal methods mathematically prove that a design adheres to

its specifications, using tools like JasperGold or Cadence Conformal. This is crucial
for safety-critical applications.
 Testbenches and Simulation: Writing testbenches in HDLs or using dedicated
verification languages like SystemVerilog or UVM (Universal Verification
Methodology) allows for thorough testing of digital designs under various scenarios.
 Assertion-Based Verification (ABV): ABV involves embedding assertions in the
HDL code to check for specific properties during simulation, ensuring that the design
behaves as expected under all conditions.
4. High-Level Synthesis (HLS)

 C/C++/SystemC-Based Design: HLS tools like Xilinx Vivado HLS or Intel HLS
Compiler allow designers to describe functionality at a higher level (using languages
like C, C++, or SystemC) and then automatically generate RTL code (HDL) for
synthesis. This speeds up the design process and allows for easier exploration of
different design architectures.
 Algorithmic Design: HLS is particularly useful in designing complex algorithms for
digital signal processing (DSP), video processing, and machine learning, enabling a
faster path from concept to implementation.

5. Embedded Software Development

 Firmware Development: Firmware is the low-level software that directly interacts

with the hardware. It is typically written in C or assembly language and is essential in
controlling the behavior of digital systems, especially in embedded designs.
 Driver Development: For SoCs and embedded systems, developing hardware drivers
that allow software to interact with peripherals (like sensors, actuators, or
communication modules) is crucial.
 Real-Time Operating Systems (RTOS): In embedded systems that require real-time
processing, an RTOS like FreeRTOS, VxWorks, or Zephyr is used to manage task
scheduling, timing, and resource management.

6. FPGA Programming

 FPGA Toolchains: FPGA design involves using specific tools like Xilinx Vivado,
Intel Quartus, or Lattice Diamond to map HDL designs to FPGA hardware. These
tools handle synthesis, simulation, and configuration of the FPGA.
 Soft Processors and IP Cores: Software libraries and pre-designed IP cores (e.g.,
soft processors like MicroBlaze or Nios II) are used to implement complex
functionalities on FPGAs, allowing for customizable digital designs.

7. Software-Defined Hardware (SDH)

 Reconfigurable Computing: In systems like FPGAs, software can dynamically

reconfigure the hardware to perform different tasks at different times. This is essential
in fields like AI/ML, where hardware needs to adapt to various algorithms.
 Hardware Acceleration: Using software to control hardware accelerators (e.g.,
GPUs, TPUs) is a growing trend, particularly in AI and data processing. This involves
writing software that offloads computationally intensive tasks to specialized
hardware.

8. Algorithm Development

 Digital Signal Processing (DSP) Algorithms: Software plays a significant role in

designing and optimizing DSP algorithms for applications like audio, video,
communications, and radar. Tools like MATLAB and Simulink are often used for
algorithm development and simulation.
  Machine Learning (ML) and AI Integration: Software frameworks like
TensorFlow, PyTorch, and Caffe are used to design and train machine learning
models, which can then be deployed on digital hardware (e.g., FPGAs, ASICs) for
inference.

9. Modeling and Simulation

 Behavioral Simulation: Tools like MATLAB, Simulink, and SystemC are used for
high-level modeling and simulation of digital systems, allowing designers to explore
different architectures and verify system behavior before detailed implementation.
 Co-Simulation: Co-simulation combines hardware and software simulation, enabling
designers to test the interaction between hardware components and embedded
software early in the design process.

10. Security and Cryptography

 Security Features: Software is essential for implementing and managing security

features in digital designs, such as encryption/decryption algorithms, secure boot, and
hardware security modules (HSMs).
 Cryptographic Hardware Design: Designers use software to create and test
cryptographic algorithms that are then implemented in hardware for secure data
processing.

11. Automated Testing and Continuous Integration (CI)

 Automated Testing: In modern digital design workflows, automated testing tools are
used to continuously verify that changes in the design or software do not introduce
errors. Tools like Jenkins and GitLab CI can be integrated with EDA tools to
automate simulation and verification processes.
 Continuous Integration/Continuous Deployment (CI/CD): CI/CD pipelines are
increasingly used in digital design, especially when hardware and software are
developed concurrently. This approach ensures that designs are always in a
deployable state and that any integration issues are quickly identified.

12. Virtual Prototyping

 System-Level Design: Virtual prototyping tools, such as QEMU or Synopsys

Virtualizer, allow designers to create a software-based model of the entire system,
enabling early software development and system testing before physical hardware is
available.
 Emulation: Hardware emulation platforms (like Cadence Palladium or Synopsys
ZeBu) are used to emulate the design on FPGAs or custom hardware to allow for
faster testing and validation of complex systems.

13. Graphical User Interface (GUI) Design for Digital Systems

 GUI Tools: For digital systems that include user interaction, GUI design tools like
Qt, Tkinter, or custom web-based interfaces are used to create user interfaces that
allow for easy interaction with the digital system.
  Human-Machine Interface (HMI): In industrial and automotive systems, HMI
design involves creating intuitive and responsive interfaces that allow users to
monitor and control complex digital systems.

14. Power and Thermal Management

 Software for Power Optimization: Software tools are used to optimize power
consumption by dynamically adjusting the operation of different parts of the digital
system based on workload, using techniques like dynamic voltage and frequency
scaling (DVFS).
 Thermal Management Software: Software is also used to monitor and manage the
thermal profile of digital systems, ensuring that components do not overheat, which is
critical in high-performance computing and mobile devices.

15. Design for Testability (DFT)

 DFT Tools: Software tools assist in embedding test features into the digital design,
such as built-in self-test (BIST), scan chains, and boundary scan, ensuring that the
hardware can be efficiently tested for manufacturing defects.

16. Cyber-Physical Systems (CPS) and IoT

 CPS Simulation: For systems that interact with the physical world (like robotics,
automotive systems, or smart grids), software is used to simulate and verify the
interaction between the digital system and the physical environment.
 IoT Firmware and Software Development: Developing the software stack for IoT
devices, including communication protocols (e.g., MQTT, CoAP), data processing
algorithms, and cloud integration, is a crucial aspect of digital design.

These software aspects of digital design are critical for the creation of robust, efficient, and
secure digital systems. They provide the tools and methodologies necessary to translate high-
level concepts into working hardware and ensure that these systems operate as intended in
real-world applications.

What is an Integrated Circuit (IC)?

Before the discovery of ICs, the basic method of making circuits was to select the
components like diodes, transistors, resistors, inductors and capacitors and connect
them by shouldering. But due to size and power consumption issues, it was
necessary to develop a small size circuit with less power consumption, reliability and
shockproof.

After the invention of the semiconductors and transistors, things were quite simplified
to a particular extent, but the development of integrated circuits changed electronics
technology’s face. Jack Kilby from Texas Instruments and Bob Noyce from Intel are
the official creators of integrated circuits, and they did it independently.

The integrated circuit is a fundamental concept of electronics that builds on other

basic concepts previously discussed in our syllabus. Therefore, for a quick
reference, go through the articles listed below:

 Electric Circuits
 Resistors
 Transistors
 Diodes
 Capacitors

Definition of Integrated Chip

Integrated circuits are made up of several components such as R, C, L, diodes and
transistors. They are built on a small single block or chip of a semiconductor known
as an integrated circuit (IC). All of them work together to perform a particular task.
The IC is easily breakable, so to be attached to a circuit board, it is often housed in a
plastic package with metal pins.

Integrated circuits can function as an oscillator, amplifiers, microprocessors or even

as computer memory.

Integrated Circuit Design

An integrated circuit is created using certain logic methods and circuit layouts. The
two categories of IC design are as follows:

 Analog Design
 Digital Design
 Mixed Design

Digital Design
The digital design approach is used to create integrated circuits (ICs), which are
utilised as computer memories (such as RAM and ROM) and microprocessors. With
this approach to design, the circuit density and overall efficiency are both maximised.
The ICs created with this technique operate with binary input data like 0 and 1. The
process for designing digital integrated circuits is depicted in the diagram below.

Analog Design
IC chip is created by using the analogue design process when:

 ICs are utilised as regulators, filters and oscillators.

 Optimal power dissipation, gain and resistance are required.

Mixed Design
The analog and digital design ideas are used in mixed designs. The mixed ICs
perform either Analog to Digital or Digital to Analog conversions.
Integrated Circuit Features
Construction & Packaging
ICs are built with semiconducting components such as silicon. Because of the small
size and delicate nature of IC, a series of tiny gold and aluminium wires are joined
together and moulded into a flat block of plastic or ceramic. Metal pins on the block’s
exterior link to cables inside. The solid block stops the chip from overheating and
keeps it cool.

Size of an IC
The size of the integrated chip varies between 1 square mm to more than 200 mm.

Integration of an IC
Because they combine various devices on one chip, integrated chips get their name.
A microcontroller is an integrated circuit (IC) that combines a microprocessor,
memory, and interface into a single unit.

Commonly Used ICs

Logic Gate ICs
The combinational circuit generates logical outputs based on a variety of input
signals. It may only have two to three inputs but one output.

Timer ICs
A Timer IC is produced with accurate timing cycles with a 100 % or 50 % duty cycle.

Operational Amplifiers
An OpAmp or an Operational Amplifier is a high gain voltage amplifier with a
differential input and a single-ended output.

Voltage Regulators
A voltage regulator IC provides a constant DC output irrespective of the changes in
DC input.
How does the ASIC design cycle work?/ VLSI DESIGN
FLOW
In order to fulfill futuristic demands of chip design, changes are required in
design tools, methodologies, and software/hardware capabilities. For those
changes, ASIC design flow adopted by engineers for efficient structured
ASIC chip architecture and focus on its design functionalities

ASIC design flow is a mature and silicon-proven IC design process which

includes various steps like design conceptualization, chip optimization,
logical/physical implementation, and design validation and verification. Let’s
have an overview of each of the steps involved in the process.

Step 1. Chip Specification

This is the stage at which the engineer defines features, microarchitecture,

functionalities (hardware/software interface), specifications (Time, Area,
Power, Speed) with design guidelines of ASIC. Two different teams are
involved at this juncture:

 Design team: Generates RTL code.

 Verification team: Generates test bench.

Step 2. Design Entry / Functional Verification

Functional verification confirms the functionality and logical behavior of the

circuit by simulation on a design entry level. This is the stage where the
design team and verification team come into the cycle where they generate
RTL code using test-benches. This is known as behavioral simulation.
In this simulation, once the RTL code (RTL code is a set of code that
checks whether the RTL implementation meets the design verification) is
done in HDL, a lot of code coverage metrics proposed for HDL. Engineers
aim to verify correctness of the code with the help of test vectors and trying
to achieve it by 95% coverage test. This code coverage includes statement
coverage, expression coverage, branch coverage, and toggle coverage.

1) Design Entry :
Design entry is the first step in the design of any VLSI circuit using EDA tools. In this
step the intended design is entered on the personal computer. Figure below shows
the various
ways of design entry. The various ways in design entry are as follows,
 Schematic entry

Design entry using Hardware Description Languages(HDL)

Using Finite State Machines (FSM)

EDIF entry
Ways of design entry
 Schematic entry :
Schematic is the design developed by the digital designer using different logical
gates
and digital ICs. The schematics can be drawn on the monitor screen by using the
CAD tools. In
this entry the designer first designs the equivalent digital systems using K-Map and
instead of
implementing the design on the breadboard the design can be tested using the
simulators.
 Hardware description languages :
Hardware description languages originally developed for circuit modelling. Now a
days
these are used for complex hardware design. In this the design is represented in the
form of
coding template by using the syntaxes of the HDL. The different HDLs used in
practice are :
1.
VHDL
 2.
ABEL
3.
VERILOG
 Finite state machines :
The design can be entered using the state diagrams of the sequential circuits. The
CAD
tool can be used to draw the complete state diagram on the personal computer and
simulated
for the required results. Now a days the EDA tools are available which will convert
the
complete state diagram into the HDL code and this HDL code is further processed.
 EDIF entry :
EDIF is the Electronic Data Interchange Format, an industry standard file format for
specifying a design net list. It is generated by a EDIF design-entry tool.

Input files : VHDL file (.vhd, .vhdl), Verilog file (.v), ABEL file (.abl, .abv), EDIF file
(.edf), Schematic file (.sch), State diagram file (.dia), User constraints file (.ucf). Or
as
user generated in particular entry editor

Output files : VHDL file (.vhd, .vhdl), Verilog file (.v), ABEL file (.abl, .abv), EDIF
file (.edf), Schematic file (.sch), State diagram file (.dia, .asf), User constraints file
(.ucf).

Step 3. RTL block synthesis / RTL Function

Once the RTL code and testbench are generated, the RTL team works on
RTL description – they translate the RTL code into a gate-level netlist using
a logical synthesis tool that meets required timing constraints. Thereafter, a
synthesized database of the ASIC design is created in the system. When
timing constraints are met with the logic synthesis, the design proceeds to
the design for testability (DFT) techniques.

Step 4. Chip Partitioning

This is the stage wherein the engineer follows the ASIC design layout
requirement and specification to create its structure using EDA tools and
proven methodologies. This design structure is going to be verified with the
help of HLL programming languages like C++ or System C.

After understanding the design specifications, the engineers partition the

entire ASIC into multiple functional blocks (hierarchical modules), while
keeping in mind ASIC’s best performance, technical feasibility, and
resource allocation in terms of area, power, cost and time. Once all the
functional blocks are implemented in the architectural document, the
engineers need to brainstorm ASIC design partitioning by reusing IPs from
previous projects and procuring them from other parties.

Step 5. Design for Test (DFT) Insertion

With the ongoing trend of lower technology nodes, there is an increase in

system-on-chip variations like size, threshold voltage and wire resistance.
Due to these factors, new models and techniques are introduced to high-
quality testing.

ASIC design is complex enough at different stages of the design cycle.

Telling the customers that the chips have fault when you are already at the
production stage is embarrassing and disruptive. It’s a situation that no
engineering team wants to be in. In order to overcome this situation, design
for test is introduced with a list of techniques:

 Scan path insertion: A methodology of linking all registers elements

into one long shift register (scan path). This can help to check small
parts of design instead of the whole design in one go.
 Memory BIST (built-in Self-Test): In the lower technology node,
chip memory requires lower area and fast access time. MBIST is a
device which is used to check RAMs. It is a comprehensive solution
to memory testing errors and self-repair proficiencies.
 ATPG (automatic test pattern generation): ATPG is a method of
creating test vectors / sequential input patterns to check the design
for faults generated within various elements of a circuit.

Step 6. Floor Planning (blueprint your chip)

After, DFT, the physical implementation process is to be followed. In
physical design, the first step in RTL-to-GDSII design is floorplanning. It is
the process of placing blocks in the chip. It includes: block placement,
design portioning, pin placement, and power optimization.

Floorplan determines the size of the chip, places the gates and connects
them with wires. While connecting, engineers take care of wire length, and
functionality which will ensure signals will not interfere with nearby
elements. In the end, simulate the final floor plan with post-layout
verification process.

A good floorplanning exercise should come across and take care of the
below points; otherwise, the life of IC and its cost will blow out:

 Minimize the total chip area

 Make routing phase easy (routable)
 Improve signal delays

Step 7. Placement

Placement is the process of placing standard cells in row. A poor

placement requires larger area and also degrades performance. Various
factors, like the timing requirement, the net lengths and hence the
connections of cells, power dissipation should be taken care. It removes
timing violation.

Step 8. Clock tree synthesis

Clock tree synthesis is a process of building the clock tree and meeting the
defined timing, area and power requirements. It helps in providing the clock
connection to the clock pin of a sequential element in the required time and
area, with low power consumption.

In order to avoid high power consumption, increase in delays and a huge

number of transitions, certain structures can be used for optimizing CTS
structure such as Mesh Structure, H-Tree Structure, X-Tree Structure,
Fishbone Structure and Hybrid structure.

With the help of these structures, each flop in the clock tree gets the clock
connection. During the optimization, tools insert the buffer to build the CTS
structure. Different clock structures will build the clock tree with a minimum
buffer insertion and lower power consumption of chips.

For more details on CTS Challenges, Solutions and benefits,

Step 9. Routing

1. Global Routing: Calculates estimated values for each net by the

delays of fan-out of wire. Global routing is mainly divided into line
routingand maze routing.
2. Detailed Routing: In detailed routing, the actual delays of wire is
calculated by various optimization methods like timing optimization,
clock tree synthesis, etc.

Step 10. Final Verification (Physical Verification and Timing)

After routing, ASIC design layout undergoes three steps of physical

verification, known as signoff checks. This stage helps to check whether
the layout working the way it was designed to. The following checks are
followed to avoid any errors just before the tapeout:

1. Layout versus schematic(LVS) is a process of checking that the

geometry/layout matches the schematic/netlist.
2. Design rule checks(DRC) is the process of checking that the
geometry in the GDS file follows the rules given by the foundry.
3. Logical equivalence checks(LVC) is the process of equivalence
check between pre and post design layout.

Step 11. GDS II – Graphical Data Stream Information Interchange

In the last stage of the tapeout, the engineer performs wafer processing,
packaging, testing, verification and delivery to the physical IC. GDSII is the
file produced and used by the semiconductor foundries to fabricate the
silicon and handled to client.

What is HDL?
HDL stands for Hardware Description Language. It is a programming
language that is used to describe, simulate, and create hardware like digital circuits
(ICS). HDL is mainly used to discover the faults in the design before implementing it
in the hardware.

The main advantage of HDLs is that it provides flexible modeling capabilities and can
express the large complex designs (>107 gates).

Today, there are many HDLs available in the market, but VHDL and Verilog are the
most popular HDLs.
What is VHDL?
VHDL stands for Very High-Speed Integration Circuit HDL (Hardware Description
Language). It is an IEEE (Institute of Electrical and Electronics Engineers) standard
hardware description language that is used to describe and simulate the behavior of
complex digital circuits.

The most popular examples of VHDL are Odd Parity Generator, Pulse Generator,
Priority Encoder, Behavioral Model for 16 words, 8bit RAM, etc.

VHDL supports the following features:

o Design methodologies and their features.

o Sequential and concurrent activities.
o Design exchange
o Standardization
o Documentation
o Readability
o Large-scale design
o A wide range of descriptive capability

What is Verilog?
Verilog is also a HDL (Hardware Description Languages) for describing electronic
circuits and systems. It is used in both hardware simulation and synthesis.

The most popular examples of Verilog are network switch, a microprocessor, a

memory, a simple flip-flop, etc.

Difference between VHDL and Verilog

VHDL Verilog

It allows the user to define data types. It does not allow the user to define data types.
It supports the Multi-Dimensional array. It does not support the Multi-Dimensional array.

It allows concurrent procedure calls. It does not allow concurrent calls.

A mod operator is present. A mod operator is not present.

Unary reduction operator is not present. Unary reduction operator is present.

It is more difficult to learn. It is easy to learn.

Why VHDL?
VHDL is used for the following purposes:

o For Describing hardware

o As a modeling language
o For a simulation of hardware
o For early performance estimation of system architecture
o For the synthesis of hardware

Advantages of VHDL
A list of advantages of VHDL is given below:

o It supports various design methodologies like Top-down approach and

Bottom-up approach.
o It provides a flexible design language.
o It allows better design management.
o It allows detailed implementations.
o It supports a multi-level abstraction.
o It provides tight coupling to lower levels of design.
o It supports all CAD tools.
o It strongly supports code reusability and code sharing.

Disadvantages of VHDL
A list of disadvantages of VHDL is given below:
 o It requires specific knowledge of the structure and syntax of the language.
o It is more difficult to visualize and troubleshoot a design.
o Some VHDL programs cannot be synthesized.
o VHDL is more difficult to learn.

Basic Elements of VHDL

There are the following three basic elements of VHDL:

1. Entity

The Entity is used to specify the input and output ports of the circuit. An Entity
usually has one or more ports that can be inputs (in), outputs (out), input-outputs
(inout), or buffer.

An Entity may also include a set of generic values that are used to declare properties
of the circuit.

Entity Declaration

You can declare an entity using the following syntax:

o Simplified syntax

1. entity entity_name is
2. port (
3. port_1_name : mode data_type;
4. port_2_name : mode data_type;
5. .......
6. Port_n_name : mode data_type
7. );
8. end entity_name;

Example:

1. entiy orgate is
2. port (
3. a : in std_logic;
4. b : in std_logic;
5. c : out std_logic
6. );
7. end orgate;

o Using generic

If an entity is generic, then it must be declared before the ports. Generic does not
have a mode, so it can only pass information into the entity.

Syntax:

1. entity entity_name is
2. generic (
3. generic_1_name : data_type;
4. generic_2_name : data_type;
5. ........
6. generic_n_name : data_type
7. );
8. port (
9. port_1_name : mode data_type;
10. port_2_name : mode data_type;
11. ........
12. Port_n_name : mode data_type
13. );
14. end entity_name;

Example:

1. entity Logic_Gates is
2. generic (Delay : Time := 10ns);
3. port (
4. Input1 : in std_logic;
5. Input2 : in std_logic;
6. Output : out std_logic
7. );
8. end Logic_Gates;

Rules for writing Port name:

 - Port name consist of letters, digits, and underscores.
- It always begins with a letter.
- Port name is case insensitive.

Modes of Port

In Input port
out Outputport
inout Bidirectional port
buffer Buffered output port

2. Architecture

Architecture is the actual description of the design, which is used to describe how the
circuit operates. It can contain both concurrent and sequential statements.

Architecture Declaration

An architecture can be declared using the following syntax:

1. architecture architecture_name of entity_name is

2. begin
3. (concurrent statements )
4. end architecture_name;

Example:

1. architecture synthesis of andgate is

2. begin
3. c <= a AND b;
4. end synthesis;

3. Configuration

A configuration defines how the design hierarchy is linked together. It is also used to
associate architecture with an entity.

Configuration Declaration

1. configuration configuration_name of entity_name is

2. --configuration declarations
3. for architecture_name
4. for instance_label : component_name
5. use entity library_name.entity_name(architecture_name);
6. end for;
7. --
8. end for;
9. end [configuration] [configuration_name];

Example:

1. configuration demo_config of even_detector_testbench is

2. for tb_archi
3. for uut : even_detector
4. use entity work.even_detector (sop_archi);
5. end for;
6. end for;
7. end demo_config;

Types of Modeling styles in VHDL

There are 4 types of modeling styles in VHDL:

1. Data flow modeling (Design Equations)

Data flow modeling can be described based on the Boolean expression. It shows how
the data flows from input to output. It works on Concurrent execution.

2. Behavioral modeling (Explains Behaviour)

Behavioral modeling is used to execute statements sequentially. It shows that how

the system performs according to the current statement.

Behavioral modeling may contain Process statements, Sequential statements, Signal

assignment statements, and wait statements.

3. Structural modeling (Connection of sub modules)

Structural modeling is used to specify the functionality and structure of the circuit.

Structural modeling contain signal declarations, component instances, and port maps
in component instance.
VHDL objects
VHDL uses the following three types of objects:

1. Constants

Constant is an object which can only hold a single value that cannot be changed
during the whole code.

Example: constant number_of_bytes integer:=8;

2. Variables

A variable also holds a single value of a given type. The value of the variable may be
changed during the simulation by using variable assignment operator.

Variables are used in the processes and subprograms.

Variables are assigned by the assignment operator ":=".

Example:

variable index: integer :=0;

3. Signals

Signals can be declared in architecture and used anywhere within the architecture.
Signals are assigned by the assignment operator "<=".

Example:

Signal

sig1:std_logic;
Sig1 <= '1'

Data Types in VHDL

Data Types are the abstract representation of stored data.

There are the following data types in VHDL -

1. Scalar Types
 o Integer
Integer data types are the set of positive and negative whole numbers.
o Floating_point
Floating point data types are the set of positive and negative numbers that
contain a decimal point.
o Enumeration
Enumeration data type is used to increase the readability of the code.
o Physical
Physical data type describes objects in terms of a base unit, multiples of base
unit, and a specified range.

2. Composite Types

o Arrays
Arrays are used to hold multiple values of the same types under a single
identifier
o Record
Records are used to specify one or more elements, and each element has a
different name and different type.

VHDL Operators
VHDL Operators are used for constructing the expressions.

There are the following types of operators in VHDL:

1. Logical Operators

Logical Operators are used to control the program flow. When the logical operators
combined with signals or variables, then it is used to create combinational logic.

VHDL supports the following logical operators:

o and
o or
o nand
o nor
 o xor
o xnor
o not

2. Relational Operators

In VHDL, relational operators are used to compare two operands of the same data
type, and the received result is always of the Boolean type.

VHDL supports the following Relational Operators:

o = Equal to
o /= Not Equal to
o < Less than
o > Greater than
o <= Less than or equal to
o >= Greater than or equal to

3. Arithmetic Operators

Arithmetic Operators are used to perform arithmetic operations. These operators

are numeric types, such as integer and real.

VHDL uses the following Arithmetic Operators:

o + Addition
o - Subtraction
o * Multiplication
o / Division
o & Concatenation
o mod Modulus
o rem Remainder
o abs Absolute Value
o ** Exponentiation

4. Shift Operators

In VHDL, shift operator is used to perform the bit manipulation on the data by
shifting and rotating the bits of its first operand right or left.
VHDL supports the following Miscellaneous Operators:

o Sll shift logical left

o Srl shift logical right
o Sla shift arithmetic left
o Sra shift arithmetic right
o Rol rotate left
o Ror rotate right

Note: Operators are evaluated in order to their precedence. (i.e., highest to lowest)

Highest Precedence Order Lowest

Arithmetic Operator Shift Operator Relational Operator Logical Operator

The Operator of equal precedence is evaluated from left to right.

Structural Modelling?
Purpose of Structural Modeling:

Structural modeling in VHDL is used to describe a system by specifying how its

components are interconnected.

It represents the architecture of the design in terms of components and their

interconnections.

Useful for modeling complex systems where each component can be a separate
module.

So an entity is modeled as a set of components connected by signals, i.e. as a netlist.

Why Use Structural Modeling?

Promotes hierarchical design, enabling reuse of components.

Reflects the actual hardware layout, making it easier to visualize and implement.

Allows for clear representation of the system's physical structure.

Basic Syntax:

architecture structural of entity_name is

component component_name

port (port_list); -- Component declarations

end component;

signal signal_name: type; -- Signal declarations

Begin

instance_label: component_name port map (port_connections); -- Component

instantiation

-- Other component instantiations and connections

end architecture structural;

Key Components:

Component Declaration: Describes the interface of the components used.

Signal Declaration: Defines internal signals for interconnecting components.

Component Instantiation: Creates instances of components and connects them

using port map.

Important Notes:

Structural modeling focuses on how components are wired together.

Port mappings ensure correct signal flow between components.

BAKI KA LEC 6 PPT SE KARNA HAI