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    Sandstone Firmware Code Structure

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    sujaachar6

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    © All Rights Reserved
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    Sandstone Firmware Code Structure

    Uploaded by

    sujaachar6
    21 views5 pages

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    Copyright:

    © All Rights Reserved
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    21 views5 pages

    Sandstone Firmware Code Structure

    Uploaded by

    sujaachar6

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 5

    SHRI MADHWA VADIRAJA INSTITUTE OF

    TECHNOLOGY AND MANAGEMENT

    Department of Computer Science and Engineering

    ASSIGNMENT-2

    SUBJECT:MICROCONTROLLERS

    SUBJECT CODE:BCS402

    Submitted By:

    Name:Sujan Kumar K

    USN:4MW22CS164

    Topic: Sandstone Firmware Code Structure

    Submitted To:

    Mrs.Bharthi Panjwani

    Assistant Professor

    Department of Computer Science and Engineering


    Sandstone Firmware Code Structure
    Introduction

    This report details the Sandstone firmware code structure, focusing on the five critical steps
    involved in the firmware's execution flow. Each step is accompanied by relevant code snippets
    and explanations of their functions, providing a comprehensive understanding of the firmware
    initialization process.

    Step 1: Reset Exception

    The firmware starts with a reset exception, an event triggered when the device is powered on or
    reset. The reset vector, a specific memory address, directs execution to the hardware
    initialization code. During this phase, all other exceptions, such as errors or interrupts, are
    directed to dummy handlers that loop indefinitely. This prevents interference with the hardware
    setup.

    Code Explanation:

    sandstone_start
    B sandstone_init1 ; reset vector - jumps to hardware initialization
    B ex_und ; undefined vector - loops indefinitely
    B ex_swi ; software interrupt vector - loops indefinitely
    B ex_pabt ; prefetch abort vector - loops indefinitely
    B ex_dabt ; data abort vector - loops indefinitely
    NOP ; not used...
    B int_irq ; interrupt request vector - loops indefinitely
    B int_fiq ; fast interrupt request vector - loops indefinitely

    B sandstone_init1: Directs the execution to the sandstone_init1 routine to begin hardware


    initialization.
    B ex_und, B ex_swi, etc.: Redirect execution to dummy handlers for other exceptions, ensuring
    they do not interrupt the initialization process.

    Result:
    • Dummy handlers are set up.
    • Control is passed to code to initialize the hardware.
    Step 2: Hardware Initialization

    The firmware then sets up the essential hardware components. This step involves configuring
    system registers to prepare the hardware. For instance, on the ARM Evaluator-7T board, a
    seven-segment display is configured to show firmware activity. The base address for system
    registers is set to separate peripherals from memory, ensuring smooth operation.

    Code Explanation:

    sandstone_init1
    LDR r3, =SYSCFG ; Load system configuration base address into r3
    LDR r4, =0x03fffaf0 ; Load configuration value into r4
    STR r4, [r3] ; Store the configuration value from r4 to the address in r3

    LDR r3, =SYSCFG: Loads the system configuration base address into register r3.
    LDR r4, =0x03fffaf0: Loads the configuration value into register r4.
    STR r4, [r3]: Stores the configuration value from r4 into the address pointed by r3.

    Result:
    • The system registers are st from a known base address—0x03fff000.
    • The segment display is configured.

    Step 3: Memory Remapping

    After hardware initialization, the firmware adjusts the memory map. This step ensures that the
    firmware operates from the correct memory locations. Initially, the platform starts with flash ROM
    assigned in the memory map, and SRAM banks are unavailable. The code remaps the memory,
    initializing SRAM and transitioning execution from flash ROM to SRAM.

    Code Explanation:

    LDR r14, =sandstone_init2


    LDR r4, =0x01800000 ; Load new flash ROM location into r4
    ADD r14, r14, r4 ; Adjust r14 to point to the new location
    ADRL r0, memorymaptable_str
    LDMIA r0, {r1-r12} ; Load memory map table into r1 to r12
    LDR r0, =EXTDBWTH ; Load external data bus width configuration address into r0
    STMIA r0, {r1-r12} ; Store the memory map table from r1 to r12 into the address in r0
    MOV pc, r14 ; Jump to the new memory location
    LDR r14, =sandstone_init2: Loads the address of sandstone_init2 into register r14.
    LDR r4, =0x01800000: Loads the new flash ROM location into register r4.
    ADD r14, r14, r4: Adjusts r14 to point to the new memory location.
    ADRL r0, memorymaptable_str: Loads the address of the memory map table into r0.
    LDMIA r0, {r1-r12}: Loads the memory map table into registers r1 to r12.
    LDR r0, =EXTDBWTH: Loads the external data bus width configuration address into r0.
    STMIA r0, {r1-r12}: Stores the memory map table from r1 to r12 into the address in r0.
    MOV pc, r14: Jumps to the new memory location pointed to by r14.

    Step 4: Communication Hardware Initialization

    Once the memory is remapped, the firmware sets up the communication hardware. This
    involves configuring the serial port with specific settings, such as a 9600 baud rate, no parity,
    one stop bit, and no flow control. This setup is essential for enabling data exchange between
    the firmware and other systems. The firmware then outputs a standard banner message through
    the serial port, indicating its status and readiness.

    Result:
    • Serial port initialized with the specified settings.
    • Sandstone banner output through the serial port:

    Sandstone Firmware (0.01)


    - platform ......... e7t
    - status ........... alive
    - memory ........... remapped

    + booting payload …

    Step 5: Bootloader Execution

    Finally, the bootloader executes. This step involves loading the main application or payload into
    memory and transferring control to it. The firmware sets up registers for block copying the
    payload, assuming it to be a plain binary image. The payload is then copied to SRAM, and
    control is transferred to its entry point. This process involves looping through memory copy
    instructions until the entire payload is copied. Once complete, the system is fully booted, and
    the main application begins execution.

    Code Explanation:

    sandstone_load_and_boot
    MOV r13, #0 ; Set destination address to 0 in r13
    LDR r12, =payload_start_address ; Load payload start address into r12
    LDR r14, =payload_end_address ; Load payload end address into r14
    _copy
    LDMIA r12!, {r0-r11} ; Load multiple registers from the address in r12 and increment
    STMIA r13!, {r0-r11} ; Store multiple registers to the address in r13 and increment
    CMP r12, r14 ; Compare r12 with the end address
    BLT _copy ; If r12 is less than r14, repeat the copy process
    MOV pc, #0 ; Transfer control to the address 0 (start of the payload)

    MOV r13, #0: Sets the destination address to 0 in register r13.


    LDR r12, =payload_start_address: Loads the payload start address into register r12.
    LDR r14, =payload_end_address: Loads the payload end address into register r14.
    _copy: Label marking the start of the copy loop.
    LDMIA r12!, {r0-r11}: Loads multiple registers from the address in r12 and increments r12.
    STMIA r13!, {r0-r11}: Stores multiple registers to the address in r13 and increments r13.
    CMP r12, r14: Compares r12 with the end address in r14.
    BLT _copy: If r12 is less than r14, branches back to _copy to continue copying.
    MOV pc, #0: Transfers control to address 0, where the payload starts.

    Result:
    • Payload copied to SRAM address 0x00000000.
    • Control of the pc is relinquished to the payload; pc set to payload entry address.
    • System completely booted. Output on serial port:

    Sandstone Firmware (0.01)


    - platform ......... e7t
    - status ........... alive
    - memory ........... remapped
    + booting payload …

    Simple Little OS (0.09)


    - initialized ...... ok
    - running on ....... e7t

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