Fcas Architecture

FCHS- Stay Home and Stay Safe
COMPUTER ARCHITECTURE
Architecture refers to the structure of the processor and how computer components are related to each
other.
The processor
• Can be referred to generally as Central Processing Unit (CPU) which is responsible for fetching,
decoding and executing of all computer instructions.
• It is commonly called the brain of the computer
• Computers cannot work without the processor
The processor has the following functions:

- It controls the transmission of data from input device to memory
- It processes the data and instructions held in main memory
- It controls the transmission of information from main memory to output device.
- Controls the sequence of instructions,
- Give commands to all parts of the computer,
- Fetches the next instruction to be executed
- Decodes instructions
- Executes decoded instructions
Processor Performance
The traditional processors performance is affected by these four main components:
(a) Clock Speed
- The processor contains a timing device known as the clock. It determines the timing of all operations.
- This sends out signals at a given interval, and all processes within the computer will start with one of
these pulses.
- A process may take any amount of time to complete, but it will only start on a pulse.
- It therefore makes sense that a processor with a faster clock speed will perform faster, since more
pulses will be sent out in the same time frame.
- A faster clock increases the speed of the processor and/or memory but not the peripherals
- The clock speed is generally quoted in factors of Hertz, with modern processors typically Gigahertz.
(b) Word Size

- The word size of a computer is the number of bits it can process at a time.
- Increasing the word length of the registers benefits programs with many numerical calculations
- Word length is determined by size of registers
- Bits are grouped into words, the length of a word varies but it is typically, 8, 16, 32, 64 or 128 bits.
- Obviously if the processor is able to deal with more bits at a time then it is going to perform better.
- Typically home computers are 32-bit, but 64-bit technology is becoming widespread too.
(c) Bus Width

- The addresses of data, and the data itself, are transmitted along buses inside the computer.
- The width of the bus is the number of bits it can store / carry.
- A wider : bus will allow more data to be sent at a time, and therefore the processor will perform more
efficiently.
- A wider address bus will increase the number of memory addresses a computer may use.
- For example an 8 bit bus will only allow a value between 0 and 255 to be transmitted at a time.
(d) Architecture
- The architecture of a processor will affect its performance,
- A better designed processor will perform better than a different processor.
Electronic C omponents
Electronic components, both active and passive, are lifeline of any printed circuit assembly.
They play vital roles in the functioning of any electronic device.
They are connected together, usually by soldering to a printed circuit board (PCB), to create a n elec
tronic circuit with a particular function.
Active Electronic C omponents

Active e lectronic components are those that can control the flow of electricity.
These include transistors, vacuum tubes, si licon-controlled rectifiers (SCRs).
Transistors
A transistor is a semiconductor device which is used in a number of functions including voltage reg
ulation, amplification, switching, s ignal modulation, and os cillators.
Passive Electronic C omponents

Passive electronic components are those that dont have the ability to control current by means of a
nother electrical s ignal.
These include capacitors, resistors, inductors, transformers, and diodes.
Resistor
A R esistor is an electrical device that resists the flow of e lectrical c urrent.
It is a passive device used to control, or impede the flow of, electric current in an electric circuit by p
roviding resistance, thereby developing a drop in voltage across the d evice.
Capacitor
A capacitor is a passive electrical component that can store energy in the electric field between a pa
ir of conductors called plates.
The process of stori ng energy in the ca pacitor is known as charging.
Capacitors are used in e lectronic c ircuits as energy storage devices.
Diode
A diode is a one-way valve for electricity which allow flow of electricity in one direction.
Most diodes have a painted line on one end showing the direction or flow with the negative
side normally white.
-
Integrated Circuit (IC)
Integrated Ci rcuits are package of several complex circuits
The main components of the processor are:

- ALU (Arithmetic Logic Unit)
- Control Unit (CU)
- Registers
- System Clock
1. Arithmetic Logic Unit

Responsible for carrying out operations on data, like calculations. It consists of two parts:
a) Arithmetic Unit
Responsible for basic arithmetic functions such as: Addition, Subtraction, Multiplication,
Division, etc
b) Logical Unit
It perform logical operations like comparing two data items to find which data item is > ,= ,< the
other, etc
The ALU works together with the accumulator register, which temporarily stores data being processed
and the results of processing.
The ALU performs the following:
• Carries out all arithmetic.
• Carries out logic operations.
• Acts as gateway to and from the processor
2. Control unit
It manages the execution of instructions by running the clock.
It coordinates and controls all operations of computer system.
It also called the supervisor of the computer. It performs the following:
- Fetches the next instruction to be executed
- Decodes instructions
- Manages execution of instructions
- Executes decoded instructions
- Uses control signals to manage rest of processor.
- It carries out the Fetch-Execute Cycle as illustrated below:
The Fetch-Decode-Execute Cycle

Step 1. Fetch instruction : In the instruction phase, the
computers control unit fetches the next instruction to be
executed from main memory. Microprocessor gets
software instruction telling it what to do with data.
Step 2. Decode instruction : Then the instruction is decoded
so that the central processor can understand what is to be
done. Microprocessor determines what the instructions
mean. At this stage, the computer produces signals which
control other computer components like the ALU.
Step 3. Execute the instruction : In the execution phase, the
ALU does what it is instructed to do, making either an
arithmetic computation or a logical comparison.
Microprocessor performs the instruction (cause instruction
The Fetch-Execute Cycle
to be executed).
Step 4. Store results : Then the results are stored in the
registers or in memory.
Step 3 & 4 are called the execution phase . The time it takes
to complete the execution phase is called the EXECUTION
TIME (E-time).
After both phases have been completed for one instruction,
they are again performed for the second instruction, and so
on.
(c) System clock

• It is an electronic component that generates a continuous sequence of clock pulses to step the
control unit through its operation.
• This sends out a sequence of timing pulses or signals, which are used to step the control unit
through its operations.
• It controls all functions of computer using clock ticks
• These ticks of system clock are known as clock cycle and speed of CPU
• Clock speed or clock rate is the speed at which the CPU executes instructions.
(d) Registers:
- This is a high-speed storage area in the CPU used to temporarily hold small units of program
instructions and data immediately before, during and after execution by the CPU.
- It is a small amount of storage available on the CPU whose contents can be accessed more quickly
than storage available elsewhere
- Registers are special memory cells that operate at very high speed. They provide the fastest way
for a CPU to access data.
- The CPU contains a number of registers and each has a predefined functions
- Most modern computer architectures operate by moving data from main memory into registers,
operate on them, then move the result back into main memory
- Register size determines how much information it can store
- The size of register is in bytes: i.e., can be one, two, four or eight byte register
- The processor contains a number of special purpose registers (which have dedicated uses) and
general purpose registers (which may be used for arithmetic function and are a sort of working
area)
- The main types registers (special purpose registers) found in the Von Neumann Machine are as
given below:
✓ program counter
✓ memory address register
✓ memory data register/memory buffer register
✓ current instruction register
✓ index register
Program Counter (PC)
- Contains the address of the next instruction to be fetched/executed
- PC holds address of next instruction
- this register is automatically incremented so that it always holds the memory address of the
next instruction
- Keeps check of whereabouts the next program is in the memory.
- After one instruction has been carried out, the PC will be able to tell the processor
whereabouts the next instruction is.
- The PC is also called the Sequence Control Register (SCR ) as it controls the sequence in which
instructions are executed.
- During program execution, the PC:
• stores the address of the next instruction to be executed
• Its content is incremented after the address is read
• Its content is altered to specific address if instruction is a jump instruction
Memory address register (MAR)

• Is used to hold the memory address that contains either the next piece of data or an instruction
that is to be used
• It holds the address of a memory location from which data will be read from or written to. Data
might be a variable as part of a program, or an instruction for the processor to execute
• Specifies the address for the next read or write
• MAR holds address of instruction/data
• This is where the address that was read from the PC is sent.
• Stored here so that the processor knows where-abouts in the memory the instruction is.
Memory Data Register (MDR) also called Memory buffer register (MBR)
• This is used to store data which has been read from or is ready to write to memory. All transfers
from memory to CPU go through this buffer
• It acts like a buffer and holds anything that is copied from the memory ready for the processor to
use it
• It contains data written into memory or receives data read from memory
Current instruction register (CIR)

- it holds the instruction that is to be executed
- Contains both the operator and operand of the current instruction
- For example the instruction MOVE 100,#13
- MOVE is the operator, and 100 and #13 are the operands.
- It stores an instruction while it is being decoded/executed/carried out
- Its contents change when an instruction from memory has been placed in MDR, and then it is
copied from MDR to CIR.
The Status Register (SR).

- This contains status bits which reflect on the results of an instruction. For example, if there is an
error in the operation (such as an overflow or underflow or parity error) this will be recorded in
the status register. The Status Registers also store data about interrupts
- Signify whether or not the ALU value was zero or not
Instruction Register (IR)

- Contains the instruction most recently fetched or the instruction currently being executed
Index register
• It is a register used for modifying operand addresses during program execution,
• Used in performing vector/array operations.
• Used for indirect addressing where an immediate constant (i.e. which is part of the instruction
itself) is added to the contents of the index register to form the address to the actual operand or
data
How and why is the index register (IR) used

- used in indexed addressing
- stores a number used to modify an address which is given in an instruction
- allows efficient access to a range of memory locations by incrementing the value in the IR e.g.
used to access an array
- It stores an integer value
- The integer value is added to the base address in the instruction
- Used for the successive reading of values from memory locations e.g. in an array
- Can be incremented after use
General Purpose Registers

Accumulator
- A general purpose register used to accumulate results of processing
- it is where the results from other operations are stored temporarily before being used by
other processes.
- Available to the programmer and referenced in assembly language programs
- Used for performing arithmetic functions
Flags Register : Used to record the effect of the last ALU operation
The Fetch decode execute cycle and the Registers

Fetch phase:
• The address of next instruction is copied from the PC to the MAR.
• The instruction held at that address is copied to the MDR
• The contents of the MDR are copied to the CIR
Execute Phase:
• The instruction held in the CIR is decoded.
• The instruction is executed.
The Fetch-Decode Execute Cycle

There are three stages of the machine cycle in a Von Neumann architecture, which are: fetch, decode and
execute stages.
Fetch
• When the next instruction is needed, its address is copied from the PC and placed in the MAR
• The PC stores the address of the next instruction which needs to be carried out
As instructions are held sequentially in the memory, the value in the PC is incremented so that it
always points to the next instruction.
• The data which is stored at the address in the MAR is then copied to the MDR
• Once it is ready to be executed, the executable part if the instruction is copied into the CIR
Decode
• The instruction in the CIR can now be split into two parts, the address and the operation
• The address part can be placed in the MAR and the data fetched and put in the MDR.
Execute
• The contents of both the memory address register and the memory data register are sent
together to the central processor. The central processor contains all the parts that do the
calculations, the main part being the CU (control unit) and the ALU (arithmetic logic unit), there
are more parts to the central processor which have specific purposes as well.
• The ALU will keep referring back to where the data and instructions are stored, while it is
executing them, the MDR acts like a buffer, storing the data until it is needed
• The CU will then follow the instructions, which will tell it where to fetch the data from, it will read
the data and send the necessary signals to other parts of the computer.
The fetch-decode-execute cycle operates in the following way:

• Load the address that is in the program counter (PC) into the memory address register (MAR).
• Increment the PC by 1.
• Load the instruction that is in the memory address given by the MAR into the MDR
• Load the instruction that is now in the MDR into the current instruction register (CIR).
• Decode the instruction that is in the CIR.
• If the instruction is a jump instruction then:
▪ Load the address part of the instruction into the PC
▪ Reset by going to step 1.
• Execute the instruction.
• Reset by going to step 1.
How a jump instruction executed
- by changing contents of PC (to address part of instruction)
- copy address part of instruction in CIR to PC
The first step simply places the address of the next instruction into the memory Address Register so that
the control unit can fetch the instruction from the correct part of the memory. The program counter is
then incremented by 1 so that it contains the address of the next instruction, assuming that the
instructions are in consecutive locations.
The memory data register is used whenever anything is to go from the central processing unit to main
memory, or vice versa. Thus the next instruction is copied from memory into the MDR and is then copied
into the current instruction register.
Now that the instruction has been fetched the control unit can decode it and decide what has to be done.
This is the execute part of the cycle. If it is an arithmetic instruction, this can be executed and the cycle
restarted as the PC contains the address of the next instruction in order. However, if the instruction
involves jumping to an instruction that is not the next one in order, the PC has to be loaded with the
address of the instruction that is to be executed next. This address is in the address part of the current
instruction, hence the address part is loaded into the PC before the cycle is reset and starts all over again.
Memory Unit
Is the computer memory that temporarily stores the operating system, application programs and data
currently use.
It used to store the following:
• Program instructions in current use;
• Data in current use;
• Parts of Operating System that are currently in use.
Some architectures have a Memory Unit (Main memory) which has two types: RAM and ROM.
Buses
• A bus is a pathway through which data and signals are transferred from one device to another.
• They are a set of parallel wires connecting two or more components of the computer.
• Buses can be internal or external.
• Buses can be generally referred to as system bus and this connect the CPU, memory and I/O
devices.
• Each bus is a shared transmission medium, so that only one device can transmit along a bus at
any one time.
• Multiple devices can be connected to the same bus
Diagram
• Data and control signals travel in both directions between the processor, memory and I/O
controllers.
• Address, on the other hand, travel only one way along the address bus: the processor sends the
address of an instruction, or of data to be stored or retrieved, to memory to an I/O controller.
The main types of buses are:

- Data bus :
• Used for carrying data from memory to the processor and between I/O ports.
• Comprises of either 8, 16, 32 or 64 separate parallel lines
• Provide a bi-directional path for data and instructions between computer components. This
means that the CPU can read data from memory and input ports and also send data to
memory and output ports.
• The width of the bus determines the overall system performance. For example, if the data
bus is 8 bits wide, and each instruction is 16 bits long, then the processor must access the
main memory twice during each instruction cycle
- Address bus :
• Used for transferring memory addresses from the processor when it is accessing main
memory
• They are used to access memory during the read or write process
• The width of the address bus determines the maximum possible memory capacity of the
computer.
• This a uni-directional bus (one way). The address is send from CPU to memory and I/O ports
only.
- Control bus :
• The purpose of the control bus is to transmit command, timing and specific status
information between system components. Timing signals indicate the validity of data and
address information. Command signals specify operations to be performed. Specific status
signals indicate the state of a data transfer request, or the status of request by a
components to gain control of the system bus
• This is a bi-directional bus used for carrying control signals (Signals can be transferred in
both directions).
• They carry signals to enable outputs of addressed port and memory devices
• Control signals regulate activities on the bus.
• Control buses transmit command, timing and status information between computer
components.
• Typical control signals are:
✓ Memory Read
✓ Memory Write
✓ I/O Read
✓ I/O Write
✓ Interrupt Request
✓ Interrupt Grant
✓ Reset
✓ Ready hold
✓ etc
•
• Timing signals: indicate validity of data and information.
• Command signals: Specify operations to be performed
• Status signals : Indicate state of data transfer request or status of a request.
INTERRUPTS
Interrupt: it is a signal generated by a device or software, which may cause a break in the execution of the
current routine
-An interrupt is a signal send to the processor by a peripheral or software for attention to be turned to
that peripheral/software, thereby causing a break in the execution of a program, e.g. printer out of
paper.
-Control is transferred to another routine and the original routine will be resumed after the interrupt
Interrupt Service Routine (Handler): a small subprogram that is called when an interrupt occurs and it
handles the interrupt.
Types of interrupts
Input / output interrupt e.g. disk full, printer out of paper, etc. they are generated by the I/O devices
Interrupts generated by running process: process may need more storage or to communicate with the
operator
Timer interrupts: generated by the processor clock, e.g. control being transferred to another user in a
time sharing system
Program check interrupts: caused by errors like division by zero
Machine check interrupts: Caused by malfunctioning hardware .
Clock (happens normally in time sharing systems where the clock transfers control from one computer to
another.)
Interrupt priorities
-Interrupts have different priorities so that if two interrupts are received simultaneously the processor
can decide which one is more important to execute first.
-There are four levels of priority, which are (highest priority order):
- Hardware Failure: can be caused by power failure or memory parity error.
- Program Interrupts: Arithmetic overflow, division by zero, etc
- Timer Interrupts: generated by the internal clock
- I/O Interrupts:
Why interrupts are used in a computer system

- to obtain processor time for a higher priority task
- to avoid delays
- to avoid loss of data
- as an indicator to the processor that a device needs to be serviced
- allows computer to shut down if the power off interrupt predicts loss of power, saving data in
time
Sources of interrupts
- power failure/system failure
- peripheral e.g. printer (buffer empty)/hardware
- clock interrupt
- user interrupt e.g. new user log on request
- software
Interrupt Handling
At the end of each Fetch-Execute cycle, the contents of the interrupt registers are checked.
Should there be an interrupt; the following steps will typically be taken:
a) The current fetch-decode-execute cycle is completed
b) The operating system halts current task
c) The contents of the PC and other registers will be stored safely in a stack.
d) The highest priority interrupt is identified. Interrupts with a lower priority are disabled.
e) The source of the interrupt is identified.
f) The start address of the interrupt handler is loaded into the PC.
g) The interrupt handler is executed to completion by the OS.
h) Once execution is complete the PC and other registers are popped from the stack and
restored.
i) The users program resumes with the next step in its cycle.
Vectored interrupt mechanism

- When dealing with an interrupt, the computer has to know which interrupt handler to call for which
interrupt.
- One method of doing this is known as the vectored interrupt mechanism .
- In this approach a complete list of interrupts and the memory address of their handler is stored in a
table called the interrupt vector table.
- The interrupt supplies an offset number, which identifies the interrupt uniquely.
- This offset is added to a base term, and the resultant number is the memory address of a pointer to
the memory location of the handler routine.
- This is explained in the example below:
- If the interrupt 002 is received, the base number 5000 is added to it, which allows the processor to
know that the handler can be found by opening the data stored at address 5002.
- The address 5002 simply stores a pointer to another memory location, 6280, where the actual handler
routine begins.
- The advantage of this approach is that each interrupt only needs to give the processor an offset
number, such as 002, and the processor can determine from that the correct memory location to use.
This is more efficient than the interrupt sending the full memory address itself. This approach also
allows the interrupt routines to be stored anywhere in the memory, with the pointer table updated to
reflect if a handler routine is moved
Vectored Interrupts
A specific number assigned to each interrupt is called an interrupt vector. Each interrupt is numbered.
Each interrupt vector is the one used to call the interrupt handler
Address of interrupt service routines are stored in an array (known as interrupt dispatch table) and the
interrupt vector is used as a subscript to this array.
Buffer
- Buffer: This is a temporary memory store for data awaiting processing or output, compensating
speed at which devices operate, for example printer buffer.
- A buffer is a memory in the interface between two devices which temporarily store data which is
being transmitted from one device to another
- A buffer is a small amount of fast memory outside the processor that allows the processor to get
on with other work instead of being held up by the secondary device.
- The buffer is necessary if the two devices work at the different speed
- Buffering is appropriate where an output device processes data slower than the processor. For
example, the processor sends data to the printer, which prints much slower and the printer does
not need to wait for the printer to finish printing in order for it to carry out the next task.
- It therefore saves the data in a buffer where it will be retrieved by the printer.
- Buffering usually match devices that work at different speeds, e.g. processor and disk.
- Sometimes a device is already busy in executing some instructions.
- Example: there are three printing jobs, the printer can print only one job at a time. The OS sends
the next two jobs in buffer, a process which is also known as Spooling
- Buffers are a main component of Memory
- The printer buffer is one of the most common type of buffer.
Reasons for using printer buffers:

-Stores data or information being sent to the printer temporarily.
-Compensates for difference in speed of CPU and printer.
-Allows CPU to carry out other tasks whilst printer is printing.
Benefits of increasing size of buffer in a printer:

-Reduces the number of data transfers to the printer.
-Ensures a more efficient use of the CPU.
-Larger files can be sent to the printer without problems
Use of buffers and interrupts in the transfer of data between primary memory and hard disk.
• Buffer is temporary storage area for data
• Data transferred from primary memory to buffer (or vice versa)
• When buffer full, processor can carry on with other tasks
• Buffer is emptied to the hard disk
• When buffer empty, interrupt sent to processor requesting more data to be sent to buffer.
• Works according to priorities
Cache Memory
- A cache is a small and very high speed memory used to speed up the transfer of data and
instructions, doubling the speed of the computer in some cases.
- It can located inside or close to the CPU Chip
- It is placed between the CPU and the main memory.
- It stores frequently or most recently used instructions and data
- It is faster than RAM
- The data and instructions that are most recently or most frequently used by CPU are stored
in cache memory.
- it is used to increase the speed of processing by making current programs and data available
to the CPU at a rapid rate
- CPU processes data faster than main memory access time, thus processing speed is limited
primarily by the speed of main memory.
- It compensates the speed difference between the main memory access time and processor
logic.
- It is used to increase the speed of processing by making current programs and data available
to the CPU at a rapid rate.
- The cache thus used for storing segments of programs currently being executed in the CPU
and temporary data frequently needed in the present calculations
- The amount of cache memory is generally between 1kb and 512kb
How cache memory works

Von Neumann Architecture
Diagram A Diagram B
The Von Neumann Computer architecture has the following characteristics

- Stores both data and instructions in the same memory.
- Has a single processor which follows a linear sequence of the fetch-decode-execute cycle.
Therefore it only processes one job at a time with one set of data . Execution occurs in a
sequential fashion from one instruction to the next, unless explicitly modified.
- Uses serial processing of instructions. Allows for one instruction to be rea d from memory or
data to be read/written from/to memory at a time.
- Instructions and data are stored in the same memory and share a communication pathway
or bus to the CPU. Because program memory and data memory cannot be accessed at the
same time, throughput is much smaller than the rate at which the CPU can work. This
constraint (problem) is called the Von Neumann bottleneck and directly impacts the
performance of the system. This can however be solved by use of cache memory.
- Von Neumann architectures usually have a single unified cache
- The Von Neumann machine had five basic parts:-
(i) Memory (ii) ALU (iii) control unit (iv) Input equipment & (v) output equipment: as shown below
- Processor needs two clock cycles to complete an instruction.

- In the first clock cycle the processor gets the instruction from memory and decodes it. In the
next clock cycle the required data is taken from memory. For each instruction this cycle repeats
and hence needs two cycles to complete an instruction
- Pipelining the instructions is not possible with this architecture.
- A stored-program digital computer is one that keeps its programmed instructions, as well as its
data, in read-write, random access memory (RAM), that is the Von Neumann computer. This
makes the machines much more flexible.
- By treating those instructions in the same way as data, a stored-program machine can easily
change the program, and can do so under program control.
- Once in the computers memory a program will be executed one instruction at a time by
repeatedly going through
- In the vast majority of modern computers, the same memory is used for both data and program
instructions.
Advantages
- Almost all data can be processed by the von Neumann computer
- Cheaper than alternative types of processing
- Its design is very simple
Disadvantages
- Slower than other architectures
- Limited by bus transfer rate
- Does not maximise CPU utilisation
- Poorly written programs can have their data mixed up as both data and instructions share
the same memory
Harvard architecture .
Diagram A Diagram B
The Harvard architecture has the following characteristics:
- Stores instructions and data in separate memory, thus has physically separate storage for data
and instructions
- Has separate data and instruction buses, allowing transfers to be performed simultaneously on both
buses.
- Data and instructions are treated separately.
- May employ pipelining. Efficient Pipelining - Operand Fetch and Instruction Fetch can be overlapped.
- Harvard Architecture have a system would have separate caches for each bus.
Uses
1-Digital signal processors (DSPs)-is a specialized microprocessor used to measure, filter and/or
compress continuous real-world analog signals e.g. can be found in guitar circuit.
2-Microcontrollers - is a small computer on a single integrated circuit containing a processor core,

memory, and programmable input/output peripherals. Microcontrollers are designed for embedded
applications like automatically controlled products and devices, such as automobile engine control
systems, implantable medical devices, remote controls, office machines, appliances, power tools, toys
etc.
Advantages
⋅ Faster because instruction fetches and data access do not compete for a single memory pathway.
⋅ Maximises the CPU utilisation.
⋅ Has increased throughput.
⋅ Efficient pipelining.
⋅ Different bus width for data bus and program bus are possible.
⋅ Has simultaneous access to more than one memory system.
⋅ Bus transfer is not limited.
⋅ Has distinct code and data address spaces.
Disadvantages
· Not widely used.

· More difficult to implement.
· More pins needed for buses.
Serial Processing Systems

Each instruction is executed in turn one after the other until the end of the program.
Advantages
- Nearly all programs can run on serial processing and therefore no additional complex code can be
written.
- All data types are suitable for serial processing
- Program can use the previous result in the next operation
- Data set are independent of each other
- Cheaper to handle than parallel
Disadvantages
- Slows data processing especially in the Von Neumann architecture (bottleneck)
- Too much thrashing especially with poorly designed programs
Parallel Processing Systems

- Parallel processing is the ability of a computer system to divide a job into many tasks which are
executed simultaneously faster, using more than one processor.
- Multiple ALUs or CPUs can be used to carry out different parts of the fetch-execute cycle.
- The computer is able to perform concurrent data processing to achieve faster execution time.
- The objective is to increase throughput ( The amount of processing that can be accomplished during
a given interval of time)
- Mostly applies to Single Instruction Single Data computer (SISD)
Application areas
- Scientists to design computer-generated models of vehicles.
- Airlines to process customer information, forecast demand and decide what fares to charge.
- The medical community uses parallel processing supercomputers.
- Weather forecasting , simulations and games consoles and graphics cards to shift the pixels about
Parallel processor
It is the simultaneous use of more than one CPU or processor core to execute a single program or
multiple threads. It means the tasks are shared among the processors.
NB:
- Instruction Stream :-the sequence of instructions read from memory

- Data stream : operations performed on the data in the processor
-Parallel processing may occur in the instruction stream , the data stream or both.
(a) Single Instruction Stream, Single Data Stream (SISD) Instructions are executed sequentially and
parallel processing can be achieved by multiple functional units or by pipelining.
(b) Single Instruction Stream, Multiple Data Stream (SIMD)- includes multiple processing units with
a single control unit. All processors receive the same instruction but operate on different data
(c) Multiple Instruction Stream, Single Data Stream (MISD) Involves parallel computing where
many functional units perform different operations by executing different instructions on the
same data set
(d) Multiple Instruction Stream, Multiple Data Stream (MIMD) processor capable of processing
several programs at the same time
Advantages
- Allows faster processing especially when handling large amounts of data
- Can make maximum CPU utilisation as long as it is kept full.
- It is useful in processor intensive programs such as simulations.
- Different processors can handle different tasks/parts of same job .
- Memory is scalable with number of processors. Increase the number of processors and the size
of memory increases proportionately.
- Each processor can rapidly access its own memory without interference and without the
overhead incurred with trying to maintain cache
Disadvantages
- Usually more expensive as multiple processing blocks are needed.
- Only certain types of data is appropriate for parallel processing
- Data that relies on previous operation cannot be made parallel.
- Each data set must be independent of each other
- The programmer is responsible for the details associated with data communication.
- Operating system is more complex to ensure synchronisation.
- Program has to be written in a suitable format.
- Program is more difficult to test/write/debug.
- It may be difficult to map existing data structures, based on global memory, to this memory
organization.
Parallel processing includes Vector (Array) Processing and Pipeline Processing

Involves the use of a several processors to perform a single job.
1. Pipeline Processing
- It is a technique which allows the overlapping of the fetch-decode-execute cycle for different
instructions.
- Without a pipeline, a computer processor gets the first instruction from memory, performs the
operation it calls for, and then goes to get the next instruction from memory, and so forth. While
fetching (getting) the instruction, the arithmetic part of the processor is idle. It must wait until it
gets the next instruction.
- With pipelining, the computer architecture allows the next instructions to be fetched while the
processor is performing arithmetic operations, holding them in a buffer close to the processor
until each instruction operation can be performed.
- The result is an increase in the number of instructions that can be performed during a given time
period.
- The instruction can take any of the three phases: it could be fetched (from memory), decoded
(by the control unit) or executed (by the control unit).
- The processor is split up into three parts (fetch, decode, execute), each of which handles one of
the three stages.
- Each part is called a line, where each single line is a pipeline.

- This can be best illustrated with the diagram below.
Advantages
- Execution time is reduced as three instructions are dealt with at the same time.
- Makes efficient use of the CPU as long as the pipelines are kept full.
Disadvantages
- Works only well on linear program. Once jump instructions are introduced the problem arises
that the wrong instructions are in the pipeline waiting to be executed, so every time the
sequence of instructions changes, the pipeline has to be cleared and the process started again.
2. Array / Vector Processing

- It is when a processor allows the same instruction to operate simultaneously on multiple data
locations (data array) and apply the same calculation on different data very fast. It uses one
control unit but with several ALUs which are able to work in parallel with one another .
- Is a Single Instruction Multiple Data (SIMD) which also called a Von Neumann computer meaning
that, lots of bits of data get processed with a single instruction.
Applications
- Weather forecasting , airflow simulation around new aircraft , games consoles and graphics
card. because it involves a large number of similar calculations,
Advantages
- Enables problem solving as the same calculations are performed on a range of data.
- Each result is independent of previous results, allowing deep pipelining and high clock rates.
- Allows multiple memory banks to simultaneously supply operands.
Disadvantages
- They are expensive to use in processing methods.
- They have difficulties in implementing precise exceptions.
- Increased code complexity.
3. Co-Processor
- This is an additional processor used to supplement the functions of the primary processor.
- It is used for a specific task and improves processing speed by executing jobs concurrently, e. g.
maths co-processor.
- Maths Core-Processor: an additional processor which works alongside the main processor,
capable of processing large representations using large size registers, particularly used for
floating point calculations (scientific calculations and algebraic functions), graphics, signal
processing, encryption etc.
Advantages
- Coprocessors can accelerate system performance by offloading processor-intensive tasks from
the main tasks
- Calculation (and hence performance) is much faster.
Disadvantages
- Adds to the cost of the computer as it requires more motherboard space.
- Consumes more power.
ADDRESSING MODES
-The different ways in which a computer calculate addresses holding the source and/or destination of the
data being processed in a particular instruction is called addressing mode.
-Each instruction specifies an operation on certain data.
-Addressing modes are mostly found in assembly language for microprocessors
-Each assembly language instruction has the following structure:
Op-code (operator):
- is the part that represent the operations that the computer can understand and carry out. It is
the mnemonic part of the instruction/that indicates what it is to do/code for the operation. They
are easier to remember. They can be represented by mnemonics which are the pseudo names
given to the different operations that make it easier. E.g. ADD.
Operand:
- It is the address field in an instruction that holds data to be used by the operation given in the op
code, e.g. in ADD 12, 12 is the operand
- Is the data to be manipulated, theres no point telling the computer what to ADD if theres no data
to apply it to. It can hold the address of the data, or just the data.
The data is what the operation is being applied to, there are a number of different ways in which this data
can be represented, and this is known as addressing.
*Symbolic addressing: the use of characters to represent the address of a store location
*Effective Address : the actual address of operand to be used by the instruction.
The most common addressing modes are: direct, indirect, indexed, relative and immediate addressing.
1. Immediate Addressing
• This is when the value in the instruction is not an address at all but the actual data (constant to be
used in the program). This is where the value to be used is stored in the instruction.
• The data to be operated on is held as part of the instruction format, the operand is therefore not
and address at all, but a value (indicated by #).
• The data to be used is stored immediately after the op code for the instruction. Thus the operand
field actually contains the data
e.g: LDA #&80 : Means that Load the hexadecimal value of 80 into the accumulator register.
MOVE #8, R1: Moves the value 8 into register R1
MVI C, #8: Move the value 8 into register C

• This is very simple, however its not often used because the program parameters cannot be
changed.
• This means that the data being operated on cant be adjusted and only uses constants.
• Can be used to i) Initialise constants ii) Initialise a counter at particular value.
2. Direct Addressing/Memory Addressing

• The operand gives the address of the data to be used in the program.
• The address in the instruction is the address to be used to get to the operand.
• It requires one memory reference to read the operand from the given location
• The address given in the instruction is the one that contains the data to be used in the operation
without any modification.
- e.g. i) ADD 23 ( we first go to memory address 23 which stores the instruction to be executed.)
ii) LDA MEM : load contents of location MEM into the accumulator
• It is very simple, although does not make best use of memory.
• It provides only a limited address space e.g. 10 out of 16 bits are available to hold the address.
• It is slow as too much memory is used
Why is it not possible to use only direct addressing in assembly languages?

- Because the number of addresses available in memory is limited by the size
- The address field code is not re-locatable(The code uses fixed memory locations)
Question: If 16 bits are allowed for an address, what is the maximum memory address that can be
referenced using direct addressing?
3. Indirect Addressing
- The address of data in memory is held in another memory location, and the operand of the
instruction holds the address of this memory location.
- The address given in the instruction holds the address of where the data is stored.
- This is whereby the real address is stored in the memory so the value in the address part of the
instruction is pointing to the address of the data.
- It is MOSTLY used when access areas of memory that are not accessible using the space available
for the address in the instruction code
e.g. i) ADD 23 (we go to memory address 23 there we are given another memory address, e.g 32,
where the actual instruction will be stored)
ii) LDA (100) (load the contents of the memory location whose address is stored at 100)
- This method is useful because the amount of space in a location is much bigger than the space in
the address part of the instruction.
- It gives flexibility as the original program does not need to be altered if the position of the
routines (sub-programs) change.
- Therefore we can store larger addresses and use more memory.
- It is used where memory larger than can be accessed by address in instruction
- It is also used when one wants to allow full size of register to be used for address
- Used if memory locations are 32 bits are used and thus allowing more memory to be accessed
- There is a problem that some areas of memory cannot be addressed because size of memory
address is larger than space available in instruction
- Indirect addressing solves this problem as the Memory address will fit in a memory location
4. Indexed Addressing
- The instructions specify two registers. The processor then adds contents of these two registers to
get the effective address.
- The address of the operand is obtained by adding a constant to the content of a register called
the INDEX REGISTER or MODIFIER REGISTER
- The address part of the instruction is added to a value held in the index register to get the actual
address.
- One of the registers is an address register and it holds the base address.
- The other one is a data register or the displacement or index register.
- The actual address/required address is found by adding a displacement to the base address.
e.g. LOAD R i, X (R ind) (Loads Ri with the contents of the memory location whose address is the
sum of the contents Rind (Index Register) and the value X.
- Used when a number of contiguous locations need to be accessed in order-e.g. contents of array
- Used when address in instruction does not change (need not to be altered-like constants), only
contents of IR need to be changed
5. Relative Addressing
- It is the same as Indexed addressing except that the program counter (PC) replaces the Index
Register.
- e.g. LOAD R i, X (PC) (Loads Ri with the contents of the memory location whose address is the sum
of the contents PC (Program Counter) and the value X stored in the address part of the
instruction.
- This is direct addressing that does not commence from the start of the address of the memory.
- It begins from a fixed point, and all addresses are relative to that point.
- Used to refer to jump instructions to refer to specify where the next instruction is located
relative to the instruction held in the PC.
- Relative address is an offset and can be used for arrays.
NB: Relative addressing allow the code to be relocatable anywhere in memory. This means the program
can be located in different parts of main memory at different times.
LOGIC GATES
- A logic gate is a device that produces signals of 1 or 0 when the input logic requirements are met and
are used in manipulating binary information.
- A logic gate is a device (or electronic circuit) that performs one or more logical operations on one or
more input signals.
- Its output represent Boolean (T or F) or binary values (1 or 0) as voltages.
- Logic gates are the building blocks of digital technology.
- They act as switches that open to pass on a pulse of electricity or close to shut it off.
- They can be used in applications like:
• Building computer chips
• Programming traffic signals
• Chips for automatic alarm systems
• Chips for automated control systems
- Electronic circuits operate using binary logic gates.

- Logic gates process signals which represent TRUE or FALSE, ON or OFF , 1 or 0
LOGIC GATES WITHIN PROCESSOR

-Modern computers are constructed making use of integrated circuits (ICs).
-ICs are also known as silicon chips, micro chips or chips.
-Transistors are electronic components found inside these chips.
-Transistors act as switches that are capable of switching electrical signals on and millions of times per
second.
-Transistors form the logic gates inside these chips.
*The CPU is made of millions of logic gates embedded into it which complete a variety of operations.
-The gates are used with a clock that regulates the speed at which the CPU is fed data.
-The speed is measured in Hertz (Hz) - amount of clock pulses in one second .
-If there was no clock to regulate the data flow, the CPU will be unorganised and useless.
-The clock makes everything organised and tells when the data should pass through, and when it should
not.
Main Logic Gates

The main logic gates are:
(a) OR gate
(b) AND gate
(c) NOT gate
(d) NOR gate
(e) NAND gate
(f) Exclusive OR gate (XOR)
(g) Exclusive NOR gate (XNOR)
Logic gates are used with truth tables .

• A truth table is a table which shows how a logic circuit's output responds to various
combinations of the inputs, using logic 1 for true and logic 0 for false.
• A truth table helps to understand the behaviour of combinations of logic gates linked together.
• It lists the value of the output for every possible combination of the inputs
• Truth tables contains 1s and 0s and are an integral part of logic gates functionality.
• Truth table and logic gates use the following:
- 1 (True, ON, Not False)
- 0 (False, OFF, Not True)
- Truth tables show how the input(s) of a logic gate relate to its output.
- The gate input(s) are shown in the left column(s) of the table with all the different possible input
combinations
- The gate output(s) are shown in the right hand side column.
Graphical Representation of Gates and their Truth Tables

-Each logic gate has its own unique graphical representation, which can be in general form or in standard
form.
(1) General form
Each logic gate has a circle and the name of the gate to differentiate it from the rest as given
below:
The name inside the gate gives us the type of the gate
(2) Standard Representation
In standard form, each logic gate has its own unique diagram. Even if the name of the gate is not
written, one knows what it stands for because of the shape. The following are the logic gates and
their shapes in standard form.
(a) OR gate
This represents two inputs entering the gate and one output from the gate. The inputs can be
represented by any alphabetic characters, e.g. A and B, while the output can be X, given as
follows:
Logic Gate Diagram Truth table

Standard Form General Form
- The output (X) is true if EITHER INPUT A OR INPUT B are true.

- Thus, if any one of the inputs is 1, the output is automatically 1
- Output only becomes 0 if all inputs are 0
- The OR gate is an electronic circuit that gives a high output (1) if one or more of its inputs
are high (1).
- OR B or X = A + B
(b) AND gate
This is represented as follows:

-The output (X) is only true if the INPUT A AND INPUT B are both true.
- If any one of the inputs is 0, then the output becomes 0 also.
- The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are high
(1).
- AND B or X = A . B
(c) NOT gate

-It is also known as an INVETER because it is an electronic circuit that produces the an inverted
version of the input as its output.
-The NOT gate has only one input and one output. The input is negated. Thus if input is 1, output
is 0, and vice versa.
-The output (X) is true when the INPUT A is NOT TRUE.
-The output (X) is False when the INPUT A is TRUE.
-A = NOT A A = A' A=A
(d) NOR gate

- This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate (with the
output X inverted).
- The output (X) is true if NOT (INPUT A OR INPUT B) are true.
- Thus X = NOT (A or B)
(e) NAND gate

-This is a NOT-AND gate which is equal to an AND gate followed by a NOT gate (with the
output X inverted).
-The output is true if INPUT A AND INPUT B are NOT both True.
-It translates to NOT (A and B)
(f) Exclusive OR gate (XOR)
-In this gate, the output is 1 (T) if either, but not both, of the inputs are 1 (T).
-The output is 0 (False) if both inputs are 0(False) or if both inputs are 1(True).
- In other words, the output is 1 if the inputs are different, but 0 if the inputs are the same.

(g) Exclusive NOR Gate (XNOR)
-The XNOR (exclusive-NOR) gate is a combination XOR gate followed by an inverter.

-Its output is 1 if the inputs are the same, and 0 if the inputs are different.

LOGIC DIAGRAMS
-It is a diagram of one or more of logic gates linked together.
-Letters are used to label the input(s) and output(s).
-Lines are used to show how logic gates are connected.
-It is possible to combine logic gates (combinational logic gates) to produce more complex logic
networks.
BOOLEAN EXPRESSIONS
-Boolean Expressions are equivalent expressions of the logic state of gates. For example, the
Boolean expression for:
a NOT gate with input A and output C: C = NOT A
-NAND and NOR gates are known as universal gates because they are inexpensive to
manufacture and any Boolean function (AND, OR, NOT) can be constructed using only NAND
or only NOR gates.
-Even NAND and NOR gates can be used as each others alternatives in a circuit.
NOR gate constructed using only NAND gates
NAND gate constructed using only NOR gates

Expressions and logic gates

Expressions using mathematical symbols can be used to represent logic gates.
One may be required to draw logic gates using such mathematical expressions
Such symbols and their meaning are as given below:
1. Plus sign (+)
- This means OR, e.g.
-
- This is an OR gate, which means C = A OR B.
2. Multiplication Sign
- This represents an AND gate
- E.g C = AB,
- C = AxB,
- C = A.B
-
- C = (A.B).(A.C)
- All these are various versions of the AND gate.
3. Complement sign ( or above an input)

- This represents a NOT gate
- For example: NOT A can be given as any one of the following:
• A
•
Logic gate Problems:

Question: Worked Example
A steel rolling mill is to be controlled by a logic network made up of AND, OR and NOT gates
only. The mill receives a stop signal (i.e. S = 1) depending on the following input bits:
A stop signal (S = 1) occurs when:

either: Length, L > 100 metres and Velocity, V < =10 m/s
Or Temperature, T <=1000 C and Velocity, V >10 m/s
Draw a logic network and truth table to show all the possible situations when the stop signal could
be received.
Answer
Step 1: Deduce and Write the logic statement

- The first statement can be re-written as: (L = 1 AND V = NOT 1) since Length > 100 metres
corresponds to a binary value of 1 and Velocity <=10 m/s corresponds to a binary value of 0
(i.e. NOT 1).
- The second statement can be written as (T = NOT 1 AND V = 1)
- Both these statements are joined together by OR which gives us the logic statement: if (L = 1
AND V = NOT 1) OR (T = NOT 1 AND V = 1) then S = 1
- The above statement can be written as: S = 1 if (L = 1 AND V = NOT 1) OR (T = NOT 1 AND
V = 1)
NB: the Student should first of all write the following logic statement before coming up with a
truth table or logic circuit as this has some marks awarded to it., i.e.
S = 1 if (L = 1 AND V = NOT 1) OR (T = NOT 1 AND V = 1)
Step 2: Logic Circuit

- Using the logic statement above, one can now draw the logic circuit as given below:
Step 3: Truth Table

- One can now draw the truth table, basing from the logic statement in Step 1.
Questions
1. A computer will only operate if three switches P, S and T are correctly set. An output signal (X
= 1) will occur if R and S are both ON or if R is OFF and S and T are ON. Design a logic network
and draw the truth table for this network.
2. A traffic signal system will only operate if it receives an output signal (D = 1).
This can only occur if:
Either (a) signal A is red (i.e. A = 0)
Or (b) signal A is green (i.e. A = 1) and signals B and C are both red (i.e. B and C are
both 0)
Design a logic network and draw a truth table for the above system.
3. A chemical plant gives out a warning signal (W = 1) when the process goes
wrong. A logic network is used to provide input and to decide whether or not
W=1
A warning signal (W = 1) will be generated if

either (a) Chemical Rate < 10 m /s
or (b) Temperature > 87 C and Concentration > 2 moles
or (c) Chemical rate = 10 m /s and Temperature > 87 C
Draw a logic network and truth table to show all the possible situations when
the warning signal could be received
4. A power station has a safety system based on three inputs to a logic network.
A warning signal (S = 1) is produced when certain conditions occur based on
these 3 inputs:
A warning signal (S = 1) will be generated if:

Either : (a) Temperature > 120C and Cooling Water <= 100 l/hr
Or (b) Temperature <= 120C and (Pressure > 10 bar or Cooling Water < 100 l/hr)
Draw a logic network and truth table to show all the possible situations when
the warning signal could be received.
5. Draw a circuit diagram for δ = (xy' + x'y)z
6. Device a suitable Boolean expression and truth table for the circuit below:
7. Draw circuits for following Boolean statements.

a. If A AND B are on AND C AND D are on then output is on.
b. If A OR B are on AND C OR D are on then output is on.
c. If A OR B is on then output is off.
d. If B AND C is off OR A is on then output is on.
e. If A is off AND B OR C is on AND D is off then output is on.
f. If A is on AND B AND C are off AND D is on then output is on.
g. If smoke detector (S) is on OR fire alarm (F) is on then sprinkler (W) is on.
8. a. Simplify the following logic equations by using the rules of Boolean algebra.
a. A C + A B C
b. (A + B) (B + Ā)
c. A • (Ā + C) + C
b. For each of the previous questions, create a circuit for the Boolean expression before
simplification.
Construct Software Architectural Design For A Given Scenario
Software Architecture
- The architecture of a system describes its major components, their relationships
(structures), and how they interact with each other.
- The structure or structures of the system, which comprise software components,
the externally visible properties of those components, and the relationships
among them.
The Importance of Architecture

provides a communication among stakeholders
captures early design decisions
acts as a transferable abstraction of a system
defines constraints on implementation
dictates organizational structure
is analysable and a vehicle for predicting system qualities
makes it easier to reason about and manage change
helps in evolutionary prototyping
enables more accurate cost and schedule estimates
Architectural Drivers
- These the design forces that will influence the early design decisions the architects have
to
make
- Architectural drivers are not all of the requirements for a system, but they are an
early attempt to identify and capture those requirements, that are most
influential to the architect making early design decisions.
Functional Requirements
specify what the software needs to do, they relate to the actions that the product must carry
out in order to satisfy the fundamental reasons for its existence.
1. Business Level: defines the objective/goal of the project and the measurable
business benefits for doing it.
2. User Level: user requirements are written from the user's point-of-view.
3. System Level: defines what the system must do to process input and
provide the desired output.
MoSCoW Method:
M - MUST: Describes a requirement that must be satisfied in the final solution for the
solution to be considered a success.
S - SHOULD: Represents a high-priority item that should be included in the solution if it is
possible. This is often a critical requirement but one which can be satisfied in other ways if
strictly necessary.
C - COULD: Describes a requirement which is considered desirable but not necessary.
This will be included if time and resources permit.
W - WON'T: Represents a requirement that stakeholders have agreed will not be
implemented in a given release, but may be considered for the future.
Architects use a number of tools to model the architecture of a system at different view
levels. These include
- Layer diagrams
- Component Diagrams
- Sequence Diagrams
- Class Diagrams
- Use Case diagrams
- Activity Diagrams
- Deployment Diagram
The following diagrams are for an Online Catering Service System

Page 30 of 31
Page 31 of 31

Fcas Architecture

Uploaded by

Copyright:

Available Formats

Fcas Architecture

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Fcas Architecture

Uploaded by

Copyright:

Available Formats

FCHS- Stay Home and Stay Safe

The processor has the following functions:

(b) Word Size

(c) Bus Width

Active Electronic C omponents

Passive Electronic C omponents

The main components of the processor are:

1. Arithmetic Logic Unit

The Fetch-Decode-Execute Cycle

(c) System clock

Memory address register (MAR)

Current instruction register (CIR)

The Status Register (SR).

Instruction Register (IR)

How and why is the index register (IR) used

General Purpose Registers

The Fetch decode execute cycle and the Registers

The Fetch-Decode Execute Cycle

The fetch-decode-execute cycle operates in the following way:

The main types of buses are:

Why interrupts are used in a computer system

Vectored interrupt mechanism

Reasons for using printer buffers:

Benefits of increasing size of buffer in a printer:

How cache memory works

Von Neumann Architecture

The Von Neumann Computer architecture has the following characteristics

- Processor needs two clock cycles to complete an instruction.

The Harvard architecture has the following characteristics:

- Data and instructions are treated separately.

2-Microcontrollers - is a small computer on a single integrated circuit containing a processor core,

· Not widely used.

Serial Processing Systems

Parallel Processing Systems

- Instruction Stream :-the sequence of instructions read from memory

Parallel processing includes Vector (Array) Processing and Pipeline Processing

- Each part is called a line, where each single line is a pipeline.

2. Array / Vector Processing

-Each assembly language instruction has the following structure:

*Effective Address : the actual address of operand to be used by the instruction.

MVI C, #8: Move the value 8 into register C

2. Direct Addressing/Memory Addressing

Why is it not possible to use only direct addressing in assembly languages?

- Electronic circuits operate using binary logic gates.

LOGIC GATES WITHIN PROCESSOR

Main Logic Gates

(b) AND gate

(c) NOT gate

(d) NOR gate

(e) NAND gate

(f) Exclusive OR gate (XOR)

(g) Exclusive NOR gate (XNOR)

Logic gates are used with truth tables .

- 0 (False, OFF, Not True)

Graphical Representation of Gates and their Truth Tables

Logic Gate Diagram Truth table

- The output (X) is true if EITHER INPUT A OR INPUT B are true.

(b) AND gate

This is represented as follows:

(c) NOT gate