Electronic Principles and Circuits Lab Manual - BEC303 - 18-11-2023
Electronic Principles and Circuits Lab Manual - BEC303 - 18-11-2023
Electronic Principles and Circuits Lab Manual - BEC303 - 18-11-2023
BEC303
ELECTRONIC
PRINCIPLES AND
CIRCUITS LABORATORY
MANUAL
SUBJECT CODE: BEC303
APPROVED BY: SIGNED BY:
Prof. Pappa M Dr. R Elumalai
Program Coordinator Head of Dept.
CONTRIBUTED BY :
Syllabus Contents
Syllabus Contents
Sl.NO Experiments
1 Design and Test
(i) Bridge Rectifier with Capacitor Input Filter
(ii) Zener voltage regulator
4 Plot the transfer and drain characteristics of n-channel MOSFET and calculate its parameters, namely;
drain resistance, mutual conductance and amplification factor.
5
Design and test (i) Emitter Follower , (ii) Darlington Connection
6
Design and plot the frequency response of Common Source JFET/MOSFET amplifier
7
Test the Opamp Comparator with zero and non zero reference and obtain the Hysteresis curve.
8
Design and test Full wave Controlled rectifier using RC triggering circuit.
9 Design and test Precision Half wave and full wave rectifiers using Opamp
BRIDGE RECTIFIER
Aim: Design and Testing of Full wave Bridge type rectifier circuit
with Capacitor filter. Determination of ripple factor, regulation
and efficiency.
OBJECTIVE :
To calculate the ripple factor, efficiency and regulation of the bridge rectifier at different loads, each
with filter.
COMPONENTS REQUIRED :
THEORY :
Bridge rectifier circuit is a full wave rectifier consisting of a resistive load, four diodes forming the four
arms of a bridge and a source of ac voltage. The rectifying element i.e. the diode, conducts only during one
half cycle of the input ac supply when it is forward biased. Hence four diodes are connected such that two
in series are forward biased for one half of the cycle each. Hence output is obtained for both half cycles.
To one diagonal of the bridge, the ac voltage is applied through a transformer and the rectified DC voltage
is taken from the other diagonal of the bridge.
The DC output waveform is expected to be a straight line but the bridge rectifier gives output in the form
of only positive or negative sinusoidal pulses. Thus the output waveform is a pulsating DC waveform.
The main advantage of this circuit is that it does not require a center tap on the secondary winding of the
transformer, AC voltage can be directly applied to the bridge.
The ripple factor indicates the AC content (ripples) present in the output DC voltage. It is thus defined as
ratio of the RMS value to the average value of the output waveform. Ripples are reduced by using a
capacitor acting as a filter, resulting in a smoother waveform i.e. higher average value of the output DC
voltage.
Conversion efficiency is defined as ratio of the output power to the input power. Efficiency for a particular
load increases as ripple content is reduced using filters.
Regulation of the rectifier is defined as the drop in terminal voltage of the rectifier for a particular load
from that of no load expressed as a percentage of the no-load terminal voltage. This value indicates the
DEPARTMENT OF ECE, CMRIT 3
ELECTRONIC PRINCIPLES AND CIRCUITS LABORATORY
BEC303
CIRCUIT DIAGRAM :
PROCEDURE :
OBSERVATION :
Amplitude : ……………
Frequency : ……………
VNL : ……………
TABULAR COLUMN :
Efficiency=
VAC= VRMS Ripple= Regulation=
RL (VNL-
VR(P-P) VDC VAC/ VDC
(Ω) =√(V2rms-V2 DC) VFL)/VFL
(%)
(%)
WAVEFORMS :
VIN
20
0
t
- 20
VO
20
0 Vo (Without filter)
t
VC
Vo (With filter)
RESULT:
Output waveform of full wave rectifier using centre tapped transformer have been observed and
ripple factor, efficiency and regulation is calculated.
VIVA VOCE:
1. What is a rectifier ?
Rectifier is a circuit which converts AC waveform into DC.
6. What are ripples ? Define ripple factor and state its significance.
Ripples are the periodically alternating content present in the waveform. Ripple factor is defined as the ratio of
rms voltage of the measuring quantity to its average value. It indicates the amount of AC present in the DC
waveform.
7. State the standard values of ripple factor for each type of rectifier.
HWR-1.21
FWR and BR -0.48
12. State the design formula for filters for each type of rectifier.
HWR 1
C
2 3 frRL
FWR and BR 1
C
4 3 frRL
13. How does the filter vary the average value, efficiency and ripple factor of the output voltage?
As the filter value increases, the ripple factor reduces, the average value of the output voltage and hence
efficiency increases.
14. State the average voltage values of the output under the following conditions (ignoring voltage drops across
components) :
a) HWR, with 12V centre-tapped transformer , without filter – 5.4 V
b) FWR, with 12V centre-tapped transformer, without filter – 10.8 V
c) BR, with 6V centre-tapped transformer, without filter – 10.8 V
17. Compare the PIV rating of the diodes in different types of rectifiers ?
HWR and FWR have PIV rating equal to peak supply voltage, while BR will have rating half the supply voltage.
19. What is the voltage across the diode in each type of rectifier under the following situations :
a) Conducting period
b) Reverse biased period
Type of rectifier Conducting period Reverse biased period
HWR 0.7 Peak value of supply voltage
FWR 0.7 Peak value of supply voltage
BR 0.7 Half the peak value of supply voltage
20. What is the range of internal impedance of an ammeter and a voltmeter ?
Ammeter – very low impedance
Voltmeter – very high impedance
21. Why shouldn’t ammeters be connected in parallel to the supply in the circuit?
The internal impedance being very low, supply gets shorted, hence very high current flows through the ammeter
damaging the meter.
23. What is the frequency of ripples obtained in the output waveform for each type of rectifier if the supply is 60 Hz?
HWR – 60Hz
FWR and BR – 120 Hz
24. State some advantages and disadvantages of a bridge or full wave rectifier over half wave rectifier.
a) The rectification efficiency of full-wave rectifier is double of that of a half-wave rectifier.
b) The ripple voltage is low and of higher frequency in case of full-wave rectifier so simple filtering circuit is
required.
c) Higher output voltage, higher output power and higher Transformer Utilization Factor (TUF) in case of a
full-wave rectifier.
d) In a full-wave rectifier, there is no problem due to dc saturation of the core because the DC current in the two halves of the
two halves of the transformer secondary flow in opposite directions.
e) No centre tap is required in the transformer secondary so in case of a bridge rectifier the transformer required is simpler. If
stepping up or stepping down of voltage is not required, transformer can beeliminated even.
f) The PIV is one half that of centre-tap rectifier. Hence bridge rectifier is highly suited for high voltage applications.
g) Transformer utilization factor, in case of a bridge rectifier, is higher than that of a centre-tap rectifier.
h) For a given power output, power transformer of smaller size can be used in case of the bridge rectifier because current in
both (primary and secondary) windings of the supply transformer flow for the entire ac cycle.
Apparatus Required :
Sl. No Components required Specification Quantity
1 Zener diode 20V, 1W 1
2 Resistors 1KΩ, 280Ω/1W 1
3 DRB 1
4 Bread board 1
5 Multimeter 2
6 DC regulated Power supply (0-30)V, 2A 1
Theory: The Zener diode is like a general-purpose signal diode. When biased in the forward direction it behaves just like a
normal signal diode, but when a reverse voltage is applied to it, the voltage across it remains constant for a wide range of
currents. The Zener Diode is used in its "reverse bias". From the I-V Characteristics curve we can study that the zener
diode has a region in its reverse bias characteristics of almost a constant negative voltage regardless of the value of the
current flowing through the diode and remains nearly constant even with large changes in current as long as the zener
diodes current remains between the breakdown current IZ(min) and the maximum current rating IZ(max).
This ability to control itself can be used to great effect to regulate or stabilise a voltage source against supply or load
variations. The fact that the voltage across the diode in the breakdown region is almost constant turns out to be an important
application of the zener diode as a voltage regulator.
Characteristics
Figure 1 shows the circuit diagram and current versus voltage curve for a Zener diode. Observe the nearly constant voltage in
the breakdown region.
a) Line Regulation
In this type of regulation, series resistance and load resistance are fixed, only input voltage is changing. Output voltage remains
the same as long as the input voltage is maintained above a minimum value.
Percentage of line regulation can be calculated by
Where V0 is the output voltage and VIN is the input voltage and ΔV0 is the change inoutput voltage for a particular
change in input voltage ΔVIN.
b) Load Regulation
In this type of regulation, input voltage is fixed and the load resistance is varying. Output volt remains same, as long as the
load resistance is maintained above a minimum value.
Percentage of load regulation =
Where VNL is the null load resistor voltage (ie. remove the load resistance and measure thevoltage across the Zener Diode) and
VFL is the full load resistor voltage.
Design:
IZ(max) = PZ(max)/VZ
for a given Zener diode if VZ=15V and PZ(max)=1W, thenIZ(max)=66.67mA.
For safe operation select, IZ(max)= IZ(max)/2 = 33.335mA ≈ 35mA. Selecting IL=5mA, and IZ(min)=5mA
(from VI characteristic).
RL=VL/IL=VZ/IL= 3KΩ.
AIM OF THE EXPERIMENT: Conduct experiment to test diode clipping (single/double ended) and clamping circuits
(positive/negative).
COMPONENTS REQUIRED:
THEORY:
CLIPPER CIRCUIT:
The process by which the shape of a signal is changed by passing the signal through a network consisting of
linear elements is called linear wave shaping. Most commonly used wave shaping circuit is clipper.
Clipping circuits are those, which cut off the unwanted portion of the waveform or signal without
distorting the remaining part of the signal. There are two types of clippers namely parallel and series. A
series clipper is one in which the diode is connected in series with the load and a parallel clipper is one in
which the diode is connected in parallel with the load.
𝑉𝑂 = 0𝑉
𝑉𝑂 = 0𝑉
In the negative half cycle D is forward biased
Applying KVL to the loop
𝑉𝑖 + 𝑉𝐷 − 𝑉𝑜 = 0
𝑉𝑜 = 0𝑉
𝑉𝑜 = 𝑉𝑖
CLAMPING CIRCUIT: A Clamper is a network constructed of a diode, a resistor and a capacitor that
shifts a waveform to a different DC level without changing the appearance of the applied signal. A
clamper is one, which provides a D.C shift to the input signal. The D.C shift can be positive or
negative. The clamper with positive D.C shift is called positive clamper and clamper with negative
shift is called negative clamper. The peak to peak voltage at the output of a clamper is the same as
that of the input.
The output shifts between 0.5V and -9.5V. Here the output has shifted down by 4.5V.
The peak to peak voltage at the output of a clamper is the same as that of the input.
PROCEDURE:
1. Rig up the circuit as shown in the figure.
2. Give a sinusoidal input of 10V peak to peak to the clipper circuit and clamper circuit.
3. Check the output at the output terminal.
4. To plot the transfer characteristics for clipper circuits, connect channel X of the CRO to the input
and channel Y to the output and press the XY switch.
5. Adjust the grounds of both the channels to the centre.
6. Measure the designed values.
RESULT:
From the above experiment it has been observed that, with different value of the DC supply
voltage, the output waveform gets changed. In clamper circuit, for different values of DC voltage
the output waveform gets shifted without altering its peak to peak voltage.
Aim: Plot the input and output characteristics of a JFET. Calculate its
parameters, namely; drain dynamic resistance, mutual conductance and
amplification factor from the plot.
COMPONENTS REQUIRED:
Sl. No. Components Details Specification Qty
1. Transistor BFW10/BFW11 1 No.
2. Resistors 22 K 1 No
3. Digital Ammeters ( 0 - 200 mA) 1 NO
4. Digital Voltmeter (0 - 20V) 2 NO
5. Dual DC Regulated Power supply (0 - 30 V) 1 NO
THEORY:
A field effect transistor (FET) is a unipolar device, which
conducts current using only one kind of charge carriers. FET uses the
Gate voltage that is applied to input terminal to control the current
flowing through it resulting in the output current being proportional to
the input voltage. As their operation depends on an electric field (hence
the name field effect) generated by the input Gate voltage, this makes
the Field Effect Transistor a “VOLTAGE” operated device.
There are two main types of field effect transistor, the Junction
Field Effect Transistor (JFET) and Metal Oxide Semiconductor Field
Effect Transistor (MOSFET).
drain. Source is the terminal that emits carrier and the drain is the
terminal that receives carrier.
Circuit Diagram:
Expected Waveforms:
Procedure:
a) Transfer Characteristics:
b) Drain Characteristics:
2
3
Transfer Characteristics:
Operation:
The circuit diagram for studying drain and transfer characteristics is
shown in the figure1.
RESULTS:
1. 𝒓𝒅 =
2. g𝒎 =
3. 𝝁 =
Viva Questions:
A JFET is voltage controlled device because its output characteristics are determined by the
Field which depends on Voltage applied.
It is a voltage−controlled device in which current flows from the SOURCE terminal (equivalent
to the emitter in a bipolar transistor) to the DRAIN (equivalent to the collector). A voltage
applied between the source terminal and a GATE terminal (equivalent to the base) is used to
control the source − drain current.
Pinch-off voltage is the drain to source voltage after which the drain to source current
becomes almost constant and JFET enters into saturation region and is defined only when gate
to source voltage is zero.
• Differential amplifier
• Analog switch
Q8. When the JFET is no longer able to control the current, this point is called as? Breakdown
region
Q9. What is transfer characteristics? Give the relation between µ, 𝒈𝒎 and 𝒓𝒅?
The transfer characteristic for a JFET can be determined by keeping drain-source voltage, VDS
constant and determining drain current ID for various values of gate-source voltage VGS. The
curve is plotted between gate-source voltage VGS and drain current ID.
µ = 𝒈𝒎 × 𝒓𝒅
The reason for the phase shift can be seen easily by observing the operation of the N-
channel JFET. On the positive alternation of the input signal, the amount of reverse bias on
the P-type gate material is reduced, thus increasing the effective cross-sectional area of the
channel and decreasing source-to-drain resistance. When resistance decreases, current
flow through the JFET increases. This increase causes the voltage drop to increase, which in
turn causes the drain voltage to decrease. On the negative alternation of the cycle, the
amount of reverse bias on the gate of the JFET is increased and the action of the circuit is
reversed. The result is an output signal, which is an amplified 180-degree-out-of-phase
version of the input signal.
Common-drain
Q12. Why JFET apparatus must be handled with care while performing the experiment?
Because transistors are damaged by excess of heat while soldering or when there is a
sudden urge of current due to accidental shorting of leads while measuring voltages on
transistors, in operation.
COMPONENTS REQUIRED:
THEORY:
current increases.
Expected Graph:
2. Vary the power supply V1 in steps and note down the readings
of VGS and ID at each step and tabulate the readings in tabular
column 2.
3. Vary the power supply V2 and set the VDS to 12v
4. Vary the power supply V1 in steps and note down the readings
of VGS and ID at each step and tabulate the readings in tabular
column 2.
5. Determine trans conductance (gm) with the help of graph VGS
v/s ID.
6. Determine drain resistance (rd) with the help of graph VDS v/s ID.
Result:
1. g𝒎 =
Viva Questions:
2. Expand MOSFET
Metal Oxide Semiconductor Field Effect Transistor
3. What is a MOSFET?
It is a special type of FET in which there is a thin layer of silicon
dioxide between
gate and the channel that works by electronically varying the width
of a channel along which charge carriers flow.
6. What is biasing?
Biasing is a method of applying a suitable potential across
any electronic equipment in order to make it operate as we require.
EMITTER FOLLOWER
AIM
OBJECTIVES
22 KΩ 1 no.
33 KΩ 1 no.
2. Capacitor 1 µF 2Nos
3. Transistor BC 107 1 no.
4. Function generator 0 to 1 MHz 1 no.
5. Oscilloscope 0 to 20 MHz 1 no.
6. Multimeter 1 no.
7. Breadboard 1 no.
8. Connecting wires
PRINCIPLE
Emitter follower is the popular name for common collector amplifier. Its voltage gain is approximately
unity (without RLvoltage gain is unity). It has high input impudence and lowoutput impedance. Thus emitter
follower has less loading effect and is suitable for impedance matching.
Since collector is directly connected to dc source, it appears to be grounded for ac signal. Output is
taken from the emitter terminal. The output voltage is in phase and is equal to the input signal.
Since the amplitude and phase of the output (emitter) follows the input (base), the circuit is called emitter
follower. In this circuit voltage divider biasing is used for base bias. RE acts as the load for signal at the
output circuit.RE also provides a negative feedback in the circuit.
PROCEDURE
CIRCUIT DIAGRAM
OBSERVATIONS
1. DC Condition (multimeter)
VCC = VCE =
VBE =
Note : At proper biased condition, VBE should be 0.6V to 0.7V, VCE should be approximately half of VCC
3. Voltage gain
(i) Without load (RL = ∞)
VO = 1V
Gain = = 1
VO =
Gain =
RESULT:
INFERENCE:
AIM:
To design and test a Darlington emitter follower circuit with and without boot strapping and
determine the gain, input and output impedance for both the circuits.
COMPONENTS REQUIRED:
THEORY:
Normally transistors are used as amplifiers. But there are some applications in which, matching of
impedance is required between two circuits without any gain or attenuation. In such applications emitter
followers are used. Emitter followers have large input impedance and small output impedance. Darlington
emitter follower has two transistors connected in cascade such that the emitter of first transistor is connected
to the base of second transistor. The voltage gain of the darlington emitter follower is close to unity. The
major drawback of this circuit is that the second transistor amplifies leakage current of the first transistor and
overall leakage current becomes high. The output is observed at the emitter terminal of the second transistor.
Hence it is called an emitter follower.
CIRCUIT DIAGRAM:
Vcc = 12V
R1 1M
Cb = 0.47µf
Q1
QSL100
SL100
R2 2.2 M
Vin
CE = 0.47µf
RE
Vo
1.5 K
DESIGN:
Given IC = 4mA, VCC = 12V, VBE = 0.6V, 1 = 2 = 100
To find RE:
Therefore RE = 6 / 4 x 10-3
RE = 1.5k
To find R1 & R2:
W.K.T. IC = IB
Therefore IB = (4 x 10-3)/ 100 = 40 A
Let 10IB be the current through R1 and 9IB be the current through R2.
Therefore R2 = 20 K 22K
W.K.T. CC = 10 / XRE = 10 / ( 2..f.RE)
Assume f = 50Hz
Therefore CC = 21.2F 47 F
PROCEDURE:
TABULAR COLUMN:
VIN = constant
Frequency
V0 (V) AV AV (dB)
(Hz)
WAVEFORM:
Vin
Vin 0 t
V0
0 t
Vin
Components and equipments required: JFET – BFW10, Resistors - 180 Ω, 1KΩ, 10KΩ and 1MΩ,
Capacitors 47μf, 0.1μf and 0.047μf, Power Supply, 10Hz – 3MHz Signal generator, CRO, Connecting
wiresand Bread board/Spring board with spring terminals.
Design:
let Rs = 330Ω
Let RD=1.0 KΩ
RG may be chosen arbitrarily but should be large enough such that overall input impedance is not
affectedmuch. Let RG=1.0 MΩ
CC1 = 1/2лf1Ri will be very small because of large Ri and chosen to be much larger so that it
does notdecide f1. Thus CC1=0.1μF
Let RL=10KΩ and f1=300Hz
Typical value of output admittance for BFW10, gd =85μ
MhosThat is, rd =1/ gd = 12KΩ. Therefore RD||rd
≈RD=1KΩ
Circuit Diagram:
Procedure:
1. Switch on the D.C. power supply and check the D.C. conditions without any input signal and
record in table below:
Result:
Thus the frequency response analysis of JFET and MOSFET amplifier are analysed.
the op-amp is set up as a comparator to detect a positive voltage. The voltage to be sensed Vi ,is
applied to the op-amp’s (-) input, therefore this circuit is a inverting positive level detector. When Vi is
the op-amp is set up as a comparator to detect a negative voltage. The voltage to be sensed Vi ,is
applied to the op-amp’s(-) input, therefore this circuit is a inverting negative level detector. When Vi is
CIRCUIT DIAGRAM:
Fig 7.6 Inverting positive voltage comparator Fig 7.7 Inverting Negative voltage Comparator
TRANSFER CHARACTERISTICS:
Figure 7.10 : Pspice schematic diagram and output waveform of Inverting negative voltage comparator.
VIVA QUESTION:
1. What is a voltage comparator?
2. What is a zero-crossing detector?
3. What is the difference between voltage comparator and zero crossing detector?
4. What is the difference between inverting and non-inverting ZCD?
5. What is the difference between inverting and non-inverting voltage comparator?
6. What is the drawback in zero crossing detectors?
a) Low frequency signal and noise at output terminal
b) High frequency signal and noise at input terminal
c) Low frequency signal and noise at input terminal
d) High frequency signal and noise at output terminal
7. State a method to overcome the drawback of zero crossing detectors?
a) Increasing input voltage
b) Use of positive feedback
c) Connect a compensating network
d) None of the mentioned
8. How the op-amp comparator should be chosen to get higher speed of operation?
a) Large gain
b) High slew rate
c) Wider bandwidth
APPARATUS REQUIRED :
1. RC TRIGGERING MODULE
2. Multimeter -1NO.
3. LAMP 100W – 1NO.
4. FUSE UNIT – 1NO.
5. CRO with PROBE – 1NO.
THEORY :
R and RC firing circuits are simple and economical. They can be used to
trigger SCRs in rectifiers and AC voltage controllers. But they are not used commercially
because the turn on angle of the SCR realized using these circuits is not thermally stable.
In the RC firing circuit the firing angle can be varied from nearly 0o to almost 180o
by varying the pot. During each negative half cycle of the input voltage, the capacitor
charges to the peak supply voltage through D1 is provided in order to by pass R1 and R2
during each negative half cycle of the supply voltage so that the capacitor charges fast to
the negative peak value of the supply . When the SCR anode voltage becomes positive, the
capacitor starts charging through the pot so as to make the top plate positive with respect
to the bottom plate. When the positive capacitor voltage becomes equal to Vgt the SCR
turns ON. The time taken for the capacitor to charge up to Vgt can be increased by
increasing the pot resistance. Then, the firing angle increases. If the pot resistance is
decreased, then, the capacitor voltage reaches the value Vgt earlier during the half cycle,
and the firing angle will be lower. Diode D2 is provided to prevent breakdown of
cathode gate junction during negative half cycles.
When the SCR turns ON, the voltage drop across C during conduction of SCR
keeps it almost discharged till the beginning of the next half cycle of the supply
voltage.
CIRCUIT DIAGRAM :
PROCEDURE :
1. Observe and study the module.
2. Connect the circuit as shown in the circuit diagram
3. Vary the pot meter R1 to get minimum alpha and note down the corresponding
average value of the voltage and wave form across the load.
4. Repeat the steps 1 to 3 for different values of alpha by varying the pot
meter Resistance.
5. Switch off the power.
TABULAR COLUMN :
EXPECTED GRAPH :
Expt.No.9: Design and test Precision Half wave and full wave
rectifiers using Opamp.
AIM
To design and set up precision rectifier using op-amp and check its performance.
Dual power supply, CRO, function generator, bread board, op-amp, diodes, and resistors.
THEORY
In a normal diode rectifier, the cut in voltage across the diode will result in reduction
of output voltage and inaccuracy of rectification. If ideal rectifier is needed in an
application,a precision rectifier as shown Fig. 1 may be used.
In the circuit, when the input is greater than zero, D1 will conduct and D2 is OFF, so the
output is zero because the other end of R2 is connected to the virtual ground and there is no
current through R2. When the input is less than zero, D2 is on, and D1 is off, and the output
is
R2
similar to that of an inverting amplifier with gain .
R1
The value of R1 and R2 are selected in such a way that the circuit has reasonable level of
input impedance and the gain is unity. Diode D1 and D2 are signal diodes.
PROCEDURE
1. Set up the circuit as shown in figure. Give a sine wave of ±5V peak magnitude
and 1 kHz frequency at the input and observe the input and output simultaneously on
CRO.
2. Put the CRO into X-Y mode and connect input signal to X and output signal to Y.
Select suitable volt per division in both channels and observe the characteristics. The
display should look similar to Fig 3.
R2
R1
THEORY:
AC and DC are two frequent terms that you encounter while studying the flow of electrical
charge. Alternating Current (AC) has the property to change its state continuously. For example, if we
consider a sine wave, the current flows in one direction for positive half cycle and in the opposite
directionfor negative half cycle. On the other hand, Direct Current (DC) flows only in one direction.
An electronic circuit, which produces either DC signal or a pulsated DC signal, when an AC signal is
applied to it is called as a rectifier.
A full wave rectifier produces positive half cycles at the output for both half cycles of the
input.The circuit diagram of a full wave rectifier is shown in the following figure –
The above circuit diagram consists of two op-amps, two diodes, D1 & D2 and five resistors, R1 to R5.
The working of the full wave rectifier circuit shown above is explained below −
For the positive half cycle of a sinusoidal input, the output of the first op-amp will be
negative.Hence, diodes D1 and D2 will be forward biased and reverse biased respectively.
the output of the first op-amp is connected to a resistor R4, which is connected to the inverting terminal
of the second op-amp. The voltage present at the non-inverting terminal of second op-amp is 0 V. So, the
second op-amp with resistors, R4 and R4 acts as an inverting amplifier.
Therefore, the output of a full wave rectifier will be a positive half cycle for the positive half cycle of
a sinusoidal input.
For the negative half cycle of a sinusoidal input, the output of the first op-amp will be
positive.Hence, diodes D1 and D2 will be reverse biased and forward biased respectively.
The output of the first op-amp is directly connected to the non-inverting terminal of the second op-
amp.Now, the second op-amp with resistors, R4 and R5 acts as a non-inverting amplifier.
The input and output waveforms of a full wave rectifier are shown in the following figure
CIRCUIT DIAGRAM:
R2 R4
R5
10k 10k
10k
0 0
V4
V2 12Vdc
12Vdc
D1
D1N4002
U2
U1
4
1 uA741
4
R1 2
V-
2 1uA741 - OS1
V-
- OS1
6
10k OUT
V 6
OUT 3 5
V+
V1 V
VOFF = 0 3 5 + OS2
VAMPL = 2 + OS2
FREQ = 1k
V3 V5
0 12Vdc D2 12Vdc
D1N4002
0
0
R3
10k
RESULT
A sinusoidally varying input signal with an amplitude of less than 1V is rectified with the help of a
precision rectifier.
VIVA QUESTIONS
1. What is a rectifier?
2. What is a precision rectifier?
3. What are the applications of precision rectifiers?
4. Draw the circuit diagram for half wave saturating precision rectifier?
5. What are the advantages of precision rectifiers over diode rectifiers?
6. What are the disadvantages of saturating precision rectifiers?
7. What are non-saturating precision rectifiers?
8. What are the steps to be followed in designing non-saturating precision rectfiers?
Aim: To design RC phase shift oscillator circuit using op-amps for a frequency of 200
Hz and hence to simulate using pspice.
Learning Objectives :
Apparatus Required :PC, Simulation package- Orcad family release 9.2 lite edition.
Theory :
The phase shift oscillator shown in fig 4.1. consists of an inverting amplifier and an RC phase shift
network. The RC network feeds a portion of the amplifier ac output back to the amplifier input. The
amplifier has an internal phase shift of -1800 and each pair of RC network designed to provide phase
shift of 600 summing upto +1800 , thus satisfying barkhausen criteria of phase shift 00.
The frequency of the oscillator output depends upon the capacitor and resistor values employed in the
feedback network. If three equal value resistors and three equal value capacitors are used the RC
circuit can be analyzed to show that the network phase shift is 1800 , when
𝑿𝑪 = 𝑹√𝟔
In addition to providing network phase shift, the RC network attenuates the amplifier output. Network
analysis shows that at the required 1800 phase shift, the RC network has an attenuation factor of 29.
This means the amplifier must have voltage gain of 29 for loop gain to be equal to 1.
If the amplifier gain is less than 29, circuit will not oscillate and when the gain is much higher than
29, oscillator output waveform will be distorted, thus design of resistor values in an amplifier circuit
must be in such a way that the ratio
𝑹𝒇 ⁄ 𝑹𝟏 = 𝟐𝟗
DESIGN :
Let C = 0.1 µF
𝑇ℎ𝑢𝑠, 𝑅𝐹 = 29 𝑅𝑖 = 29 ∗ 33 𝑘Ω = 957 𝑘Ω = 1 𝑀Ω
PROCEDURE:
1. Create a blank project.
2. Draw the circuit diagram by selecting the parts from parts menu (active
sources fromsource library and analog components and dependent sources
from analog library)
3. Select new simulation setting from the simulation tool option.
4. In the simulation setting window select Transient analysis.
5. Enter suitable value for run time of 20 ms and maximum step size 1 ms and skip initial
transients.
6. Run the simulation and verify the results.
Viva Questions: