Datasheet DMO565R
Datasheet DMO565R
Datasheet DMO565R
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FSDM0565RB
Green Mode Fairchild Power Switch (FPSTM)
Features
• Internal Avalanche Rugged Sense FET OUTPUT POWER TABLE
• Advanced Burst-Mode operation consumes under 1 W at 230VAC ±15%(3) 85-265VAC
240VAC & 0.5W load PRODUCT Adapt- Open Adapt- Open
• Precision Fixed Operating Frequency (66kHz) er(1) Frame(2) er(1) Frame(2)
• Internal Start-up Circuit FSDM0565RB 60W 70W 50W 60W
• Improved Pulse by Pulse Current Limiting
FSDM07652RB 70W 80W 60W 70W
• Over Voltage Protection (OVP)
• Over Load Protection (OLP) Table 1. Maximum Output Power
• Internal Thermal Shutdown Function (TSD) Notes:
• Auto-Restart Mode 1. Typical continuous power in a non-ventilated enclosed
• Under Voltage Lock Out (UVLO) with hysteresis adapter measured at 50°C ambient.
• Low Operating Current (2.5mA) 2. Maximum practical continuous power in an open frame
• Built-in Soft Start design at 50°C ambient.
3. 230 VAC or 100/115 VAC with doubler.
Application
• SMPS for LCD monitor and STB
• Adaptor
Typical Circuit
Description
The FSDM0565RB is an integrated Pulse Width Modulator
(PWM) and Sense FET specifically designed for high perfor- AC
mance offline Switch Mode Power Supplies (SMPS) with IN DC
OUT
minimal external components. This device is an integrated
high voltage power switching regulator which combine an
avalanche rugged Sense FET with a current mode PWM con- Vstr Drain
trol block. The PWM controller includes integrated fixed fre-
quency oscillator, under voltage lockout, leading edge blanking PWM
Rev.1.0.2
©2004 Fairchild Semiconductor Corporation
FSDM0565RB
N.C 5
Istart
0.5/0.7V + Internal
Vref
Bias
8V/12V Vcc good
-
Vcc Vref
OSC
Idelay IFB PWM
2.5R S Q
FB 4
Gate
R Q
driver
Soft start R
LEB
VSD
Vcc 2 GND
S Q
Vovp
Vcc good R Q VCL
TSD
2
FSDM0565RB
Pin Definitions
Pin Configuration
TO-220F-6L
6.Vstr
5.N.C.
4.Vfb
3.Vcc
2.GND
1.Drain
3
FSDM0565RB
Notes:
1. Repetitive rating: Pulse width limited by maximum junction temperature
2. L=14mH, starting Tj=25°C
3. L=13uH, starting Tj=25°C
Thermal Impedance
Notes:
1. Free standing with no heat-sink under natural convection.
2. Infinite cooling condition - Refer to the SEMI G30-88.
4
FSDM0565RB
Electrical Characteristics
(Ta = 25°C unless otherwise specified)
Static drain source on resistance (1) RDS(ON) VGS = 10V, ID = 2.5A - 1.76 2.2 Ω
PROTECTION SECTION
Peak current limit (4) IOVER VFB=5V, VCC=14V 2.0 2.25 2.5 A
5
FSDM0565RB
Notes:
1. Pulse test : Pulse width ≤ 300µS, duty ≤ 2%
2. These parameters, although guaranteed at the design, are not tested in mass production.
3. These parameters, although guaranteed, are tested in EDS(wafer test) process.
4. These parameters indicate the inductor current.
5. This parameter is the current flowing into the control IC.
6
FSDM0565RB
7
FSDM0565RB
1.2 1.2
1.0 1.0
0.8 0.8
(Vstart)
(Iop)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
Ju nc tion Tempe ratu re (℃) Ju nc tion Tempe ratu re (℃)
1.2 1.2
1.0 1.0
Stop Threshold Voltage
Operating Frequency
0.8 0.8
(Vstop)
(Fosc)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
Ju nc tion Tempe ratu re (℃) Ju nc tion Te mpe ratu re (℃)
1.2 1.2
1.0 1.0
Maximum Duty Cycle
FB Source Current
0.8 0.8
(Dmax)
(Ifb)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150
-25 0 25 50 75 100 125 150
Ju nc tion Tempe ratu re (℃)
Ju nc tion Tempe rature (℃)
8
FSDM0565RB
1.2 1.2
1.0 1.0
0.8 0.8
(Idelay)
(Vsd)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
Ju nc tion Te mpe ratu re (℃) Ju n c tion T e mpe ra tu re (℃)
ShutDown Feedback Voltage vs. Temp ShutDown Delay Current vs. Temp
1.2
1.2
FB Burst Mode Enable Voltage
1.0 1.0
Over Voltage Protection
0.8 0.8
(Vovp)
(Vfbe)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
Junction Temperature(℃) Junction Temperature(℃)
Over Voltage Protection vs. Temp Burst Mode Enable Voltage vs. Temp
1.2 1.2
FB Burst Mode Disable Voltage
1.0 1.0
0.8 0.8
(Vfbd)
(Iover)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125
Junction Temperature(℃) Ju nc tion Te mpe ratu re (℃)
Burst Mode Disable Voltage vs. Temp Current Limit vs. Temp
9
FSDM0565RB
1.2
1.0
(Normalized to 25℃)
0.8
Soft Start Time
0.6
0.4
0.2
0.0
-50 -25 0 25 50 75 100 125
Junction Temperature(℃)
10
FSDM0565RB
Functional Description
2.1 Pulse-by-pulse current limit: Because current mode
1. Startup : In previous generations of Fairchild Power control is employed, the peak current through the Sense FET
Switches (FPSTM) the Vcc pin had an external start-up is limited by the inverting input of PWM comparator (Vfb*)
resistor to the DC input voltage line. In this generation the as shown in Figure 5. Assuming that the 0.9mA current
startup resistor is replaced by an internal high voltage current source flows only through the internal resistor (2.5R +R= 2.8
source. At startup, an internal high voltage current source kΩ), the cathode voltage of diode D2 is about 2.5V. Since D1
supplies the internal bias and charges the external capacitor is blocked when the feedback voltage (Vfb) exceeds 2.5V,
(Cvcc) that is connected to the Vcc pin as illustrated in the maximum voltage of the cathode of D2 is clamped at this
Figure 4. When Vcc reaches 12V, the FSDM0565RB begins voltage, thus clamping Vfb*. Therefore, the peak value of
switching and the internal high voltage current source is the current through the Sense FET is limited.
disabled. Then, the FSDM0565RB continues its normal
switching operation and the power is supplied from the
auxiliary transformer winding unless Vcc goes below the
stop voltage of 8V. 2.2 Leading edge blanking (LEB) : At the instant the
internal Sense FET is turned on, there usually exists a high
current spike through the Sense FET, caused by primary-side
capacitance and secondary-side rectifier reverse recovery.
Excessive voltage across the Rsense resistor would lead to
VDC incorrect feedback operation in the current mode PWM
control. To counter this effect, the FSDM0565RB employs a
CVcc leading edge blanking (LEB) circuit. This circuit inhibits the
PWM comparator for a short time (TLEB) after the Sense
FET is turned on.
Vcc
Vstr
3 6
Vcc Vref
Istart Idelay IFB
Vo Vfb SenseFET
Vref 4 OSC
H11A817A D1 D2
8V/12V Vcc good CB 2.5R
+ Gate
Internal Vfb* R driver
Bias KA431 -
OLP Rsense
Figure 4. Internal startup circuit VSD
11
FSDM0565RB
Fault VFB
occurs Fault
Vds Power
removed Over load protection
on
6.0V
2.5V
Vcc
T 12= Cfb*(6.0-2.5)/Idelay
12V T1 T2 t
t
3.2 Over voltage Protection (OVP) : If the secondary side
Normal Fault Normal feedback circuit were to malfunction or a solder defect
operation situation operation
caused an open in the feedback path, the current through the
Figure 6. Auto restart operation opto-coupler transistor becomes almost zero. Then, Vfb
climbs up in a similar manner to the over load situation,
forcing the preset maximum current to be supplied to the
SMPS until the over load protection is activated. Because
3.1 Over Load Protection (OLP) : Overload is defined as more energy than required is provided to the output, the
the load current exceeding a pre-set level due to an output voltage may exceed the rated voltage before the over
unexpected event. In this situation, the protection circuit load protection is activated, resulting in the breakdown of the
should be activated in order to protect the SMPS. However, devices in the secondary side. In order to prevent this
even when the SMPS is in the normal operation, the over situation, an over voltage protection (OVP) circuit is
load protection circuit can be activated during the load employed. In general, Vcc is proportional to the output
transition. In order to avoid this undesired operation, the over voltage and the FSDM0565RB uses Vcc instead of directly
load protection circuit is designed to be activated after a monitoring the output voltage. If VCC exceeds 19V, an OVP
specified time to determine whether it is a transient situation circuit is activated resulting in the termination of the
or an overload situation. Because of the pulse-by-pulse switching operation. In order to avoid undesired activation of
current limit capability, the maximum peak current through OVP during normal operation, Vcc should be designed to be
the Sense FET is limited, and therefore the maximum input below 19V.
power is restricted with a given input voltage. If the output
consumes beyond this maximum power, the output voltage
(Vo) decreases below the set voltage. This reduces the
current through the opto-coupler LED, which also reduces 3.3 Thermal Shutdown (TSD) : The Sense FET and the
the opto-coupler transistor current, thus increasing the control IC are built in one package. This makes it easy for
feedback voltage (Vfb). If Vfb exceeds 2.5V, D1 is blocked the control IC to detect the heat generation from the Sense
and the 3.5uA current source starts to charge CB slowly up to FET. When the temperature exceeds approximately 150°C,
Vcc. In this condition, Vfb continues increasing until it the thermal shutdown is activated.
reaches 6V, when the switching operation is terminated as
shown in Figure 7. The delay time for shutdown is the time 4. Soft Start : The FSDM0565RB has an internal soft start
required to charge CB from 2.5V to 6.0V with 3.5uA. In circuit that increases PWM comparator inverting input
general, a 10 ~ 50 ms delay time is typical for most voltage together with the Sense FET current slowly after it
applications. starts up. The typical soft start time is 10msec, The pulse
width to the power switching device is progressively
increased to establish the correct working conditions for
transformers, inductors, and capacitors. The voltage on the
output capacitors is progressively increased with the
intention of smoothly establishing the required output
voltage. It also helps to prevent transformer saturation and
reduce the stress on the secondary diode during startup.
12
FSDM0565RB
Vo
Voset
VFB
0.7V
0.5V
Ids
Vds
time
Switching Switching
disabled disabled
T1 T2 T3 T4
13
FSDM0565RB
Features
• High efficiency (>81% at 85Vac input)
• Low zero load power consumption (<300mW at 240Vac input)
• Low standby mode power consumption (<800mW at 240Vac input and 0.3W load)
• Low component count
• Enhanced system reliability through various protection functions
• Internal soft-start (10ms)
1. Schematic
T1 D202 L201
EER3016 MBRF10100
12V, 2.5A
10
1 C201 C202
1000uF 1000uF
C104 25V 25V
R103 2 8
Ω
56kΩ 10nF
R102 1kV
Ω
30kΩ 2W D101
C103
100uF UF 4007
3
400V
BD101 2 R105
2KBP06M3N257 Ω
40kΩ
FSDM0565RB
6
1 3 Vstr 1
Drain
5
NC D201 L202
MBRF1045
Vcc 3 5V, 2A
4 Vfb 4 7
4
GND C105 D102 R104 C203 C204
C102 C106 22uF TVR10G Ω
5Ω 1000uF
2 ZD101 1000uF
220nF 47nF
22V 50V 10V 10V
275VAC 50V
6
5
C301
LF101 4.7nF
23mH
R201
Ω
1kΩ
R101 R204
Ω
560kΩ Ω
5.6kΩ
1W R202
R203 C205
Ω
1.2kΩ Ω
1.2kΩ 47nF
IC301
H11A817A
F1 IC201
RT1 C101 KA431
220nF FUSE
5D-9 R205
275VAC 250V Ω
5.6kΩ
2A
14
FSDM0565RB
EER3016
1 10
Np/2 N12V
2 9
Np/2
3 8
4 7 N
5V
Na 5 6
3.Winding Specification
4.Electrical Characteristics
15
FSDM0565RB
16
FSDM0565RB
7. Layout
17
FSDM0565RB
Package Dimensions
TO-220F-6L(Forming)
18
FSDM0565RB
Ordering Information
Product Number Package Marking Code BVdss Rds(on)Max.
FSDM0565RBWDTU TO-220F-6L(Forming) DM0565R 650V 2.2 Ω
WDTU : Forming Type
19
FSDM0565RB
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
www.fairchildsemi.com
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Rev. I11