Received 28 September 2022; revised 17 November 2022; accepted 26 November 2022.

Date of publication 5 December 2022;

date of current version 11 January 2023. The review of this article was arranged by Associate Editor Liangzong He.
Digital Object Identifier 10.1109/OJPEL.2022.3226740

Characterization and Modeling of Ceramic

Capacitor Losses Under Large Signal
Operating Conditions
SAMANTHA CODAY (Graduate Student Member, IEEE),
AND ROBERT C. N. PILAWA-PODGURSKI (Senior Member, IEEE)
Department of Electrical Engineering, Computer Sciences, University of California, Berkeley, CA 94720 USA
CORRESPONDING AUTHOR: ROBERT C. N. PILAWA-PODGURSKI (e-mail: pilawa@berkeley.edu)
This work was supported in part by the NASA Fixed Wing Research Program through the NASA Cooperative Agreement NNX14AL79 A and in part by the
U.S. Department of Energy through the Electric Drive Technologies Consortium. An earlier version of this paper was presented in part at the 2018 IEEE Workshop
on Control and Modeling for Power Electronics (COMPEL) [DOI: 10.1109/APEC.2018.8340997] and 2020 IEEE Applied Power Electronics Conference and
Exposition (APEC) [DOI: 10.1109/COMPEL.2013.6626415].

ABSTRACT Recent work on hybrid switched-capacitor converters has demonstrated exceptionally high
efficiencies and power densities through the use of multilayer ceramic capacitors (MLCCs). However, when
used in such converters as the main energy transfer components, the capacitors experience high voltage
and current ripple often under large dc voltage bias. Yet, capacitor characterization is typically done only
with small signal excitation, and under low or no dc bias, yielding highly inaccurate loss models. This
work presents a technique for obtaining detailed loss characterizations of MLCCs under more realistic
operating conditions through a carefully designed calorimetric setup. Experimental results from several types
of MLCCs are presented over a wide range of operating conditions. Finally, a linear model is presented to
accurately estimate MLCC losses.

INDEX TERMS Ceramic capacitors, calorimetry, hybrid switched capacitor converters, loss measurement,
loss model.

I. INTRODUCTION behavior. To fully capitalize on the potential benefits of ML-

Recent work has shown the advantages of using multi- CCs, it is important to understand and model their energy
layer ceramic capacitors (MLCCs) as the primary energy storage and loss characteristics. Past work [11], [12] has
storage/transfer device in hybrid [1] and resonant switched- characterized MLCCs under low-frequency (i.e., 50–60 Hz)
capacitor converters [2], [3], [4], [5], [6]. Reference [7] sinusoidal excitation. Further work in [13], [14] introduced a
provides general analytical methods for capturing the passive model for a capacitor’s large-signal losses, when operating at
component volume and power transfer in resonant hybrid sub-kilohertz frequencies. However, little work has been done
switched-capacitor converters, which are helpful to select the to characterize and model MLCC losses for high frequency
most appropriate circuit topologies, but the analysis does not and non-sinusoidal excitation. This work, which extends pre-
include loss models of the capacitors. Moreover, as shown vious conference papers [15], [16] includes additional high
analytically in [8], and empirically in [9], flying capacitor frequency measurements, error analysis and comparisons to
multi-level converters [10] can achieve significantly higher low frequency experimental results.
power density than conventional, two-level designs. A simple and commonly used MLCC model contains an
MLCCs are energy-dense and allow for the efficient trans- ideal capacitor, parasitic inductance, and termination and
fer of energy; however, the performance of these devices leakage resistance. These two resistances can be effectively
is dependent upon a number of operating conditions, mak- combined to equal one equivalent series resistance (ESR) as
ing it challenging to accurately capture and model their shown in Fig. 1.

This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License. For more information, see https://creativecommons.org/licenses/by-nc-nd/4.0/
24 VOLUME 4, 2023
FIGURE 1. Standard capacitor model simplified [17].

FIGURE 3. Percent change in capacitance over rated dc voltage. From

Table 3 Cap. E (Class I) has invariant capacitance with dc voltage bias,
Cap. A (Class II) de-rates with bias, and Cap. D (Ceralink) has increased
capacitance with increased bias.

FIGURE 2. Plot of manufacturer-provided ESR of three Class II MLCCs,

listed in Table 3 over a range of frequencies, at 0 V bias small signal
excitation (0.1 Vrms ) [18] [19] [20].

Furthermore, the losses associated with MLCC operation

can then be expressed as shown in (1).

Ploss = Irms
2
RE SR (1)

Typical device data sheets only provide ESR values for

small signal sinusoidal excitation at zero or near-zero voltage
bias as a function of frequency. Examples of characterizations FIGURE 4. Model of MLCC, highlighting the internal structure of
provided by datasheets are shown in Fig. 2. As highlighted interwoven metallic plates and dielectric material resulting in
energy-dense capacitors.
through the experimental measurements of this work, small
signal loss characterization only captures a small part of the
overall losses associated with MLCCs under typical operating in changes in the capacitance and ESR of the capacitors [21].
conditions. Thus, models based on only small signal charac- The dipole realignment in Class II dielectrics is affected
terization can yield highly inaccurate loss estimations. The by four main operating conditions: frequency, temperature,
lack of accurate loss models from the device manufacturers dc bias and ac amplitude. Class I devices are stable over
motivate this work, which aims to investigate and characterize temperature and bias. This work focuses on understanding
how MLCC’s parameters change with operating condition. the behavior of commonly used Class II capacitors, while
Moreover, it is our hope that the detailed measurement re- comparing to more stable Class I parameters.
sults and analysis will be useful to practicing engineers and In addition to Class I and II MLCCs, this work also inves-
researchers that are working on capacitor-based power con- tigates Ceralink MLCCs [22] which are composed of a PLZT,
verters. lead-lanthanum-zirconate-titanate, dielectric. This dielectric
The MLCCs achieve high energy density due to the high is anti-ferroelectric, indicating that as the dc voltage increases
number of internal layers, as shown in Fig. 4. Class I MLCC the capacitance also increases. This anti-ferroelectric behavior
dielectrics are composed of paraelectric materials which are is attractive in hybrid switched-capacitor topologies where
stable over temperature and voltage bias. The dielectrics high capacitance is often desired under high dc bias. The
of Class II MLCCs are composed of ferroelectric materials relative change in capacitance over dc bias voltage is shown
which allow for extremely dense energy storage, due to in Fig. 3.
their high permittivity; however, these ferroelectric materials Shown in Fig. 5 is the result of a survey of commercially
exhibit changes in permittivity due to realignment of electric available Class I, Class II and Ceralink ceramic capaci-
dipoles within the material. Therefore, while Class I MLCCs tors [23], which illustrates energy density as a function of
have lower energy density than Class II MLCCs, the change in blocking voltage for the two technologies. Here, energy den-
Class II MLCC’s permittivity with operating condition results sity is defined as the maximum energy that can be stored on

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CODAY AND PILAWA-PODGURSKI: CHARACTERIZATION AND MODELING OF CERAMIC CAPACITOR LOSSES UNDER LSOC

FIGURE 5. Comparison of volumetric energy density of commercially

available multilayer ceramic capacitors. Energy densisty metric includes
derating for Class II and Ceralink capacitors.

TABLE 1 Survey of State-of-Art FCML Converters

FIGURE 6. Generic N-level FCML boost converter (a) schematic, with (b)
voltage and (c) current waveforms for a flying capacitor. These waveforms
highlight the non-sinusoidal large signal excitations of the MLCC within
the circuit.

the capacitor (1/2 CV2rated ). For this survey, the energy density voltage, power and derating characteristics. Moreover, each
of Class II MLCCs is calculated using an approximate derat- converter in Table 1 utilizes the same flying capacitor [24] due
ing of 60% at rated voltage. As can be seen, at voltages below to its high energy density. From this survey, it can be observed
1.5 kV, Class II dielectric offers significantly higher energy that the operating frequencies and capacitor voltage ripple
densities, whereas Class I are more favorable at higher volt- varies in real application, and is in all cases quite different
ages. The Ceralink capacitors have similar volumetric energy from that of the datasheet ESR measurement conditions.
densities as Class II MLCCs, however; are only commercially The remainder of the paper is organized as follows: Section
available for limited voltage ratings. II discusses the design of the calorimetric method. Section III
Typical device data sheets only provide ESR values for discusses the results and analyzes trends of the calorimetric
small-signal sinusoidal excitation at zero or near-zero voltage tests. Section IV compares the calorimetric results to low
bias as a function of frequency. However, in many converters frequency electrical measurements. Section V introduces a
these capacitors experience high dc bias voltage and large rip- linear model that accurately models Class II MLCC losses.
ple ac current. One example is the flying capacitor multilevel Section VI concludes the paper.
converter (FCML) [10] as shown in Fig. 6(a). In the FCML
converter there are N − 2 flying capacitors which have dc bias II. CHARACTERIZATION METHODOLOGY
voltages equal to k · Vout /(N − 1), where N is equal to the The combination of high voltage, current and frequency yields
number of levels and k is the index of the flying capacitor. too low of accuracy if traditional electrical loss measure-
Example waveforms for an FCML converter operating above ments are employed to attempt to capture capacitor loss.
resonance with phase-shifted pulse-width modulation (PWM) To illustrate these constraints, it is helpful to consider the
control is shown in Fig. 6(b)–(c). These waveforms highlight measurement resolution which can be achieved using a high
the non-sinusoidal nature of the current and voltage excita- resolution instrument, such as the WT3000 Yokogawa power
tions on the capacitors. analyzer [29]. Considering the conditions for a set of flying ca-
To further illustrate the operation of MLCCs in FCML pacitors described in the hybrid switched-capacitor converter
converters, a survey of state-of-art converters was performed, design in [30], where the MLCC has a voltage bias of 450 V dc
and the details of the flying capacitors within each converter and the current excitation of 3 A RMS, the range of measured
is shown in Table 1. The maximum dc bias voltage and instantaneous power transferred would be approximately one
maximum capacitor ripple are approximated based on peak kilowatt. However, the expected measurement of power loss

26 VOLUME 4, 2023
FIGURE 7. (a) Ideal circuit which allows for varying dc bias voltage, and varying ac current amplitude with an ideal current source and h-bridge. (b)
Electrical excitation circuit used to replicate hybrid switched-capacitor operation with adjustable frequency, dc bias and ac amplitude. Portions of the
electrical excitation are placed within the temperature chamber to decrease the inductance in the path to the DUT. (c) Example capacitor excitations
created by the electrical excitation circuit.

for typical values of capacitor ESR would be less than 10 W. TABLE 2 Components Used in Electrical Excitation Circuit and Calorimetric
Setup
Given the accuracy of the power analyzer at frequencies in the
hundreds of kHz, an uncertainty on the order of ±10.2 W can
be expected. While ac coupled voltage measurements can help
reduce the absolute accuracy requirements, electrical mea-
surements remain challenging, owing to the wide frequency
range and need for high precision.
Thus, in this work, a calorimetric study is performed
to characterize the losses of the MLCCs. Further analysis
comparing the accuracy of different measurement techniques
can be found in [31]. A custom circuit is designed which
applies an excitation representative of flying capacitor opera-
tion in hybrid switched capacitors converters and allows for
adjustable dc bias voltage, ac current amplitude and vary-
ing frequency. An ideal version of this circuit is shown in
Fig. 7(a), where a voltage source Vbias controls the dc bias
voltage and an ideal current source, shown as Iideal , con-
trols the amplitude of the current excitation. The current
source is then converted into a square-waveform using an which would change the shape of the excitation waveform.
H-bridge which can be controlled to vary the frequency of Furthermore, the DUT is attached to the PCB using copper
the excitation. For practical implementation, the circuit shown strips to decrease the parasitic inductance. The temperature
in Fig. 7(b) approximates the operation of the ideal circuit rise of the oil is used to calculate the power dissipation of
closely. The dc bias is adjusted through Vbias which is con- the DUT [33]. Resistive temperature devices (RTDs) [32]
nected to a large capacitance (100× the capacitance of the are chosen for this study due to their improved accuracy for
DUT) allowing a stiff dc bias while still allowing the voltage temperature measurements over a small temperature range as
ripple of the DUT. The ac current amplitude of the DUT opposed to thermo-couples. The temperature of the oil and
excitation is varied by adjusting the current limit of the Vbridge chamber are both measured every five seconds using a Fluke
supply, which operates in constant current mode and is placed Hydra DAC controlled through custom LabVIEW and MAT-
in series with a large inductor, approximating the ideal con- LAB software. To provide even heat distribution within the oil
stant current source. Finally, the frequency of the excitation bath, the beaker is stirred using a magnetic stirring apparatus.
can be easily adjusted by a micro-controller which can change A listing of the instrumentation used in the calorimetric setup
the frequency of the gate drive signals to the H-bridge. The is provided in Table 2, and the setup is shown in Fig. 8.
ability to easily adjust frequency, ac amplitude and dc bias Equation (2) relates the temperature rise of the oil bath and
allows several operating conditions of interest to be studied the power dissipated by the DUT [33].
using the same setup and PCB. The electrical components  τ
1 Toil − Tamb
used in the electrical excitation circuit can be seen in Table 2. Pdiss = [koil Toil + dt] (2)
In this calorimetric setup, the DUT is placed in an oil τ 0 RT H
bath directly under the PCB. Careful consideration of DUT Here τ is the time for which the temperature is observed and
placement is necessary as to not add parasitic inductance T is the temperature measured. The oil bath is characterized

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CODAY AND PILAWA-PODGURSKI: CHARACTERIZATION AND MODELING OF CERAMIC CAPACITOR LOSSES UNDER LSOC

FIGURE 8. (a) Equipment setup developed to generate electrical excitation, as well as log temperature data. (b) The electrical excitation circuit board and
other calorimetric components located within the temperature-controlled chamber.

J
by koil which is the product of the specific heat ( g·K ), den-
g
sity ( cm3 ) and volume of oil used (mL). The parameter koil
determines how quickly the temperature of the oil rises as
convection occurs between the oil and DUT. Parameter RT H
K
(W ) is the thermal impedance between the oil and the ambient
environment and can be determined experimentally with a
calibration procedure.

A. CALIBRATION OF SETUP
The thermal impedance of the setup, RT H , is determined over
a series of calibration tests. During calibration, the DUT is re-
placed with a high-precision, 3.1 m resistor, whose value is
chosen to dissipate approximately the same amount of power
as expected by the MLCCs under test. Several calibration
tests are performed at dc operating conditions to increase the
accuracy of the electrically measured power dissipation. The
FIGURE 9. Calibration test results, showing temperature measured over
current and voltage of the DUT is measured through Kelvin
eight hours of testing to ensure thermal equilibrium.
sensing to accurately determine the power dissipation. The
calibration is run in the calorimetric test chamber multiple
times, with power levels comparable to those used during ca-
pacitor testing. In each calibration test, the temperature of the due to building heating and cooling schedules. At the begin-
oil is allowed to reach steady-state, as shown in the example ning of each test the chamber is turned on and allowed to
of recorded oil temperatures during a calibration test in Fig. 9. reach thermal equilibrium. Once the inside temperature of the
chamber is stable the dc bias and ac excitation are applied
to the DUT. The temperature of the thermistor is collected
B. CALORIMETRIC TESTING PROCEDURE every five seconds, and each calorimetric test is performed
For each calorimetric test, the circuit is assembled and placed for approximately one hour to ensure that sufficient data is
inside the temperature chamber. Three RTDs are placed in- collected to extract a high confidence measurement. Addi-
side the temperature chamber and three inside the beaker of tional time is allowed between each test to allow the system to
oil, after which the temperature chamber is sealed and set return to the ambient temperature. After the test is complete
to a constant twenty-three degrees Celsius. This temperature the temperature data is used to calculate the power dissipated
is chosen to match the ambient temperature of the lab and by the DUT, using (2). Then the effective ESR is calculated
the temperature chamber is used to eliminate variations in by dividing the power by the squared RMS current. For each
ambient temperature which occur over the course of the day measured capacitor, this process repeats for five dc voltage

28 VOLUME 4, 2023
TABLE 3 Experimentally Evaluated Capacitors

bias points: [0 V, 100 V, 200 V, 300 V, 400 V], and for a B. EFFECT OF DC BIAS ON CLASS II MLCCS
span of fundamental switching frequencies. The dc voltage The impact of dc voltage bias on the MLCC losses is in-
bias points are chosen to span the voltage rating of the low- vestigated by keeping the current amplitude constant at 6 A
est rated capacitor and the switching frequencies are chosen peak-to-peak, and then varying the dc voltage of the capaci-
to represent typical operation of a hybrid switched-capacitor tor. For each capacitor, three to five different frequencies are
converter. evaluated at five different voltage biases, to understand the
relationship between the frequency and dc voltage effect on
losses. Note, for each capacitor the different frequencies tested
III. CALORIMETRIC RESULTS are chosen to avoid the capacitor’s self-resonance frequency.
Table 3 provides details of the five different MLCCs evaluated The measured power loss is then used to calculate a corre-
in this study. Three Class II MLCCs are chosen due to their sponding ESR using (2). The results of the calorimetric testing
high energy density: one with X6S and two with X7R temper- for the three Class II MLCCs can be seen in Fig. 10(a)–(c).
ature characteristics. A Ceralink (PLZT) MLCC is selected These results show a linear relationship between the dc
for its high energy density at rated voltage, and for evaluation bias and ESR over a wide range of frequencies. However,
of the anti-ferroelectric dieletric compared to the ferroelectric between different capacitors and measured frequencies the
dielectric of Class II capacitors. Lastly, a Class I MLCC is rate of increase of ESR with dc bias varies. The observed rela-
selected as the losses are predictably stable over voltage bias, tionship between ESR and frequency is non-linear. Since the
due to their stable paraelectric dielectric. The Class I MLCC excitation is a square-waveform the impact of the subsequent
thus also serves as a good control capacitor. high-order odd harmonics impact the ESR. In particular, as the
It is important to note that the results of this study are higher-order harmonics exceed the capacitor’s self-resonance
not intended to show a direct comparison of performance frequency the losses increase substantially.
between capacitors. As can be seen in Table 3, the MLCCs
tested have varying temperature characteristics, voltage rating
C. EFFECT OF DC BIAS ON NON-CLASS II MLCCS
and capacitance, and therefore would be suitable for different
Cap. D is evaluated to determine if the observed ESR and
applications. They are deliberately chosen for this study to
bias relationship is similar for PLZT dielectrics. Fig. 10(d)
capture experimental measurements across a wide range of
shows the impact of dc bias on ESR for Cap. D. The rela-
devices.
tionship is approximately linear, displaying the same trend
at each measured frequency. This result aligns well with
A. MEASUREMENT ACCURACY previously published results for low-frequency, sinusoidal ex-
For all data shown in the following sections, error bars indi- citation [11]. However, while previous work [11] identified
cate the accuracy of each measurement. The error analysis is the losses of the PLZT dielectrics to be much greater than
performed with consideration of the accuracy of RTDs and Class II MLCCs operating at twice-line frequencies, these
the calibration method. The effect of temperature on ESR results show similar ESR to that of Class II MLCCs with
is another accuracy concern, especially as the current ampli- similar voltage ratings. Therefore, this motivates the use of
tude is varied between different tests; therefore increasing the these devices in higher frequency applications.
expected temperature rise. Often, MLCC datasheets list the Moreover, Class I MLCCs are investigated to determine
relationship between temperature and ESR [24]. While the if the similar increase in ESR with dc bias is observed. The
ESR is shown to vary widely for temperatures less than zero measured results for Cap. E from Table 3 as seen in Fig. 10(e)
degrees Celsius, or greater than fifty degrees Celsius, the ESR show that the Class I MLCC does not have the same increase
is relatively stable around twenty-three degrees Celsius which in ESR when the dc bias is increased. Due to their stability
is the ambient temperature of the thermal chamber for all tests. over operating conditions, the Class I MLCCs can be simply
Specifically the ESR variance for Cap. A is only ±2% even modeled by the zero-bias small-signal ESR from datasheets.
with ± 10 ◦ C. In this work the maximum temperature ob-
served on the DUT is 30 ◦ C, which results in a maximum ESR D. EFFECT OF AC AMPLITUDE ON CLASS II MLCCS
deviation of 1.5%. Therefore the effect of device temperature Further calorimetric tests are performed to study the effect of
on the measurement is not considered in this work. ac current amplitude on losses. It is found that as the current

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CODAY AND PILAWA-PODGURSKI: CHARACTERIZATION AND MODELING OF CERAMIC CAPACITOR LOSSES UNDER LSOC

FIGURE 10. The relationship between dc voltage bias and calorimetrically measured ESR for (a) Cap. A, (b) Cap. B, (c) Cap. C, (d) Cap. D, and (e) Cap. E
from Table 3. The black star represents the small signal ESR from the data sheet [24]. As expected, compared to Class II dielectric capacitors which exhibit
increased ESR with voltage bias, the ESR of this Class I (C0G) capacitor remains relatively invariant to voltage bias.

FIGURE 11. The relationship between ac current amplitude and FIGURE 12. Low frequency electrical measurement capacitor testing
calorimetrically measured with zero volts dc bias for Cap. A from Table 3. circuit.
The y-axis scale is purposefully set to the same scale as Fig. 10(a) to show
that the dc voltage bias has a much larger affect on losses compared to
the effect of ac current amplitude.
at low frequency using electrical measurements. As discussed
in Section II, an electrical evaluation is not employed for the
amplitude changes the ESR stays relatively constant, as shown high frequency loss measurements in this work due to the
in Fig. 11. This relationship is confirmed over a variety of dc measurement accuracy requirements. However, at a lower fre-
voltage biases. quency the simpler electrical characterizations have sufficient
accuracy for comparison and validation.
IV. COMPARISON TO LOW FREQUENCY ELECTRICAL In [12] a methodology for testing capacitors in buffering ap-
MEASUREMENTS plications was introduced. This same setup, shown in Fig. 12,
To further validate the calorimetrically calculated losses and is implemented to test the capacitors over a range of sinu-
ESR, the results are compared to capacitor losses measured soidal frequency excitations, 120 Hz to 500 Hz. The necessary

30 VOLUME 4, 2023
TABLE 4 Devices Used in Low Frequency Electrical Setup where capacitor current ac magnitude varies, no appreciable
change in ESR is observed.
Due to the non-linear nature of the capacitor losses, and
the fact that square-wave excitation (with many harmonics) is
employed in this work, the dependence of ESR on frequency
yields highly non-linear results. It is the hope of the authors
that the preliminary results obtained in this work will stimu-
late further efforts to develop accurate, yet simple, loss models
for ceramic capacitors under realistic large signal conditions.

A. CONSTANT ESR APPROXIMATION

The simplest and most commonly used model for ESR
can be found directly from most manufacturer’s datasheets.
Fig. 2 shows the frequency and ESR relationship from three
datasheets, for Cap. A, B, & C of this work. Since man-
ufacturer’s datasheet provide no information regarding the
relationship between dc bias and ESR, a reasonable assump-
tion by a power electronics designer is thus that this ESR
remains constant across all operating dc voltage biases.
While simple, this method provides high error when used
at high dc voltage operating conditions. For this work, the
excitation frequency varied from 75 kHz to 500 kHz range.
For this region of interest the small signal ESR provided by the
manufacturer is non-linear, as shown in Fig. 2. Moreover, this
FIGURE 13. Low frequency bias dependent ESR results, for Cap A in
only showcases the small signal losses for the fundamental
Table 3, attained through electrical experimental setup. frequency, since the excitation of interest is a square wave-
form, there are higher-order harmonics present which will
affect the overall losses.
equipment for this setup can be seen in Table 4. Using the B. LINEAR MODEL
Yokogawa WT3000 power analyzer, the power dissipated by
A simple model can be leveraged from the linear relationship
the DUT is measured and the ESR is computed by dividing by
between dc voltage bias and ESR and is empirically described
the square of the RMS current. Finally, the dc bias is adjusted
by (3).
by changing Vdc .
The results for low frequency measurements for Cap. A V
RE SR (V ) = R0 + k (3)
in Table 3 are summarized in Fig. 13. These results verify Vmax
that even at a low frequency, the ESR generally increases Here, R0 is the ESR at zero voltage bias, and Vmax is the
with applied dc voltage bias. Also, as the frequency is dou- maximum rated dc voltage of the capacitor. The slope of the
bled from 250 Hz to 500 Hz, the ESR is approximately line, parameter k, can be determined by testing two dc voltage
halved. This trend matches the small-signal ESR data in Fig. 2 biases. Moreover for simplicity, one point at zero bias can
where at low frequencies the ESR decreases approximately be approximated from a small-signal ESR measurement or a
linearly with frequency. Additionally, at zero-bias the mea- datasheet, therefore only one additional measured data point
sured ESR at low frequencies is significantly higher than the is necessary to determine the coefficient for the linear model.
high frequency calorimetric measurements which matches the
expected trends in the small-signal ESR data of Fig. 2. C. MODEL COMPARISON
Fig. 14 shows the proposed model for Cap A, at 125 kHz.
V. CAPACITOR LOSS MODEL FROM MEASURED AND Fig. 15 shows the relationship between the error of each model
DATASHEET VALUES and the dc voltage bias for the same data as shown in Fig. 14.
As calorimetric loss measurements are cumbersome and time- Fig. 15 highlights that the constant ESR model underestimates
consuming, it is highly desirable to obtain simple, yet accurate losses at higher voltages by as much as 60% in these cases.
loss models that can be obtained from datasheet parameters. The linear model matches the data more closely, but would
Thus, to aid practicing engineers in capacitor loss estimation, require designers to collect one additional calorimetrically
we present an ESR model linearly related to dc bias voltage measured data point in addition to values found on datasheets.
with increased accuracy over a zero-bias small-signal approx- The model error for Cap. A, B, & C is shown in Fig. 15.
imation. The proposed model takes into account the dominant Finally, if more data points are measured, a better higher-order
influences on loss—dc voltage bias and frequency. In the tests fit can be obtained, at the cost of additional experimental

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and modeling of ceramic capacitor losses under large signal operating
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VI. CONCLUSION ripple operation,” in Proc. IEEE Appl. Power Electron. Conf. Expo.,
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This work has provided a method for accurately characteriz- [17] P. T. Krein, Elements of Power Electronics. London, U.K.: Oxford Univ.
ing the losses of MLCCs used in hybrid switched-capacitor Press, 1998.
power converters. A calorimetric method for accurately de- [18] Kemet. K-SIM engineering center. Kemet.
[19] Knowles, “AEC-Q200 automotive grade capacitors,” Datasheet, 2017.
termining the ESR over a range of operating conditions has [20] TDK Corporation. SEAT (Selection Assistant of TDK Components).
been presented. The results of this calorimetric study are dis- TDK Corporation.
cussed, with an analysis of the relationship between losses and [21] C. England, Ceramic Capacitor Aging Made Simple. Sylmar, CA: Jo-
hanson Dielectrics Inc., 2012.
dc voltage bias, ac current amplitude and frequency. These [22] TDK, “Capacitors for fast-switching semiconductors, low profile se-
results can be applied in the future when designing hybrid ries,” Datasheet, Jan. 2019.
switched capacitor power converters to better understand ca- [23] J. Zou, N. Brooks, S. Coday, N. Ellis, and R. C. N. Pilawa-Podgurski,
“On the size and weight of passive components: Scaling trends for high
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mitigate these losses. Model. Power Electron., 2022, pp. 1–7.

32 VOLUME 4, 2023
[24] TDK, “C series commercial grade mid voltage (100 V to 630 V),” ROBERT C. N. PILAWA-PODGURSKI (Senior
Datasheet, Mar. 2015. Member, IEEE) was born in Hedemora, Swe-
[25] S. Coday, N. Ellis, Z. Liao, and R. C. N. Pilawa-Podgurski, “A 10- den. He is currently an Associate Professor with
level GaN-based flying capacitor multilevel boost converter for hybrid the Electrical Engineering and Computer Sciences
electric aircraft applications,” in Proc. IEEE Energy Convers. Congr. Department, University of California, Berkeley,
Expo., 2021, pp. 2798–2803. Berkeley, CA, USA. He was an Associate Pro-
[26] J. A. Anderson, G. Zulauf, P. Papamanolis, S. Hobi, S. Mirić, and J. W. fessor with Electrical and Computer Engineering,
Kolar, “Three levels are not enough: Scaling laws for multilevel con- University of Illinois Urbana-Champaign, Cham-
verters in AC/DC applications,” IEEE Trans. Power Electron., vol. 36, paign, IL, USA. He received the B.S., M.Eng., and
no. 4, pp. 3967–3986, Apr. 2021. Ph.D. degrees from the Massachusetts Institute of
[27] T. Modeer, C. B. Barth, N. Pallo, W. H. Chung, T. Foulkes, and R. C. Technology, Cambridge, MA, USA, in 2005, 2007,
N. Pilawa-Podgurski, “Design of a GaN-based, 9-level flying capacitor and 2012, respectively. He performs research in the area of power electronics,
multilevel inverter with low inductance layout,” in Proc. IEEE Appl. and enjoys mountain biking. His research interests include renewable energy
Power Electron. Conf. Expo., 2017, pp. 2582–2589. applications, electric vehicles, CMOS power management, high density and
[28] A. Stillwell and R. C. N. Pilawa-Podgurski, “A five-level flying ca- high efficiency power converters, datacenter power delivery, and advanced
pacitor multilevel converter with integrated auxiliary power supply and control of power converters. He was the Student Activities Chair for IEEE
start-up,” IEEE Trans. Power Electron., vol. 34, no. 3, pp. 2900–2913, Energy Conversion Congress and Exposition 2016 and 2017, and as the
Mar. 2019. Technical Co-Chair for the fourth IEEE Workshop on Wide Bandgap Power
[29] Y. O. K. Yokogawa, WT3000 Precision Power Analyzer. Devices and Applications, 2016. Since 2014, he has been the PELS Technical
[30] N. Pallo, T. Foulkes, T. Modeer, S. Coday, and R. Pilawa-Podgurski, Committee 6’Emerging Power Electronics Technologies as Awards Chair,
“Power-dense multilevel inverter module using interleaved GaN-based Secretary, Vice Chair, and is currently the Chair. From 2016 to 2019, he
phases for electric aircraft propulsion,” in Proc. IEEE Appl. Power was the Chair of PELS Technical Committee 2’Power Conversion Systems
Electron. Conf. Expo., 2018, pp. 1656–1661. and Components. From 2014 to 2019, he was an Associate Editor for IEEE
[31] S. Coday, “Characterization and modeling of ceramic capacitor losses TRANSACTIONS ON POWER ELECTRONICS, and for IEEE JOURNAL OF EMERG-
in high density power converters,” Master’s thesis, EECS Department, ING AND SELECTED TOPICS IN POWER ELECTRONICS. Since 2018, he has been
University of California, Berkeley, CA, USA, May 2019. [Online]. a Member of the ISSCC Power Management Committee. He was the recipient
Available: http://www2.eecs.berkeley.edu/Pubs/TechRpts/2019/EECS- of the Chorafas Award for outstanding MIT EECS Master’s thesis, the Google
2019-34.html Faculty Research Award in 2013, and the 2014 Richard M. Bass Outstanding
[32] T. Connectivity, “PTF- family platinum temperature sensors,” Young Power Electronics Engineer Award of the IEEE Power Electronics
Datasheet, 2017. Society, given annually to one individual for outstanding contributions to the
[33] G. S. Dimitrakakis, E. C. Tatakis, and A. C. Nanakos, “A simple field of power electronics before the age of 35. He also was the recipient of
calorimetric setup for the accurate measurement of losses in power the Air Force Office of Scientific Research Young Investigator Award in 2015,
electronic converters,” in Proc. 14th Eur. Conf. Power Electron. Appl., UIUC Dean’s Award for Excellence in Research in 2016, UIUC Campus
2011, pp. 1–9. Distinguished Promotion Award in 2017, UIUC ECE Ronald W. Pratt Faculty
[34] Kemet, “KPS L series, high voltage, SnPb termination, X7R dielectric, Outstanding Teaching Award in 2017, IEEE Education Society Mac E. Van
500–630 VDC (commercial grade),” Datasheet, Jan. 2017. Valkenburg Award in 2018 given for outstanding contributions to teaching
unusually early in ones career. He is co-author of twelve IEEE prize papers.
SAMANTHA CODAY (Graduate Student Member,
IEEE) received the B.S. degree in electrical engi-
neering and mathematics from Southern Methodist
University, Dallas, TX, USA, in 2017, and the
M.S. degree in electrical engineering and com-
puter sciences in 2019 from the University of
California, Berkeley, Berkeley, CA, USA, where
she is currently working toward the Ph.D. degree
in electrical engineering. Her research interests in-
clude hybrid switched-capacitor circuits focusing
on the design and implementation of converters
in harsh aerospace environments. She was the recipient of the Outstanding
Graduate Student Instructor Award at University of California, Berkeley, the
Cadence Women in Technology Scholarship and the ThinkSwiss Research
Scholarship.

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