STB42N65M5, STF42N65M5, STI42N65M5

STP42N65M5, STW42N65M5
Datasheet

N-channel 650 V, 70 mΩ typ., 33 A, MDmesh M5 Power MOSFETs in D²PAK,

TO-220FP, I²PAK, TO-220 and TO-247 packages

TAB
Features
Order codes VDS @ TJmax RDS(on) max. ID Package
3
3
2
1
1
2 STB42N65M5 D²PAK
D PAK
TO-220FP
TAB STF42N65M5 TO-220FP
STI42N65M5 710 V 79 mΩ 33 A I²PAK

3
STP42N65M5 TO-220
I2PAK 12
TAB
STW42N65M5 TO-247

• Extremely low RDS(on)

• Low gate charge and input capacitance
3
1
2 2
3 • Excellent switching performance
1
TO-220 TO-247 • 100% avalanche tested

D(2, TAB)
Applications
• Switching applications

G(1)
Description
These devices are N-channel Power MOSFETs based on the MDmesh M5 innovative
vertical process technology combined with the well-known PowerMESH horizontal
S(3) layout. The resulting products offer extremely low on-resistance, making them
AM01475v1_noZen
particularly suitable for applications requiring high power and superior efficiency.

Product status

STB42N65M5
STF42N65M5
STI42N65M5
STP42N65M5
STW42N65M5

DS6033 - Rev 4 - May 2019 www.st.com

For further information contact your local STMicroelectronics sales office.
 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Electrical ratings

1 Electrical ratings

Table 1. Absolute maximum ratings

Value
Symbol Parameter D²PAK, I²PAK, Unit
TO-220FP
TO-220, TO-247

VGS Gate-source voltage ±25 V

Drain current (continuous) at TC = 25 °C 33 33(1) A

ID
Drain current (continuous) at TC = 100 °C 20.8 20.8 (1) A

IDM(2) Drain current (pulsed) 132 132 A

PTOT Total power dissipation at TC = 25 °C 190 40 W

dv/dt(3) Peak diode recovery voltage slope 15 V/ns

Insulation withstand voltage (RMS) from all three

VISO 2500 V
leads to external heat sink (t = 1 s; TC = 25 °C)

Tj Operating junction temperature range

-55 to 150 °C
Tstg Storage temperature range

1. Limited by maximum junction temperature.

2. Pulse width limited by safe operating area.
3. ISD ≤ 33 A, di/dt ≤ 400 A/μs, VDD = 400 V, VDS(peak) < V(BR)DSS.

Table 2. Thermal data

Value
Symbol Parameter Unit
D²PAK I²PAK TO-220 TO-247 TO-220FP

Thermal resistance
Rthj-case 0.66 3.1 °C/W
junction-case
Thermal resistance
Rthj-amb 62.5 50 62.5 °C/W
junction-ambient
Thermal resistance
Rthj-pcb (1) 30 °C/W
junction-pcb

1. When mounted on an 1 inch² FR-4, 2 Oz copper board.

Table 3. Avalanche characteristics

Symbol Parameter Value Unit

Avalanche current, repetitive or non-repetitive

IAR 11 A
(pulse width limited by Tjmax)

Single pulse avalanche energy

EAS 950 mJ
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)

DS6033 - Rev 4 page 2/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Electrical characteristics

2 Electrical characteristics

(TCASE = 25 °C unless otherwise specified)

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 V 650 V

VGS = 0 V, VDS = 650 V 1 µA

IDSS Zero gate voltage drain current VGS = 0 V, VDS = 650 V,

100 µA
TC = 125 °C (1)

IGSS Gate body leakage current VGS = ±25 V, VDS= 0 V 100 nA

VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V

RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 16.5 A 70 79 mΩ

1. Defined by design, not subject to production test.

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Ciss Input capacitance 4650

VDS = 100 V, f = 1 MHz,
Coss Output capacitance - 110 - pF
VGS = 0 V
Crss Reverse transfer capacitance 3.2

Equivalent capacitance time

Co(tr) (1) - 100 -
related
VDS = 0 to 520 V, VGS = 0 V pF
Equivalent capacitance
Co(er) (2) 285 -
energy related
Rg Gate input resistance f = 1 MHz, ID = 0 A - 1.1 - Ω

Qg Total gate charge VDD = 520 V, ID = 33 A, 98 -

Qgs Gate-source charge VGS = 0 to 10 V - 28 nC

(see Figure 20. Test circuit for gate -
Qgd Gate-drain charge charge behavior) 39

1. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
2. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

td(v) Voltage delay time VDD = 400 V, ID = 20 A, 52

tr(v) Voltage rise time RG = 4.7 Ω, VGS = 10 V 8.4

tf(i) Current fall time (see Figure 21. Test circuit for - 8.7 - ns
inductive load switching and diode
recovery times and
tc(off) Crossing time Figure 24. Switching time 14
waveform)

DS6033 - Rev 4 page 3/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Electrical characteristics

Table 7. Source-drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

ISD Source-drain current 33

- A
ISDM(1) Source-drain current (pulsed) 132

VSD(2) Forward on voltage ISD = 33 A, VGS = 0 V - 1.5 V

trr Reverse recovery time ISD = 33 A, di/dt = 100 A/µs 400 ns

Qrr Reverse recovery charge VDD = 100 V 7 μC

-
(see Figure 21. Test circuit for
IRRM Reverse recovery current inductive load switching and diode 35 A
recovery times)
trr Reverse recovery time ISD = 33 A, di/dt = 100 A/µs 532 ns

Qrr Reverse recovery charge VDD = 100 V, Tj = 150 °C 10 μC

-
(see Figure 21. Test circuit for
IRRM Reverse recovery current inductive load switching and diode 38 A
recovery times)

1. Pulse width limited by safe operating area.

2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.

DS6033 - Rev 4 page 4/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Electrical characteristics (curves)

2.1 Electrical characteristics (curves)

Figure 1. Safe operating area for D²PAK, I²PAK, TO-220 Figure 2. Thermal impedance for D²PAK, I²PAK, TO-220
AM01565v1
ID
(A)

100
is
RD ea
n)
ax ar

o
S(
m is

10µs
by in th

10
ite n

100µs
m tio
Li era
d

1ms
p
O

1 10ms

0.1
0.1 1 10 100 VDS(V)

Figure 3. Safe operating area for TO-247 Figure 4. Thermal impedance for TO-247
AM03246v1
ID
(A)

100
is

10µs
RD ea
)
on
ax ar
S(
m is
by in th

10 100µs
ite n
m tio
Li era
d

1ms
p
O

10ms
1

0.1
0.1 1 10 100 VDS(V)

Figure 5. Safe operating area for TO-220FP Figure 6. Thermal impedance for TO-220FP
AM01566v1 GC20521
ID K
(A) δ=0.5

100 0.2
is 0.1
rea n)
s a DS(o 10-1
hi
10 nt xR 10µs
o n i ma
ti y
era d b 0.05
Op mite 100µs
Li 0.02
1 1ms
0.01
10ms 10-2
Zth= K*R thJ-c
Single pulse
δ =t p/Ƭ
0.1

tp
0.01 10-3 Ƭ

0.1 1 10 100 VDS(V) 10-4 10-3 10-2 10-1 10-0 tp(s)

DS6033 - Rev 4 page 5/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Electrical characteristics (curves)

Figure 7. Output characteristics Figure 8. Transfer characteristics

ID AM01589V1 ID AM01590V1
(A) (A)
VGS = 9, 10 V VDS = 15 V
100 100
VGS =8 V

80 80

60 60

40 VGS =7 V 40

20 20

VGS =6 V
0 0
0 2 4 6 8 10 12 14 VDS (V) 4 5 6 7 8 9 VGS (V)

Figure 9. Gate charge vs gate-source voltage Figure 10. Static drain-source on-resistance
VDS AM01569V1 VGS RDS(on) AM01568V1
(V) (V) (mΩ)
VDD = 520 V VGS = 10 V
600 12 76
ID = 33 A
VDS
500 10 74

400 8 72

300 6 70

200 4 68

100 2 66

0 0 64
0 20 40 60 80 100 120 Qg (nC) 0 5 10 15 20 25 30 ID (A)

Figure 11. Capacitance variations Figure 12. Output capacitance stored energy
AM01570v1 AM03231v1
C Eoss
(pF) (µJ)

10000 16
Ciss
14
1000 12
10
100 Coss 8
6
10 4
Crss 2
1 0
1 10 100 VDS(V) 0 100 200 300 400 500 600 VDS(V)

DS6033 - Rev 4 page 6/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Electrical characteristics (curves)

Figure 13. Normalized gate threshold voltage vs

Figure 14. Normalized on-resistance vs temperature
temperature
RDS(on) AM01573V1
VGS(th) AM01571V1
(norm.)
(norm.)
VGS = 10 V
ID = 250 μA 2.5
1.1

2.0
1.0

1.5
0.9

1.0
0.8

0.5
0.7
0.0
0.6 -75 -25 25 75 125 TJ (°C)
-75 -25 25 75 125 TJ (°C)

Figure 15. Source-drain diode forward characteristics Figure 16. Normalized V(BR)DSS vs temperature
AM01574v1
VSD V(BR)DSS AM01572V1
(V) (norm.)
1.0 TJ=-25°C
1.12
ID = 1 mA
0.9
1.08
0.8

0.7 1.04
0.6 TJ=25°C
1.00
0.5 TJ=150°C
0.96
0.4

0.3 0.92
0.2 0.88
0 5 10 15 20 25 30 ISD(A) -75 -25 25 75 125 TJ (°C)

Figure 17. Switching energy vs gate resistance

AM01575v1
E
(µJ) Eon
ID=20A
600 VDD=400V
L=50µH
500

400

300 Eoff

200

100

0
0 5 10 15 20 25 30 35 40 45 RG(W)

Note: Eon including reverse recovery of a SiC diode.

DS6033 - Rev 4 page 7/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Test circuits

3 Test circuits

Figure 19. Test circuit for resistive load switching times Figure 20. Test circuit for gate charge behavior

VDD

12 V 47 kΩ
1 kΩ
100 nF
RL
2200 3.3
+ μF μF VDD
VD IG= CONST
VGS 100 Ω D.U.T.

VGS
RG D.U.T. pulse width +
2.7 kΩ
2200 VG
pulse width μF
47 kΩ

1 kΩ

AM01468v1 AM01469v1

Figure 21. Test circuit for inductive load switching and

Figure 22. Unclamped inductive load test circuit
diode recovery times

A A A L
D VD
fast 100 µH
G D.U.T. diode 2200 3.3
S B 3.3 1000 + µF µF VDD
B B
25 Ω D
µF + µF VDD ID
G D.U.T.
+ RG S
Vi D.U.T.
_
pulse width

AM01471v1
AM01470v1

Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform
V(BR)DSS Id
Concept waveform for Inductive Load Turn-off

VD 90%Vds 90%Id

Tdelay -off

IDM
Vgs

90%Vgs on

ID
Vgs(I(t ))

VDD VDD 10%Vds 10%Id

Vds
Trise Tfall

Tcross --over
AM01472v1 AM05540v2

DS6033 - Rev 4 page 8/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Package information

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.

DS6033 - Rev 4 page 9/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
D²PAK (TO-263) type A2 package information

4.1 D²PAK (TO-263) type A2 package information

Figure 25. D²PAK (TO-263) type A2 package outline

0079457_A2_26

DS6033 - Rev 4 page 10/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
D²PAK (TO-263) type A2 package information

Table 8. D²PAK (TO-263) type A2 package mechanical data

mm
Dim.
Min. Typ. Max.

A 4.40 4.60
A1 0.03 0.23
b 0.70 0.93
b2 1.14 1.70
c 0.45 0.60
c2 1.23 1.36
D 8.95 9.35
D1 7.50 7.75 8.00
D2 1.10 1.30 1.50
E 10.00 10.40
E1 8.70 8.90 9.10
E2 7.30 7.50 7.70
e 2.54
e1 4.88 5.28
H 15.00 15.85
J1 2.49 2.69
L 2.29 2.79
L1 1.27 1.40
L2 1.30 1.75
R 0.40
V2 0° 8°

Figure 26. D²PAK (TO-263) recommended footprint (dimensions are in mm)

Footprint

DS6033 - Rev 4 page 11/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
D²PAK packing information

4.2 D²PAK packing information

Figure 27. D²PAK tape outline

DS6033 - Rev 4 page 12/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
D²PAK packing information

Figure 28. D²PAK reel outline

40mm min.
access hole
at slot location
B

D C

N
A

Tape slot G measured

in core for at hub
Full radius tape start
2.5mm min.width

AM06038v1

Table 9. D²PAK tape and reel mechanical data

Tape Reel

mm mm
Dim. Dim.
Min. Max. Min. Max.

A0 10.5 10.7 A 330

B0 15.7 15.9 B 1.5
D 1.5 1.6 C 12.8 13.2
D1 1.59 1.61 D 20.2
E 1.65 1.85 G 24.4 26.4
F 11.4 11.6 N 100
K0 4.8 5.0 T 30.4
P0 3.9 4.1
P1 11.9 12.1 Base quantity 1000
P2 1.9 2.1 Bulk quantity 1000
R 50
T 0.25 0.35
W 23.7 24.3

DS6033 - Rev 4 page 13/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
TO-220FP package information

4.3 TO-220FP package information

Figure 29. TO-220FP package outline

7012510_Rev_12_B

DS6033 - Rev 4 page 14/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
TO-220FP package information

Table 10. TO-220FP package mechanical data

mm
Dim.
Min. Typ. Max.

A 4.4 4.6
B 2.5 2.7
D 2.5 2.75
E 0.45 0.7
F 0.75 1
F1 1.15 1.70
F2 1.15 1.70
G 4.95 5.2
G1 2.4 2.7
H 10 10.4
L2 16
L3 28.6 30.6
L4 9.8 10.6
L5 2.9 3.6
L6 15.9 16.4
L7 9 9.3
Dia 3 3.2

DS6033 - Rev 4 page 15/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
I²PAK package information

4.4 I²PAK package information

Figure 30. I²PAK package outline

0004982_Rev_H

DS6033 - Rev 4 page 16/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
I²PAK package information

Table 11. I²PAK package mechanical data

mm
Dim.
Min. Typ. Max.

A 4.40 - 4.60
A1 2.40 - 2.72
b 0.61 - 0.88
b1 1.14 - 1.70
c 0.49 - 0.70
c2 1.23 - 1.32
D 8.95 - 9.35
e 2.40 - 2.70
e1 4.95 - 5.15
E 10 - 10.40
L 13 - 14
L1 3.50 - 3.93
L2 1.27 - 1.40

DS6033 - Rev 4 page 17/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
TO-220 type A package information

4.5 TO-220 type A package information

Figure 31. TO-220 type A package outline

0015988_typeA_Rev_22

DS6033 - Rev 4 page 18/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
TO-220 type A package information

Table 12. TO-220 type A package mechanical data

mm
Dim.
Min. Typ. Max.

A 4.40 4.60
b 0.61 0.88
b1 1.14 1.55
c 0.48 0.70
D 15.25 15.75
D1 1.27
E 10.00 10.40
e 2.40 2.70
e1 4.95 5.15
F 1.23 1.32
H1 6.20 6.60
J1 2.40 2.72
L 13.00 14.00
L1 3.50 3.93
L20 16.40
L30 28.90
øP 3.75 3.85
Q 2.65 2.95

DS6033 - Rev 4 page 19/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
TO-247 package information

4.6 TO-247 package information

Figure 32. TO-247 package outline

0075325_9

DS6033 - Rev 4 page 20/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
TO-247 package information

Table 13. TO-247 package mechanical data

mm
Dim.
Min. Typ. Max.

A 4.85 5.15
A1 2.20 2.60
b 1.0 1.40
b1 2.0 2.40
b2 3.0 3.40
c 0.40 0.80
D 19.85 20.15
E 15.45 15.75
e 5.30 5.45 5.60
L 14.20 14.80
L1 3.70 4.30
L2 18.50
ØP 3.55 3.65
ØR 4.50 5.50
S 5.30 5.50 5.70

DS6033 - Rev 4 page 21/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Ordering information

5 Ordering information

Table 14. Order codes

Order code Marking Package Packing

STB42N65M5 D²PAK Tape and reel

STF42N65M5 TO-220FP
STI42N65M5 42N65M5 I²PAK
Tube
STP42N65M5 TO-220
STW42N65M5 TO-247

DS6033 - Rev 4 page 22/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5

Revision history

Table 15. Document revision history

Date Version Changes

16-Jan-2009 1 First release.

15-May-2009 2 Updated figures 9, 10, 11 and 17
12-Jun-2009 3 Figure 15 has been updated
Modified features and description on cover page.
02-May-2019 4 Updated Section 4 Package information.
Minor text changes.

DS6033 - Rev 4 page 23/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5
Contents

Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4.1 D²PAK (TO-263) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 D²PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.4 I²PAK package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.5 TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.6 TO-247 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

DS6033 - Rev 4 page 24/25

 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5

IMPORTANT NOTICE – PLEASE READ CAREFULLY

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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved

DS6033 - Rev 4 page 25/25