February 1999

FDC658P
Single P-Channel, Logic Level, PowerTrenchTM MOSFET

General Description Features

This P-Channel Logic Level MOSFET is produced

-4 A, -30 V. RDS(ON) = 0.050 Ω @ VGS = -10 V
using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored RDS(ON) = 0.075 Ω @ VGS = -4.5 V.
to minimize the on-state resistance and yet maintain Low gate charge (8nC typical).
low gate charge for superior switching performance.
High performance trench technology for extremely low
These devices are well suited for notebook computer
RDS(ON).
applications: load switching and power management,
battery charging circuits, and DC/DC conversion. SuperSOTTM-6 package: small footprint (72% smaller than
standard SO-8); low profile (1mm thick).

SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16

S 1 6
D
D 8
.65 2 5

G
D 3 4
TM
pin 1 D
SuperSOT -6

Absolute Maximum Ratings TA = 25°C unless otherwise note

Symbol Parameter Ratings Units
VDSS Drain-Source Voltage -30 V

VGSS Gate-Source Voltage - Continuous ±20 V

ID Drain Current - Continuous (Note 1a) -4 A

- Pulsed -20
PD Maximum Power Dissipation (Note 1a) 1.6 W
(Note 1b) 0.8
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W

© 1999 Fairchild Semiconductor Corporation FDC658P Rev.C

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units

OFF CHARACTERISTICS

BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -30 V

∆BVDSS/∆TJ
o
Breakdown Voltage Temp. Coefficient ID = -250 µA, Referenced to 25 C -22 mV/oC
IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V -1 µA
TJ = 55 oC -10 µA
IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA
ON CHARACTERISTICS (Note 2)

VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA -1 -1.7 -3 V

∆VGS(th)/∆TJ Gate Threshold VoltageTemp.Coefficient ID = -250 µA, Referenced to 25 oC 4.1 mV/oC
RDS(ON) Static Drain-Source On-Resistance VGS = -10 V, ID = -4.0 A 0.041 0.05 Ω
o
TJ = 125 C 0.058 0.08
VGS = -4.5 V, ID = -3.4 A 0.06 0.075
ID(on) On-State Drain Current VGS = -10 V, VDS = -5 V -20 A
gFS Forward Transconductance VDS = -5V, ID = -4 A 9 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = -15 V, VGS = 0 V, 750 pF
Coss Output Capacitance f = 1.0 MHz 220 pF
Crss Reverse Transfer Capacitance 100 pF
SWITCHING CHARACTERISTICS (Note 2)
tD(on) Turn - On Delay Time VDD = -15 V, ID = -1 A, 12 22 ns
tr Turn - On Rise Time VGS = -10 V, RGEN = 6 Ω 14 25 ns
tD(off) Turn - Off Delay Time 24 38 ns
tf Turn - Off Fall Time 16 27 ns
Qg Total Gate Charge VDS = -15 V, ID = -4.0 A, 8 12 nC
Qgs Gate-Source Charge VGS = -5 V 1.8 nC
Qgd Gate-Drain Charge 3 nC
DRAIN-SOURCE DIODE CHARACTERISTICS
IS Continuous Source Diode Current -1.3 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.3 A (Note 2) -0.76 -1.2 V
Notes:

1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed

by design while RθCA is determined by the user's board design.

a. 78oC/W when mounted on a 1 in2 pad of 2oz Cu on FR-4 board.

b. 156oC/W when mounted on a minimum pad of 2oz Cu on FR-4 board.

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

FDC658P Rev.C
 Typical Electrical Characteristics

20 2
VGS= -10V

DRAIN-SOURCE ON-RESISTANCE
- ID , DRAIN-SOURCE CURRENT (A)

-6.0V
-4.5V 1.8

R DS(on) , NORMALIZED
16
-4.0V VGS = -4.0 V
1.6
12 -4.5V
-3.5V 1.4 -5.0V
8
-6.0V
1.2
-8.0V
4 -3.0V -10.0V
1

0 0.8
0 1 2 3 4 0 4 8 12 16 20
-VDS , DRAIN-SOURCE VOLTAGE (V) - I D , DRAIN CURRENT (A)

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.6 0.16
ID = -2A

R DS(ON) , ON-RESISTANCE (OHM)

I D = -4A
DRAIN-SOURCE ON-RESISTANCE

V GS = -10V
1.4
0.12
R DS(ON) , NORMALIZED

1.2
0.08 TJ = 125°C
1

0.04 TJ = 25°C
0.8

0.6 0
-50 -25 0 25 50 75 100 125 150 2 4 6 8 10
T J , JUNCTION TEMPERATURE (°C) -V GS , GATE TO SOURCE VOLTAGE (V)

Figure 3. On-Resistance Variation Figure 4. On-Resistance Variation with

with Temperature. Gate-to-Source Voltage.

20 20
10 VGS = 0V
-IS , REVERSE DRAIN CURRENT (A)

V DS = -5V
TJ = -55°C 125°C
16 TJ = 125°C
- I D , DRAIN CURRENT (A)

1
25°C
12 25°C
0.1
-55°C

8 0.01

4 0.001

0 0.0001
1 2 3 4 5 6 0 0.2 0.4 0.6 0.8 1 1.2 1.4
-VGS , GATE TO SOURCE VOLTAGE (V) -VSD , BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage

Variation with Source Current
and Temperature.

FDC658P Rev.C
 Typical Electrical Characteristics (continued)

10 3000
-VGS , GATE-SOURCE VOLTAGE (V)

I D = -4A
8
VDS = -5V -10V 1000 Ciss

CAPACITANCE (pF)
-15V
6

300 Coss
4

Crss
100 f = 1 MHz
2
VGS = 0 V

0
0 3 6 9 12 15 30
Q g , GATE CHARGE (nC) 0.1 0.3 1 3 7 15 30
-V DS , DRAIN TO SOURCE VOLTAGE (V)

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

80 5

30 SINGLE PULSE
T 100
IMI us
)L 4
-ID, DRAIN CURRENT (A)

10 (ON RθJA =156°C/W

S
RD TA = 25°C
1m
s
POWER (W)

3
10m 3
s
1 10
0m
s 2
0.3 1s
VGS = -10V
DC
0.1 SINGLE PULSE
1
R θJA = 156°C/W
0.03
TA = 25°C
0.01 0
0.1 0.2 0.5 1 2 5 10 20 50 0.01 0.1 1 10 100 300
-VDS , DRAIN-SOURCE VOLTAGE (V) SINGLE PULSE TIME (SEC)

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power
Dissipation.

1
TRANSIENT THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE

0.5 D = 0.5
R θJA (t) = r(t) * R θJA
R θJA = 156°C/W
0.2 0.2

0.1 0.1 P(pk)

0.05 0.05 t1
t2
0.02
0.02 TJ - TA = P * R θJA (t)
0.01
Duty Cycle, D = t 1/ t 2
0.01 Single Pulse

0.005
0.00001 0.0001 0.001 0.01 0.1 1 10 100 300
t 1, TIME (sec)

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.

FDC658P Rev.C
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

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with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.