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    P2003BDG: N-Channel Logic Level Enhancement Mode MOSFET

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    Rexer Anthony
    The document provides specifications for an N-channel logic level enhancement mode MOSFET. Key details include: - It has a drain-source breakdown voltage of 25V, on-state drain current of 28A, and on-state drain-source resistance of 20mΩ at 10V gate-source voltage. - Absolute maximum ratings include a drain-source voltage of 25V, pulsed drain current of 90A, and power dissipation of 27W at 100°C junction temperature. - Electrical characteristics are given for static parameters like threshold voltage (1-3V) and dynamic ones such as input/output capacitance (470pF/161pF) and gate resistance (

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    P2003BDG: N-Channel Logic Level Enhancement Mode MOSFET

    Uploaded by

    Rexer Anthony
    33 views5 pages
    The document provides specifications for an N-channel logic level enhancement mode MOSFET. Key details include: - It has a drain-source breakdown voltage of 25V, on-state drain current of 28A, and on-state drain-source resistance of 20mΩ at 10V gate-source voltage. - Absolute maximum ratings include a drain-source voltage of 25V, pulsed drain current of 90A, and power dissipation of 27W at 100°C junction temperature. - Electrical characteristics are given for static parameters like threshold voltage (1-3V) and dynamic ones such as input/output capacitance (470pF/161pF) and gate resistance (

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    P56KlBP32681

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    The document provides specifications for an N-channel logic level enhancement mode MOSFET. Key details include: - It has a drain-source breakdown voltage of 25V, on-state drain current of 28A, and on-state drain-source resistance of 20mΩ at 10V gate-source voltage. - Absolute maximum ratings include a drain-source voltage of 25V, pulsed drain current of 90A, and power dissipation of 27W at 100°C junction temperature. - Electrical characteristics are given for static parameters like threshold voltage (1-3V) and dynamic ones such as input/output capacitance (470pF/161pF) and gate resistance (

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    33 views5 pages

    P2003BDG: N-Channel Logic Level Enhancement Mode MOSFET

    Uploaded by

    Rexer Anthony
    The document provides specifications for an N-channel logic level enhancement mode MOSFET. Key details include: - It has a drain-source breakdown voltage of 25V, on-state drain current of 28A, and on-state drain-source resistance of 20mΩ at 10V gate-source voltage. - Absolute maximum ratings include a drain-source voltage of 25V, pulsed drain current of 90A, and power dissipation of 27W at 100°C junction temperature. - Electrical characteristics are given for static parameters like threshold voltage (1-3V) and dynamic ones such as input/output capacitance (470pF/161pF) and gate resistance (

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 5

    P2003BDG

    N-Channel Logic Level Enhancement Mode MOSFET

    PRODUCT SUMMARY
    V(BR)DSS RDS(ON) ID

    25V 20mΩ @VGS = 10V 28A

    TO-252

    ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)


    PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS
    Drain-Source Voltage VDS 25
    V
    Gate-Source Voltage VGS ±20
    TC= 25 °C 28
    Continuous Drain Current ID
    TC= 100 °C 18
    1
    A
    Pulsed Drain Current IDM 90
    Avalanche Current IAS 23
    Avalanche Energy L=0.1mH EAS 26 mJ
    TC= 25 °C 27
    Power Dissipation PD W
    TC= 100°C 10
    Operating Junction & Storage Temperature Range Tj, Tstg -55 to 150 °C

    THERMAL RESISTANCE RATINGS


    THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS
    Junction-to-Case RqJC 4.6 °C / W
    1
    Pulse width limited by maximum junction temperature.

    REV 1.0 1 2014/5/12


    P2003BDG
    N-Channel Logic Level Enhancement Mode MOSFET

    ELECTRICAL CHARACTERISTICS (TJ = 25 °C, Unless Otherwise Noted)


    LIMITS
    PARAMETER SYMBOL TEST CONDITIONS UNITS
    MIN TYP MAX
    STATIC
    Drain-Source Breakdown V(BR)DSS VGS = 0V, ID = 250mA 25
    Voltage V
    Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250mA 1 2 3
    Gate-Body Leakage IGSS VDS = 0V, VGS = ±20V ±100 nA
    VDS =20V, VGS = 0V 1
    Zero Gate Voltage Drain Current IDSS mA
    VDS =20V, VGS = 0V, TJ = 125°C 10
    On-State Drain Current1 ID(ON) VDS = 5V, VGS = 10V 90 A
    Drain-Source On-State VGS =10V, ID =15A 14 20
    RDS(ON) mΩ
    Resistance1 VGS =4.5V, ID =10A 25 31
    Forward Transconductance1 gfs VDS =5V, ID =15A 16 S
    DYNAMIC
    Input Capacitance Ciss 470
    Output Capacitance Coss VGS = 0V, VDS = 15V, f = 1MHz 161 pF
    Reverse Transfer Capacitance Crss 130
    Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz 2.9 Ω
    VGS = 10V 15
    Total Gate Charge2 Qg
    VGS = 4.5V VDS =0.5V(BR)DSS, VGS = 10V, 9
    nC
    Gate-Source Charge 2 Qgs ID = 15A 3
    Gate-Drain Charge2 Qgd 6
    2 td(on)
    Turn-On Delay Time 10
    2 VDS = 15V ,
    Rise Time tr 17
    2
    ID≌15A, VGS = 10V,RGS = 6Ω nS
    Turn-Off Delay Time td(off) 34
    Fall Time2 tf 27
    SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 °C)
    Continuous Current IS 28 A
    1 VSD IF = 15A, VGS = 0V
    Forward Voltage 1.4 V
    Reverse Recovery Time trr VDS =13V, 15.3 nS
    Reverse Recovery Charge Qrr IF = 15A, dlF/dt = 100A /ms 4.5 nC
    1
    Pulse test : Pulse Width  300 msec, Duty Cycle  2％.
    2
    Independent of operating temperature.

    REV 1.0 2 2014/5/12


    P2003BDG
    N-Channel Logic Level Enhancement Mode MOSFET

    REV 1.0 3 2014/5/12


    P2003BDG
    N-Channel Logic Level Enhancement Mode MOSFET

    REV 1.0 4 2014/5/12


    P2003BDG
    N-Channel Logic Level Enhancement Mode MOSFET

    *因为各家封装模具不同而外观略有所差异，不影响电性及Layout。

    REV 1.0 5 2014/5/12

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