®

RT8815A

Dual-Phase PWM Controller with PWM-VID Reference

General Description Features
The RT8815A is a 2/1 phase synchronous Buck PWM  Dual-Phase PWM Controller
controller which is optimized for high performance graphic  Two Embedded MOSFET Drivers and Embedded
microprocessor and computer applications. The IC Switching Boot Diode
integrates a Constant-On-Time (COT) PWM controller, two  External Reference Input Control
MOSFET drivers with internal bootstrap diodes, as well  PWM-VID Dynamic Voltage Control
as channel current balance and protection functions  Dynamic Phase Number Control
including Over-Voltage Protection (OVP), Under-Voltage  Lossless RDS(ON) Current Sensing for Current Balance
Protection (UVP), current limit, and thermal shutdown into  Internal Soft-Start
the WQFN-20L 3x3 package.  Adjustable Current Limit Threshold
 Adjustable Switching Frequency
The RT8815A adopts RDS(ON) current sensing technique.
 UVP/OVP Protection
Current limit is accomplished through continuous inductor-
 Shoot Through Protection and Short Pulse Free
current-sense, while RDS(ON) current sensing is used for
Technology
accurate channel current balance. Using the method of
 Support an Ultra-Low Output Voltage as Standby
current sampling utilizes the best advantages of each
Voltage
technique.
 Thermal Shutdown
The RT8815A features external reference input and PWM-  Power Good Indicator
VID dynamic output voltage control, in which the feedback  RoHS Compliant and Halogen Free
voltage is regulated and tracks external input reference
voltage. Other features include adjustable switching Applications
frequency, dynamic phase number control, internal soft-
 CPU/GPU Core Power Supply
start, power good indicator, and enable functions.
 Notebook PC Memory Power Supply
 Chipset/RAM Power Supply
 Generic DC/DC Power Regulator

Simplified Application Circuit

RT8815A
VPVCC PVCC VIN
BOOT1
UGATE1
PHASE1 VOUT
VIN TON LGATE1

PGOOD
VIN
BOOT2
UGATE2
PSI
PHASE2
VID LGATE2

EN
RGND VGND_SNS
GND
VSNS VOUT_SNS

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

1
RT8815A
Ordering Information Pin Configurations
RT8815A (TOP VIEW)
Package Type

PHASE1

PHASE2
LGATE1

LGATE2
QW : WQFN-20L 3x3 (W-Type)

PVCC
Lead Plating System
G : Green (Halogen Free and Pb Free) 20 19 18 17 16
BOOT1 1 15 BOOT2
Note :
UGATE1 2 14 UGATE2
Richtek products are : EN 3 GND 13 PGOOD
PSI 4 21 12 NC
 RoHS compliant and compatible with the current require-
VID 5 11 VSNS
ments of IPC/JEDEC J-STD-020. 6 7 8 9 10

VREF
REFIN

TON
RGND
REFADJ
 Suitable for use in SnPb or Pb-free soldering processes.

Marking Information WQFN-20L 3x3

5U= : Product Code
5U=YM YMDNN : Date Code
DNN

Function Pin Description

Pin No. Pin Name Pin Function
1 BOOT1 Bootstrap Supply for PWM 1. This pin powers the high-side MOSFET driver.
High-Side Gate Driver of PWM 1. This pin provides the gate drive for the converter's
2 UGATE1
high-side MOSFET. Connect this pin to the Gate of high-side MOSFET.
3 EN Enable Control Input. Active high input.
Power Saving Interface. When the voltage is pulled below 0.8V, the device will operate
into 1 phase DEM. When the voltage is between 1.2V to 1.8V, the device will operate
4 PSI
into 1 phase force CCM. When the voltage is between 2.4V to 5.5V, the device will
operate into 2 phase force CCM.
Programming Output Voltage Control Input. Refer to PWM-VID Dynamic Voltage
5 VID
Control.
6 REFADJ Reference Adjustment Output. Refer to PWM-VID Dynamic Voltage Control.
7 REFIN External Reference Input.
Reference Voltage Output. This is a high precision voltage reference (2V) from the
8 VREF
VREF pin to RGND pin.
ON-Time/Switching Frequency Adjustment Input. Connect a 100pF ceramic capacitor
9 TON
between CTON and ground is optional for noise immunity enhancement.
10 RGND Negative Remote Sense Input. Connect this pin to the ground of output load.
11 VSNS Positive Remote Sense Input. Connect this pin to the positive terminal of output load.
12 NC No Internal Connection. Leav e the pin floating is recommended.
13 PGOOD Power Good Indicator Output. Active high open-drain output.
High-Side Gate Driver of PWM 2. This pin provides the gate drive for the converter's
14 UGATE2
high-Side MOSFET. Connect this pin to the Gate of high-side MOSFET.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8815A-00 March 2014

2
 RT8815A
Pin No. Pin Name Pin Function
15 BOOT2 Bootstrap Supply for PWM 2. This pin powers the high-side MOSFET driver.
Switch Node for PWM2. This pin is return node of the high-side driver of PWM 2.
16 PHASE2 Connect this pin to the Source of high-side MOSFET together with the Drain of
low-side MOSFET and the inductor.
Low-Side Gate Driver of PWM 2. This pin provides the gate drive for the
17 LGATE2
converter's low-side MOSFET. Connect this pin to the Gate of low-side MOSFET.
Supply Voltage Input. Connect this pin to a 5V bias supply. Place a high quality
18 PVCC
bypass capacitor from this pin to GND.
Low-Side Gate Driver of PWM 1. This pin provides the gate drive for the
19 LGATE1
converter's low-side MOSFET. Connect this pin to the Gate of low-side MOSFET.
Switch Node for PWM1. This pin is return node of the high-side driver of PWM 1.
20 PHASE1 Connect this pin to the Source of high-side MOSFET together with the Drain of
low-side MOSFET and the inductor.
Ground. The Exposed pad should be soldered to a large PCB and connected to
21 (Exposed Pad) GND
GND for maximum thermal dissipation.

Function Block Diagram

VREF

Reference
VID Output Gen.

REFADJ PVCC
PSI Mode Select Power On Reset
& Central Logic
OV
PGOOD
REFIN Threshold -
Select +
UV Control & Protection Logic
40% REFIN +
Boot-Phase
- Detection 1

Soft-Start PWM Boot-Phase

& Slew Rate CMP Detection 2
Control + BOOT1
TON
VSNS - Gen 1 UGATE1
RGND PHASE1
PWM1
Enable To Driver Logic LGATE1
EN
Logic To Power On Reset Driver
Logic BOOT2
TON PWM2 UGATE2
Gen 2
PHASE2

LGATE2
To Power On Reset

TON VIN
Detection -
S/H GM
+ VB
Current
Balance -
PHASE1 ZCD To Driver Logic S/H GM
+ VB
Current
To Protection Logic
Limit

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

3
RT8815A
Operation
The RT8815A is a dual-phase synchronous Buck PWM Current Balance
controller with integrated drivers which are optimized for The RT8815A implements internal current balance
high performance graphic microprocessor and computer mechanism in the current loop. The RT8815A senses per
applications. The IC integrates a COT (Constant-On-Time) phase current and compares it with the average current. If
PWM controller with two MOSFET drivers, as well as the sensed current of any particular phase is higher than
output current monitoring and protection functions. average current, the on-time of this phase will be adjusted
Referring to the function block diagram of TON Genx, the to be shorter.
synchronous UGATE driver is turned on at the beginning
of each cycle. After the internal one-shot timer expires, Current Limit
the UGATE driver will be turned off. The pulse width of The current limit circuit employs a unique “valley” current
this one-shot is determined by the converter's input voltage sensing algorithm. If the magnitude of the current sense
and the output voltage to keep the frequency fairly constant signal at PHASE is above the current limit threshold, the
over the input voltage range and output voltage. Another PWM is not allowed to initiate a new cycle. Thus, the
one-shot sets a minimum off-time. current to the load exceeds average output inductor
The RT8815A also features a PWM-VID dynamic voltage current, the output voltage falls and eventually crosses
control circuit driven by the pulse width modulation the under-voltage protection threshold, inducing IC
method. This circuit reduces the device pin count and shutdown.
enables a wide dynamic voltage range.
Over-Voltage Protection (OVP) & Under-Voltage
Soft-Start (SS) Protection (UVP)

For soft-start function, an internal current source charges The output voltage is continuously monitored for over-
an internal capacitor to build the soft-start ramp voltage. voltage and under-voltage protection. When the output
The output voltage will track the internal ramp voltage during voltage exceeds its set voltage threshold (If VREFIN ≤ 1.33V,
soft-start interval. OV = 2V, or VREFIN > 1.33V, OV = 1.5 x VREFIN), UGATE
goes low and LGATE is forced high; when it is less than
PGOOD 40% of its set voltage, under voltage protection is triggered
The power good output is an open-drain architecture. and then both UGATE and LGATE gate drivers are forced
low. The controller is latched until PVCC is re-supplied
When the soft-start is finished, the PGOOD open-drain
and exceeds the POR rising threshold voltage or EN is
output will be high impedance.
reset.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8815A-00 March 2014

4
 RT8815A
Absolute Maximum Ratings (Note 1)
 TON to GND ------------------------------------------------------------------------------------------------------------------ −0.3V to 30V
 RGND to GND --------------------------------------------------------------------------------------------------------------- −0.7V to 0.7V
 BOOTx to PHASEx -------------------------------------------------------------------------------------------------------- −0.3V to 6V
 PHASEx to GND

DC ------------------------------------------------------------------------------------------------------------------------------ −0.3V to 30V

<20ns ------------------------------------------------------------------------------------------------------------------------- −8V to 36V
 UGATEx to PHASEx

DC ------------------------------------------------------------------------------------------------------------------------------ −0.3V to 6V
<20ns ------------------------------------------------------------------------------------------------------------------------- −5V to 7.5V
 LGATEx to GND

DC ------------------------------------------------------------------------------------------------------------------------------ −0.3V to 6V
<20ns ------------------------------------------------------------------------------------------------------------------------- −2.5V to 7.5V
 Other Pins -------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
 Power Dissipation, PD @ TA = 25°C

WQFN-20L 3x3 ------------------------------------------------------------------------------------------------------------- 3.33W

 Package Thermal Resistance (Note 2)

WQFN-20L 3x3, θJA -------------------------------------------------------------------------------------------------------- 30°C/W

WQFN-20L 3x3, θJC ------------------------------------------------------------------------------------------------------- 7.5°C/W
 Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------- 260°C
 Junction Temperature ------------------------------------------------------------------------------------------------------ 150°C
 Storage Temperature Range --------------------------------------------------------------------------------------------- −65°C to 150°C
 ESD Susceptibility (Note 3)

HBM (Human Body Model) ----------------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)

 Input Voltage, VIN ----------------------------------------------------------------------------------------------------------- 5V to 26V
 Supply Voltage, VPVCC ---------------------------------------------------------------------------------------------------- 4.5V to 5.5V
 Junction Temperature Range --------------------------------------------------------------------------------------------- −40°C to 125°C
 Ambient Temperature Range --------------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics
(TA = 25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
PWM Controller
PVCC Supply Voltage VPVCC 4.5 -- 5.5 V
PVCC Supply Current ISUPPLY EN = 3.3V, Not Switching -- 1.5 2 mA
PVCC Shutdown Current ISHDN EN = 0V -- -- 10 A
PVCC POR Threshold 3.8 4.1 4.4 V
POR Hysteresis -- 0.3 -- V
Switching Frequency fSW R TON = 500k (Note 5) 270 300 330 kHz

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

5
RT8815A
Parameter Symbol Test Conditions Min Typ Max Unit
Minimum On-Time tON(MIN) -- 70 -- ns
Minimum Off-Time tOFF(MIN) -- 300 -- ns
EN Input Voltage
Logic-High VENH 1.6 -- --
EN Input Voltage V
Logic-Low VENL -- -- 0.8
Mode Decision
PSI High Threshold VPSIH Enables Two Phases with FCCM 2.4 -- -- V
PSI Intermediate Threshold VPSIM Enables One Phases with FCCM 1.2 -- 1.8 V
PSI Low Threshold VPSIL Enables One Phases with DEM -- -- 0.8 V
High-Level VVIDH 2 -- --
VID Input Voltage V
Low-Level VVIDL -- -- 1
Protection Function
Zero Current Crossing
8 -- 8 mV
Threshold
Current Limit Setting Current IOCSET 9 10 11 A
Current Limit Setting Current
IOCSET_TC -- 6300 -- ppm/C
Temperature Coefficient
Current Limit Threshold ROCSET = 10k -- 60 -- mV
Absolute Over-Voltage
VOVP, Absolute VREFIN  1.33V 1.9 2 2.1 V
Protection Threshold
Relative Over-Voltage
VOVP, Relative VREFIN > 1.33V 145 150 155 %
Protection Threshold
OV Fault Delay FB forced above OV threshold -- 5 -- s
Relative Under-Voltage
VUVP UVP 35 40 45 %
Protection Threshold
UV Fault Delay FB forced above UV threshold -- 3 -- s
Thermal Shutdown Threshold TSD -- 150 -- C
PGOOD Blanking Time From EN = high to PGOOD = high
-- 2.5 -- ms
(Internal) with VSNS within regulation point
From first UGATE to VSNS
VSNS Soft-Start (Internal) regulation point, VREFIN = 1V and -- 0.7 -- ms
VSNS initial = 0V
Error Amplifier
VSNS Error Comparator
VREFIN = 1V 17.5 12.5 7.5 mV
Threshold (Valley)
Reference
Sourcing Current = 1mA, VID no
Reference Voltage VVREF 1.98 2 2.02 V
Switching

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8815A-00 March 2014

6
 RT8815A
Parameter Symbol Test Conditions Min Typ Max Unit
Driver On-Resistance
UGATE Driver Source RUGATEsr BOOTx  PHASEx Forced to 5V -- 2 4 
UGATE Driver Sink RUGATEsk BOOTx  PHASEx Forced to 5V -- 1 2 
LGATE Driver Source RLGATEsr LGATEx, High State -- 1.5 3 
LGATE Driver Sink RLGATEsk LGATEx, Low State -- 0.7 1.5 
From LGATE Falling to UGATE
-- 30 --
Rising
Dead-Time ns
From UGATE Falling to LGATE
-- 20 --
Rising
Internal Boost Charging
RBOOT PVCC to BOOTx, IBOOT = 10mA -- 40 80 
Switch On-Resistance

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Not production tested. Test condition is VIN = 8V, VOUT = 1V, IOUT = 20A using application circuit.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

7
RT8815A
Typical Application Circuit
VIN
1 0 0.1µF
18
VPVCC PVCC BOOT1 1
2.2µF RT8815A 0 10µF x 2 470µF/50V
RTON UGATE1 2
2.2 500k 9 0.36µH/1.05m 
VIN TON PHASE1 20 VOUT
1µF CTON LGATE1 19 NC
22µF x 15
Optional ROCSET
100k 10k NC 330µF/2V x 4
13
PGOOD PGOOD
4 12
PSI PSI NC Floating
5 VID VIN
VID
0 0.1µF
3 EN 15
Enable BOOT2 10µF x 2 470µF/50V
8 14 0
VREF UGATE2
0.1µF 0.36µH/1.05m 
16
RREF1 20k PHASE2
RGND 20k LGATE2 17 NC
6
REFADJ
CREFADJ RREFADJ NC 10 10
RBOOT 2k 2.7nF 10
RGND VGND_SNS
RGND 7 REFIN 11
VSNS VOUT_SNS
RSTANDBY CREFIN
RREF2 NC GND
5.1k 18k 21 (Exposed pad)
0
VSTANDBY RGND RGND
NC
RGND

Figure 1. 2 Active Phase Configuration

VIN
1 18 0 0.1µF
VPVCC PVCC BOOT1 1
2.2µF RT8815A 10µF x 2 470µF/50V
0
RTON UGATE1 2
2.2 500k 9 0.36µH/1.05m 
VIN TON PHASE1 20 VOUT
1µF CTON
LGATE1 19 NC 22µF x 15
Optional
ROCSET
100k 13 10k NC 330µF/2V x 4
PGOOD PGOOD
4
PSI PSI
VID 5 VID
10 10
Enable 3 EN 10
RGND VGND_SNS
8 11
VREF VSNS VOUT_SNS
0.1µF 12
20k NC
RREF1
RGND 20k 15
BOOT2
6
REFADJ 14
CREFADJ RREFADJ UGATE2 Floating
2k 2.7nF 16
RBOOT PHASE2
RGND 7 REFIN LGATE2 17
RSTANDBY RREF2 CREFIN GND
5.1k 18k NC
21 (Exposed pad)
0
VSTANDBY RGND RGND
NC
RGND

Figure 2. 1 Active Phase Configuration

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8815A-00 March 2014

8
 RT8815A
Typical Operating Characteristics
Efficiency vs. Load Current Efficiency vs. Load Current
100%
100 100%
100
90%
90 90%
90
80%
80 80%
80
70%
70 70%
70
Efficiency (%)

Efficiency (%)
60%
60 60%
60
50%
50 50%
50
40%
40 40%
40
30%
30 30
30%
20%
20 20
20%
10%
10 VIN = 19V, VPVCC = 5V, 10 VIN = 19V, VPVCC = 5V,
10%
VOUT = 0.9V, 2 Phase Operation VOUT = 0.9V, 1 Phase with DEM Operation
0%0 0
0%
0 5 10 15 20 25 30 35 40 45 50 55 60 0.01 0.1 1 10
Load Current (A) Load Current (A)

TON vs. Temperature VREF vs. Temperature

185.0 2.04

182.5 2.03

180.0 2.02

177.5 2.01
TON (ns)

VREF (V)

175.0 2.00

172.5 1.99

170.0 1.98

167.5 1.97
VIN = 19V, VPVCC = 5V, No Load VIN = 19V, VPVCC = 5V, No Load
165.0 1.96
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

Inductor Current vs. Output Current Power On from EN

35

30
EN
Inductor Current (A)

25 (5V/Div)
Phase 1
20 Phase 2
VOUT
(1V/Div)
15

10 UGATE1
(50V/Div)
5 UGATE2
VIN = 19V, VPVCC = 5V (50V/Div) VIN = 19V, VPVCC = 5V, IOUT = 50A
0
0 10 20 30 40 50 60 Time (1ms/Div)
Output Current (A)

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

9
RT8815A

Power Off from EN Power On from VCC

EN PVCC
(5V/Div) (5V/Div)

VOUT VOUT
(1V/Div) (1V/Div)

UGATE1 UGATE1
(50V/Div) (50V/Div)
UGATE2 UGATE2
(50V/Div) VIN = 19V, VPVCC = 5V, IOUT = 50A (50V/Div) VIN = 19V, VPVCC = 5V, IOUT = 50A

Time (1ms/Div) Time (1ms/Div)

Power Off from VCC Dynamic Output Voltage Control

VIN = 19V, VPVCC = 5V

PVCC DVID
(5V/Div) (2V/Div)

VOUT VOUT
(1V/Div) (1V/Div)

UGATE1 UGATE1
(50V/Div) (50V/Div)
UGATE2 UGATE2
(50V/Div) VIN = 19V, VPVCC = 5V, IOUT = 50A (50V/Div) IOUT = 50A, VREFIN = 0.6V to 1.2V

Time (1ms/Div) Time (50μs/Div)

Dynamic Output Voltage Control Load Transient Response

VIN = 19V, VPVCC = 5V

DVID VOUT
(2V/Div) (100mV/Div)

VOUT IOUT
(1V/Div) (50A/Div)

UGATE1 UGATE2
(50V/Div) (50V/Div)
UGATE2 UGATE1
(50V/Div) IOUT = 50A, VREFIN = 1.2V to 0.6V (50V/Div) VIN = 19V, VPVCC = 5V

Time (50μs/Div) Time (20μs/Div)

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8815A-00 March 2014

10
 RT8815A

Load Transient Response OVP

VOUT
(100mV/Div)
VVSNS
(1V/Div)
IOUT
(50A/Div)
UGATE1
(20V/Div)
UGATE2
(50V/Div)
UGATE1 LGATE1
(50V/Div) VIN = 19V, VPVCC = 5V
(5V/Div) VIN = 19V, VPVCC = 5V, No Load

Time (20μs/Div) Time (100μs/Div)

UVP OCP

IL1
(20A/Div)
VVSNS
(1V/Div)
IL2
(20A/Div)
UGATE1 UGATE1
(20V/Div) (50V/Div)

LGATE1 LGATE1
(5V/Div) (10V/Div)
VIN = 19V, VPVCC = 5V, IOUT = 40A VIN = 19V, VPVCC = 5V

Time (20μs/Div) Time (20μs/Div)

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

11
RT8815A
Application Information
The RT8815A is a 2/1 phase synchronous Buck PWM PWM Operation
controller with integrated drivers which is optimized for The RT8815A integrates a Constant-On-Time (COT) PWM
high performance graphic microprocessor and computer controller, and the controller provides the PWM signal
applications. A COT (Constant-On-Time) PWM controller which relies on the output ripple voltage comparing with
and two MOSFET drivers with internal bootstrap diodes internal reference voltage as shown in Figure 4. Referring
are integrated so that the external circuit can be easily to the function block diagram of TON Genx, the
designed and the number of component is reduced. synchronous UGATE driver is turned on at the beginning
of each cycle. After the internal one-shot timer expires,
The topology solves the poor load transient response timing
the UGATE driver will be turned off. The pulse width of
problems of fixed-frequency mode PWM and avoids the
this one-shot is determined by the converter's input voltage
problems caused by widely varying switching frequencies
and the output voltage to keep the frequency fairly constant
in conventional constant on-time and constant off-time
over the input voltage and output voltage range. Another
PWM schemes.
one-shot sets a minimum off-time. For 2-phase application,
The IC supports dynamic mode transition function with
the duty cycle is limited as less than 50%.
various operating states, which include dual-phase with VOUT
CCM operation and single phase with diode emulation
VPEAK
mode. These different operating states make the system
efficiency as high as possible. VOUT

The RT8815A provides a PWM-VID dynamic control VVALLEY

VREF
operation in which the feedback voltage is regulated and
t
tracks external input reference voltage. It also features 0 tON
complete fault protection functions including over-voltage, Figure 4. Constant On-Time PWM Control
under-voltage and current limit.
On-Time Control
Remote Sense The on-time one-shot comparator has two inputs. One
The RT8815A uses the remote sense path (VSNS and input monitors the output voltage, while the other input
RGND) to overcome voltage drops in the power lines by samples the input voltage and converts it to a current.
sensing the voltage directly at the end of GPU. Normally, This input voltage proportional current is used to charge
to protect remote sense path disconnecting, there are an internal on-time capacitor. The on-time is the time
two resistors (RLocal) connecting between local sense path required for the voltage on this capacitor to charge from
and remote sense path. That is, in application with remote zero volts to VOUT, thereby making the on-time of the high-
sense, the RLocal is recommended to be 10Ω to 100Ω. If side switch directly proportional to output voltage and
no need of remote sense, the RLocal is recommended to inversely proportional to input voltage. The implementation
be 0Ω. results in a nearly constant switching frequency without
VIN the need for a clock generator.
2  VOUT  3.2p
BOOT
TON =  RTON
UGATE Local Sense Path VIN  0.5
PHASE VOUT and then the switching frequency FS is :
FS = VOUT /  VIN  TON 
LGATE

RLocal+ RLocal- RTON is a resistor connected from the VIN to TON pin. The
RGND GPU
+ value of RTON can be selected according to Figure 5.
-
VSNS GPU
Remote Sense Path The recommend operation frequency range is 150kHz to
Figure 3. Output Voltage Sensing 600kHz.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8815A-00 March 2014

12
 RT8815A
800 Diode-Emulation Mode
In diode-emulation mode, the RT8815A automatically
700
reduces switching frequency at light-load conditions to
Frequency (kHz)1

600
maintain high efficiency. As the output current decreases
from heavy-load condition, the inductor current is also
500 reduced, and eventually comes to the point that its valley
touches zero current, which is the boundary between
400
continuous conduction and discontinuous conduction
300
modes. By emulating the behavior of diodes, the low-side
MOSFET allows only partial of negative current when the
200 inductor freewheeling current reaches negative value. As
150 250 350 450 550 650 750
the load current is further decreased, it takes a longer
RTON (kΩ)
time to discharge the output capacitor to the level that
Figure 5. Frequency vs. RTON requires the next “ON” cycle. In reverse, when the output
current increases from light load to heavy load, the
Active Phase Circuit setting
switching frequency increases to the preset value as the
The RT8815A operates as active phase being 2 phase,
inductor current reaches the continuous conduction
and 1 phase. When programming active phase being 1
condition. The transition load point to the light load
phase, The UGATE2, BOOT2, PHASE2, and LGATE 2
operation is shown in Figure 6 and can be calculated as
pins are floating. As programming active phase being 1
follows :
phase, the voltage setting at PSI pin can't higher than (V  VOUT )
ILOAD(SKIP)  IN  t ON
1.8V. 2L
where tON is on-time.
Mode Selection
IL
The RT8815A can operate into 2 phases with force CCM, Slope = (VIN - VOUT) / L
1 phase with force CCM, and 1 phase with DEM according IPEAK
to PSI voltage setting. If PSI voltage is pulled below 0.8V,
the controller will operate into 1 phase with DEM. In DEM ILOAD = IPEAK/2
operation, the RT8815A automatically reduces the
operation frequency at light load conditions for saving power
t
loss. If PSI voltage is pulled between 1.2V to 1.8V, the 0 tON
controller will switch operation into 1 phase with force Figure 6. Boundary condition of CCM/DEM
CCM. If PSI voltage is pulled between 2.4V to 5.5V, the
The switching waveforms may be noisy and asynchronous
controller will switch operation into 2 phase with force
in light loading diode-emulation operation condition, but
CCM. The operation mode is summarized in Table 1.
this is a normal operating condition that results in high
Moreover, the PSI pin is valid after POR of VR.
light-load efficiency. Trade-off in DEM noise vs. light-load
Table 1 efficiency is made by varying the inductor value. Generally,
Operation Phase Number PSI Voltage Setting low inductor values produce a broad high efficiency range
1 phase with DEM 0V to 0.8V vs. load curve, while higher values result in higher full load
1 phase with CCM 1.2V to 1.8V efficiency (assuming that the coil resistance remains fixed)
2 phase with CCM 2.4V to 5.5V and less output voltage ripple. The disadvantages for using
higher inductor values include larger physical size and
degraded load-transient response (especially at low input
voltage levels).

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

13
RT8815A
Forced-CCM Mode
The low noise, forced-CCM mode disables the zero- EN

crossing comparator, which controls the low-side switch PVCC

on-time. This causes the low-side gate drive waveform to VOUT 4V
be the complement of the high-side gate drive waveform. Internal SS
This in turn causes the inductor current to reverse at light
loads as the PWM loop to maintain a duty ratio VOUT/VIN. Internal SSOK
The benefit of forced-CCM mode is to keep the switching
frequency fairly constant.
LGATE

Enable and Disable

UGATE
The EN pin is a high impedance input that allows power
sequencing between the controller bias voltage and another PGOOD
voltage rail. The RT8815A remains in shutdown if the EN Normal
Soft
Soft-Start
Discharged
pin is lower than 800mV. When the EN voltage rises above Current Limit
Programming
the 1.6V high level threshold, the RT8815A will begin a
Figure 7. Soft-Start Sequence
new initialization and soft-start cycle.
Power Good Output (PGOOD)
Power On Reset (POR), UVLO
The PGOOD pin is an open-drain output, and it requires a
Power On Reset (POR) occurs when VPVCC rises above
pull-up resistor. During soft-start, the PGOOD is held low
to approximately 4.1V (typical), the RT8815A will reset
and is allowed to be pulled high after VOUT achieved over
the fault latch circuit and prepare for PWM operation. When
UVP threshold and under OVP threshold. In additional, if
the VPVCC is lower than 3.8V (typical), the Under Voltage
any protection is triggered during operation, the PGOOD
Lockout (UVLO) circuitry inhibits switching by keeping
will be pulled low immediately.
UGATE and LGATE low.
PWM VID and Dynamic Output Voltage Control
Soft-Start
The RT8815A features a PWM VID input for dynamic output
The RT8815A provides internal soft-start function. The soft-
voltage control as shown in Figure 8, which reduces the
start function is used to prevent large inrush current and
number of device pin and enables a wide dynamic voltage
output voltage overshoot while the converter is being
range. The output voltage is determined by the applied
powered up. The soft-start function automatically begins
voltage on the REFIN pin. The PWM duty cycle determines
once the chip is enabled. There is a delay time around
the variable output voltage at REFIN.
1.1ms from EN goes high to VOUT begins to ramp-up.
An internal current source charges the internal soft-start VID
PWM IN
capacitor so that the internal soft-start voltage ramps up VREF

linearly The output voltage will track the internal soft-start RREF1
RREFADJ REFADJ
voltage during the soft-start interval. After the internal soft- Buffer
CREFADJ
start voltage exceeds the REFIN voltage, the output voltage RBOOT
RGND
no longer tracks the internal soft-start voltage but follows RGND
REFIN
the REFIN voltage. Therefore, the duty cycle of the UGATE
RSTANDBY RREF2 CREFIN
signal as well as the input current at power up are limited.
RGND RGND
The soft-start process is finished until the internal SSOK Standby Q1
go high and protection is not triggered. Figure 7 shows Mode Control
RGND
the soft-start sequence. Figure 8. PWM VID Analog Circuit Diagram
Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8815A-00 March 2014

14
 RT8815A
With the external circuit and VID control signal, the By choosing RREF1, RREF2, and RBOOT, the RSTANDBY can
controller provides three operation modes shown as Figure be calculated by the following equation :
9. RSTANDBY 

NORMAL RREF2  RREF1  RBOOT   VSTANDBY

RREF2  VREF  VSTANDBY  RREF1  RREF2  RBOOT 
VREF MODE
BOOT BOOT
MODE MODE STANDBY
MODE RREF1
REFIN
PWM VID
Normal Mode
STANDBY If the VID pin is driven by a PWM signal and switch Q1 is
CONTROL
disabled as shown in Figure 9, the VREFIN can be adjusted
Figure 9. PWM VID Time Diagram from Vmin to Vmax, where Vmin is the voltage at zero percent
PWM duty cycle and Vmax is the voltage at one hundred
Boot Mode percent PWM duty cycle. The Vmin and Vmax can be set
VID is not driven, and the buffer output is tri-state. At this by the following equations :
time, turn off the switch Q1 and connect a resistor divider RREF2
Vmin = VVREF 
as shown in Figure 9 that can set the REFIN voltage to be RREF2  RBOOT
VBOOT as the following equation : RREFADJ // (RBOOT  RREF2 )

RREF1  RREFADJ // (RBOOT  RREF2 )
VBOOT = VVREF   
RREF2

 RREF1  RREF2  RBOOT  RREF2
Vmax = VVREF 
where VVREF = 2V (typ.) (RREF1 // RREFADJ )  RBOOT  RREF2
Choose RREF2 to be approximately 10kΩ, and the RREF1
By choosing RREF1, RREF2, and RBOOT, the RREFADJ can be
and RBOOT can be calculated by the following equations :
calculated by the following equation :
RREF2   VVREF  VBOOT 
RREF1  RBOOT  RREF1  Vmin
VBOOT RREFADJ 
Vmax  Vmin
RREF2   VVREF  VBOOT 
RREF1   RBOOT
VBOOT The relationship between VID duty and VREFIN is shown in
RREF2   VVREF  VBOOT  Figure 10, and VOUT can be set according to the calculation
RBOOT   RREF1
VBOOT below :
VOUT = Vmin  N  VSTEP
where VSTEP is the resolution of each voltage step 1 :
Standby Mode (V  Vmin )
VSTEP = max
An external control can provide a very low voltage to meet Nmax
VOUT operating in standby mode. If the VID pin is floating where Nmax is the number of total available voltage steps
and switch Q1 is enabled as shown in Figure 9, the REFIN and N is the number of step at a specific VOUT. The dynamic
pin can be set for standby voltage according to the voltage VID period (Tvid = Tu x Nmax) is determined by the
calculation below : unit pulse width (Tu) and the available step number (Nmax).
VSTANDBY = VVREF The recommended Tu is 27ns.
RREF2 // RSTANDBY

RREF1  RBOOT  (RREF2 // RSTANDBY )

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

15
RT8815A
VREFIN IL
N = Nmax
Vmax IL,PEAK

N=2 ILOAD
N=1
Vmin IL,VALLEY
VID Duty
0 0.5 1
t
0
N=1
Figure 11. “Valley” Current Limit
VID Input
Tu
In an over-current condition, the current to the load exceeds
N=2 the average output inductor current. Thus, the output
VID Input voltage falls and eventually crosses the under-voltage
Tvid = Nmax x Tu
protection threshold, inducing IC shutdown.
Figure 10. PWM VID Analog Output
Current Limit Setting

VID Slew Rate Control Current limit threshold can be set by a resistor (ROCSET)
between LGATE1 and GND. Once PVCC exceeds the
In RT8815A, the VREFIN slew rate is proportional to PWM
POR threshold and chip is enabled, an internal current
VID duty, the rising time and falling time are the same. In
source IOCSET flows through ROCSET. The voltage across
normal mode, the VREFIN slew rate SR can be estimated
ROCSET is stored as the current limit protection threshold
by CREFADJ or CREFIN as the following equation :
VOCSET. The threshold range of VOCSET is 50mV to 400mV.
When choose CREFADJ : After that, the current source is switched off.
(VREFIN_Final  VREFIN_initial )  80%
SR = ROCSET can be determined using the following equation :
2.2RSR CREFADJ
RSR = (RREF1 // RREFADJ ) // (RBOOT +RREF2 ) ROCSET =
IVALLEY  RLGATEDS(ON)   40mV
IOCSET

When choose CREFIN : where IVALLEY represents the desired inductor limit current
(VREFIN_Final  VREFIN_initial )  80% (valley inductor current) and IOCSET is current limit setting
SR = current which has a temperature coefficient to compensate
2.2RSR CREFIN
RSR = RREF1 // RREFADJ   RBOOT  // RREF2 the temperature dependency of the RDS(ON).
If ROCSET is not present, there is no current path for IOCSET
The recommend SR is estimated by CREFADJ. to build the current limit threshold. In this situation, the
current limit threshold is internally preset to 400mV.
Current Limit
The RT8815A provides cycle-by-cycle current limit control Negative Current Limit
by detecting the PHASE voltage drop across the low-side
The RT8815A supports cycle-by-cycle negative current
MOSFET when it is turned on. The current limit circuit
limit. The absolute value of negative current limit threshold
employs a unique “valley” current sensing algorithm as
is the same with the positive current limit threshold. If
shown in Figure 11. If the magnitude of the current sense
negative inductor current is rising to trigger negative current
signal at PHASE is above the current limit threshold, the
limit, the low-side MOSFET will be turned off and the
PWM is not allowed to initiate a new cycle.
current will flow to input side through the body diode of
In order to provide both good accuracy and a cost effective the high-side MOSFET. At this time, output voltage tends
solution, the RT8815A supports temperature compensated to rise because this protection limits current to discharge
MOSFET RDS(ON) sensing. the output capacitor. In order to prevent shutdown because

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8815A-00 March 2014

16
 RT8815A
of over-voltage protection, the low-side MOSFET is turned MOSFET Gate Driver
on again 400ns after it is turned off. If the device hits the The RT8815A integrates high current gate drivers for the
negative current limit threshold again before output voltage MOSFETs to obtain high efficiency power conversion in
is discharged to the target level, the low-side MOSFET synchronous Buck topology. A dead-time is used to prevent
is turned off and process repeats. It ensures maximum the crossover conduction for high-side and low-side
allowable discharge capability when output voltage MOSFETs. Because both the two gate signals are off
continues to rise. On the other hand, if the output is during the dead-time, the inductor current freewheels
discharged to the target level before negative current limit through the body diode of the low-side MOSFET. The
threshold is reached, the low-side MOSFET is turned off, freewheeling current and the forward voltage of the body
the high-side MOSFET is then turned on, and the device diode contribute power losses to the converter. The
keeps normal operation. RT8815A employs adaptive dead time control scheme to
ensure safe operation without sacrificing efficiency.
Current Balance
Furthermore, elaborate logic circuit is implemented to
The RT8815A implements current balance mechanism in prevent cross conduction. For high output current
the current loop. The RT8815A senses per phase current applications, two power MOSFETs are usually paralleled
signal and compares it with the average current. If the to reduce RDS(ON). The gate driver needs to provide more
sensed current of any particular phase is higher than the current to switch on/off these paralleled MOSFETs. Gate
average current, the on-time of this phase will be driver with lower source/sink current capability results in
decreased. longer rising/falling time in gate signals and higher
The current balance accuracy is major related with on- switching loss. The RT8815A embeds high current gate
resistance of low-side MOSFET (RLG,DS(ON)). That is, in drivers to obtain high efficiency power conversion.
practical application, using lower RLG,DS(ON) will reduce
the current balance accuracy. Inductor Selection
Inductor plays an importance role in step-down converters
Output Over-Voltage Protection (OVP) because the energy from the input power rail is stored in
The output voltage can be continuously monitored for over- it and then released to the load. From the viewpoint of
voltage protection. If REFIN voltage is lower than 1.33V, efficiency, the DC Resistance (DCR) of inductor should
the over voltage threshold follows to absolute over voltage be as small as possible to minimize the copper loss. In
2V. If REFIN voltage is higher than 1.33V, the over voltage additional, the inductor occupies most of the board space
threshold follows relative over voltage 1.5 x VREFIN. When so the size of it is important. Low profile inductors can
OVP is triggered, UGATE goes low and LGATE is forced save board space especially when the height is limited.
high. The RT8815A is latched once OVP is triggered and However, low DCR and low profile inductors are usually
can only be released by PVCC or EN power on reset. A not cost effective.
5μs delay is used in OVP detection circuit to prevent false Additionally, higher inductance results in lower ripple
trigger. current, which means the lower power loss. However, the
inductor current rising time increases with inductance value.
Output Under-Voltage Protection (UVP)
This means the transient response will be slower. Therefore,
The output voltage can be continuously monitored for under-
the inductor design is a trade-off between performance,
voltage protection. When the output voltage is less than
size and cost.
40% of its set voltage, under voltage protection is triggered
and then all UGATE and LGATE gate drivers are forced In general, inductance is designed to let the ripple current
low. There is a 3μs delay built in the UVP circuit to prevent ranges between 20% to 40% of full load current. The
false transitions. During soft-start, the UVP blanking time inductance can be calculated using the following equation :
is equal to PGOOD blanking time.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

17
RT8815A
VIN  VOUT V However, the small duty cycle means the low-side
Lmin =  OUT
fSW  k  IOUT_rated VIN MOSFET is on for most of the switching cycle. Therefore,
where k is the ratio between inductor ripple current and the conduction loss tends to dominate the total power
rated output current. loss of the converter. To improve the overall efficiency, the
MOSFETs with low RDS(ON) are preferred in the circuit
Input Capacitor Selection
design. In some cases, more than one MOSFET are
Voltage rating and current rating are the key parameters connected in parallel to further decrease the on-state
in selecting input capacitor. Generally, input capacitor has resistance. However, this depends on the low-side
a voltage rating 1.5 times greater than the maximum input MOSFET driver capability and the budget.
voltage is a conservatively safe design.
Thermal Considerations
The input capacitor is used to supply the input RMS
current, which can be approximately calculated using the For continuous operation, do not exceed absolute
following equation : maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
VOUT  VOUT 
IRMS = IOUT   1
VIN  VIN  package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
The next step is to select proper capacitor for RMS current
maximum power dissipation can be calculated by the
rating. Use more than one capacitor with low Equivalent
following formula :
Series Resistance (ESR) in parallel to form a capacitor
bank is a good design. Besides, placing ceramic capacitor PD(MAX) = (TJ(MAX) − TA) / θJA
close to the Drain of the high-side MOSFET is helpful in where TJ(MAX) is the maximum junction temperature, TA is
reducing the input voltage ripple at heavy load. the ambient temperature, and θJA is the junction to ambient
thermal resistance.
Output Capacitor Selection
For recommended operating condition specifications, the
The output filter capacitor must have ESR low enough to
maximum junction temperature is 125°C. The junction to
meet output ripple and load transient requirement, yet have
ambient thermal resistance, θJA, is layout dependent. For
high enough ESR to satisfy stability requirements. Also,
WQFN-20L 3x3 package, the thermal resistance, θJA, is
the capacitance must be high enough to absorb the inductor
30°C/W on a standard JEDEC 51-7 four-layer thermal test
energy going from a full load to no load condition without
board. The maximum power dissipation at TA = 25°C can
tripping the OVP circuit. Organic semiconductor
be calculated by the following formula :
capacitor(s) or special polymer capacitor(s) are
recommended. P D(MAX) = (125°C − 25°C) / (30°C/W) = 3.33W for
WQFN-20L 3x3 package
MOSFET Selection
The maximum power dissipation depends on the operating
The majority of power loss in the step-down power ambient temperature for fixed T J(MAX) and thermal
conversion is due to the loss in the power MOSFETs. For resistance, θJA. The derating curve in Figure 12 allows
low voltage high current applications, the duty cycle of the designer to see the effect of rising ambient temperature
the high-side MOSFET is small. Therefore, the switching on the maximum power dissipation.
loss of the high-side MOSFET is of concern. Power
MOSFETs with lower total gate charge are preferred in
such kind of application.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8815A-00 March 2014

18
 RT8815A
4.0 Layout Considerations
Four-Layer PCB
Layout is very important in high frequency switching
Maximum Power Dissipation (W)1

3.5
converter design. If designed improperly, the PCB could
3.0 radiate excessive noise and contribute to the converter
2.5 instability. Following layout guidelines must be considered
before starting a layout for RT8815A.
2.0
 Place the RC filter as close as possible to the PVCC
1.5
pin.
1.0
 Keep current limit setting network as close as possible
0.5 to the IC. Routing of the network should avoid coupling
0.0 to high voltage switching node.
0 25 50 75 100 125
 Connections from the drivers to the respective gate of
Ambient Temperature (°C)
the high-side or the low-side MOSFET should be as
Figure 12. Derating Curve of Maximum Power short as possible to reduce stray inductance.
Dissipation  All sensitive analog traces and components such as
VSNS, RGND, EN, PSI, VID, PGOOD, VREF, TON
VREFADJ, VREFIN and TSNS should be placed away
from high voltage switching nodes such as PHASE,
LGATE, UGATE, or BOOT nodes to avoid coupling. Use
internal layer(s) as ground plane(s) and shield the
feedback trace from power traces and components.
 Power sections should connect directly to ground
plane(s) using multiple vias as required for current
handling (including the chip power ground connections).
Power components should be placed to minimize loops
and reduce losses.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8815A-00 March 2014 www.richtek.com

19
RT8815A
Outline Dimension

1 1

2 2

DETAIL A
Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.150 0.250 0.006 0.010
D 2.900 3.100 0.114 0.122
D2 1.650 1.750 0.065 0.069
E 2.900 3.100 0.114 0.122
E2 1.650 1.750 0.065 0.069
e 0.400 0.016
L 0.350 0.450 0.014 0.018

W-Type 20L QFN 3x3 Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

www.richtek.com DS8815A-00 March 2014

20