Sparcengine™Ultra™Axi: Oem Technical Reference Manual July 1 9 9 8

SPARCengine™Ultra™AXi
OEM technical
reference manual
July
1998
SPARCengine™ Ultra™ AXi
OEM Technical Manual
Sun Microsystems, Inc.

901 San Antonio Road
Palo Alto, CA 94303 USA
800-681-8845
Part No. 805-3158-02

August 1998
©1998 Sun Microsystems, Inc. All Rights reserved.
THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED “AS IS” WITHOUT ANY EXPRESS REPRESENTATIONS OF WARRANTIES. IN ADDITION, SUN
MICROSYSTEMS, INC. DISCLAIMS ALL IMPLIED REPRESENTATIONS AND WARRANTIES, INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTURAL PROPERTY RIGHTS.
This document contains proprietary information of Sun Microsystems, Inc. or under license from third parties. No part of this document may be reproduced in any form or by
any means or transferred to any third party without the prior written consent of Sun Microsystems, Inc.
Sun, Sun Microsystems, the Sun Logo, SPARCengine, Ultra, Ultra AXi, Solaris, OpenBoot are trademarks or registered trademarks of Sun Microsystems, Inc. in the United States
and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the United States and other
countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems, Inc.
The information contained in this document is not designed or intended for use in on-line control of aircraft, aircraft navigation or aircraft communications; or in the design,
construction, operation or maintenance of any nuclear facility. Sun disclaims any express or implied warranty of fitness for such uses.
Please
Recycle
Electromagnetic and Safety Information
Compliance with EMI and safety regulations for products including the
SPARCengine Ultra AXi is entirely the responsibility of OEMs. The SPARCengine
Ultra AXi is expected to pass FCC class B tests in a representative enclosure. The
printed wiring boards within the product are manufactured by UL recognized
manufacturers and have a flammability rating of 94-V0 or better.
Note that the product includes a lithium battery, the disposal of which is subject to
regulation in some jurisdictions.
The SPARCengine Ultra AXi is intended for inclusion in systems meeting the
following regulations:
■ USA EMC FCC Class B
■ USA Safety UL 1950
■ Canadian EMC IC Class B

■ Canadian Safety CSA C22.2 No 950
■ European Union EMC CE Mark EN55022 & EN50082-1

■ European Union Safety CE Mark EN60950
■ Japanese EMC VCCI Class 2
Preface iii
Preface
The SPARCengine Ultra AXi product is a highly integrated, high performance

motherboard developed for the use of OEMs who want to develop products that
have UltraSPARC performance in a PC-ATX environment.
The SPARCengine Ultra AXi OEM Technical Manual describes the functions of the
SPARCengine Ultra AXi motherboard, its controls, indicators, connectors and
pinouts, boot sequence, diagnostics, troubleshooting, installation and removal
procedures, and its specifications. It also provides some of the critical mechanical
drawings for the motherboard and CPU module.
Who Should Use This Book

The SPARCengine Ultra AXi OEM Technical Manual is written for computer hardware
engineers, system programmers, computer technicians and others involved in the
integration of the Ultra AXi motherboard. References are provided for further
details.
How This Book Is Organized

The SPARCengine Ultra AXi OEM Technical Manual is organized as follows:
Chapter 1, “Introduction,” explains the capabilities and major features of the Ultra
AXi motherboard.
Chapter 2, “Specification Summary” provides a summary of specifications of the

Ultra AXi motherboard.
iv SPARCengine Ultra AXi OEM Technical Manual • August 1998

Chapter 3, “Functional Description,” provides a short description of the function of
each component on the Ultra AXi motherboard.
Chapter 4, Sequence of Events at Power Up,” details the sequence of events that
occur at Power Up and discusses interaction with OBP and Solaris where applicable.
Appendix A, “Jumpers, Headers, Connectors and Adapters,” describes the jumper

settings, header pinouts, connector pinouts, and adapters on the Ultra AXi
motherboard.
Appendix B, “Mechanical Drawings and Thermal Data,” provides the drawings for
the I/O panel, CPU module, Ultra AXi motherboard, Creator Graphics module and
a thermal map of the motherboard.
Appendix C, “Assembly and Installation,” describes how to assemble and install a

motherboard in a typical ATX-type enclosure and describes how to install the
required software and initially start the system.
Appendix D, “Schematics,” presents schematic sheets on certain ASICs and all

external connectors on the Ultra AXi motherboard.
Appendix E, “Enclosures, Power Supplies, Memory, Peripheral Devices and PCI

Cards,” this is a sample of the Internet Web Site supporting the Ultra AXi
motherboard.
Appendix F, “OpenBoot Firmware,” provides information on the OpenBoot

Firmware used in the Ultra AXi system.
Appendix G, “System Software, Solaris 2.6 Operating Environment” provides

information on the Solaris 2.6 Software used in the Ultra AXi system.
Appendix H, “System Software, SunVTS Validation Test Suite” provides

information on the SunVTS suitable for the Ultra AXi system based on SunVTS 2.1
Ultra AXi version.
Related References
System Architecture:
■ The SPARC Architecture Manual, Version 9, David L. Weaver and Tom Germond,
editors, PTR Prentice Hall
■ PCI System Architecture, by Shanley and Anderson, MindShare Press
Specifications and Standards

■ ATX Specification Version 2.01
(http://www.data-tech.co.za/ATX-FORM.htm)
Preface v
■ PCI Local Bus Specification, Revision 2.1, PCI Special Interest Group, Portland
■ IEEE Standard 1275-1994, Standard For Boot (Initialization, Configuration) Firmware,
Core Practices and Requirements
■ IEEE Standard 1275.1-1994, Standard For Boot (Initialization, Configuration) Firmware,
ISA Supplement for IEEE P1754 (SPARC)
■ IEEE Standard P1275.6/D4, Standard For Boot (Initialization, Configuration) Firmware,
64 Bit Extensions
■ PCI Bus Binding to IEEE 1275-1994, Standard for Boot (Initialization, Configuration)
Firmware, Revision 1.0, 14 April 1994, Prepared by the Open Firmware Task Force
of the PCI Alliance
Integrated Circuit Specifications:

■ UltraSPARC IIi User’s Manual
(805-0087-01)
■ SME1040 Highly Integrated 64-bit RISC Processor, PCI Interface Data Sheet
(805-0086-02)
■ STP2003QFP PCI Input Output Controller (PCIO) User’s Manual
(802-7837-01)
■ STP2210QFP Reset/Interrupt/Clock Controller (RIC) User’s Manual
(805-0167-01)
■ SME2411BGA-66 Advanced PCI Bridge (APB) User’s Manual
(805-1251-01)
Other Sun Publications

■ Open Boot 3.X Command Reference Manual
(802-5837-10)
■ Open Boot 3.X Command Supplement for PCI (Solaris 2.5.1, 8/97)
(805-1627-10)
■ Writing Fcode 3.x Programs
(802-6287-10)
■ ASM Utilization and Calibration Application Note
(805-4877-01)
■ Sun VTS 2.1 Users Guide
(802-7299-10)
■ SunVTS 2.1 Test Reference Manual
(802-7300-10)
vi SPARCengine Ultra AXi OEM Technical Manual • August 1998

What Typographic Changes Mean
The following table describes the typographic changes used in this book.
TABLE P-1 Typographic Conventions
Typeface or
Symbol Meaning Example
AaBbCc123 The names of commands, files, Edit your .login file.

and directories; on-screen Use ls -a to list all files.
computer output machine_name% You have mail.
AaBbCc123 What you type, contrasted with machine_name% su

on-screen computer output Password:
AaBbCc123 Command-line placeholder: To delete a file, type rm filename.
replace with a real name or
value
AaBbCc123 Book titles, new words or Read Chapter 6 in User’s Guide. These
terms, or words to be are called class options.
emphasized You must be root to do this.
Prompts in Command Examples

The following table shows the default system prompt and superuser prompt for the
C shell, Bourne shell, and Korn shell and OBP.
TABLE P-2 Prompts
Shell Prompt
C shell prompt machine_name%

C shell superuser prompt machine_name#
Bourne shell and Korn shell $
prompt
Bourne shell and Korn shell #
superuser prompt
OBP Prompt ok
Preface vii
viii SPARCengine Ultra AXi OEM Technical Manual • August 1998
Contents
Appendix
1. Introduction 1-1
1.1 Features 1-3
1.2 Determination of Serial Number and Version 1-5
1.2.1 Motherboard 1-5
1.2.2 CPU Module 1-6
1.2.3 Firmware 1-6
1.2.4 Software 1-6
1.3 Technical Support and Warranty 1-7
1.4 Independent Hardware Vendors (IHV) 1-7
2. Specification Summary 2-1

2.1 Functional Specifications 2-1
2.1.2 Main Memory Modules 2-2
2.1.3 UPA64S Interface (Optional FFB) 2-3
2.1.4 Ultra-Wide SCSI Interface (SYM53C876) 2-3
2.1.5 Ethernet 10/100 BASE-T Interface 2-4
Contents ix
2.1.6 PCI Connectors 2-5
2.1.7 Sun Keyboard Mouse Interface 2-5
2.1.8 PS/2 Keyboard Interface 2-6
2.1.9 PS/2 Mouse Interface 2-6
2.1.10 Parallel Port Interface 2-6
2.1.11 Serial Port Interface 2-6
2.1.12 Floppy Disk Drive Interface 2-7
2.1.13 Non-Volatile Memory, Time-of-Day 2-7
2.1.14 Advanced System Monitoring 2-8
2.1.15 Power On-Off Switch (front of enclosure) 2-9
2.1.16 Speaker (enclosure mounted) 2-10
2.1.17 Reset Switch (front of enclosure) 2-10
2.2 Power Requirements 2-10
2.3 Mechanical 2-11
2.4 Reliability 2-11
2.5 Environmental 2-12
2.6 EMI Compliance 2-12
2.7 U.L. Recognition 2-12
3. Functional Description 3-1

3.1 General Information 3-1
3.1.1 Terminology 3-2
3.1.2 Block Diagram 3-3
3.2 Layout Diagram 3-4
3.3 SPARCengine Ultra AXi Motherboard 3-5
3.3.2 Main Memory Modules 3-5
3.3.3 Flash Memory 3-6
3.3.4 TOD/NVRAM 3-6
3.3.5 FFB2 Graphics 3-6
x Contents
3.3.6 Communication Ports 3-6
3.3.7 Printer Port 3-7
3.3.8 Sun Keyboard and Mouse 3-7
3.3.9 PS/2 Keyboard and Mouse 3-7
3.3.10 Floppy Drive 3-7
3.3.11 EtherNet Port 3-8
3.3.12 External and Internal SCSI Interface 3-8
3.3.13 PCI Bus Connectors 3-8
3.3.14 Memory Bus 3-8
3.3.15 UPA64S Bus 3-9
3.3.16 PCI 66 Bus 3-9
3.3.17 EBus2 3-9
3.4 Advanced System Monitoring (ASM) 3-9
3.4.1 Temperature Monitoring Points 3-10
3.4.2 Voltage Monitoring Nodes 3-10
3.4.3 Fan Control and Monitoring 3-10
3.4.4 OBP Functions for ASM 3-10
3.4.5 Solaris Driver Functions for ASM 3-11
3.5 Miscellaneous Information 3-12
4. Sequence of Events at Power Up 4-1

4.1 Configuration 4-1
4.2 Reset Cautions 4-3
A. Jumpers, Headers, Connectors and Adapters A-1

A.1 Jumpers A-3
A.2 Headers A-4
A.2.1 Reset Switch Header J1501 A-5
A.2.2 Power On LED Header J1990 A-5
Contents xi
A.2.3 PS/2 Mouse Header J2500 A-5
A.2.4 PS/2 Keyboard Header J2501 A-6
A.2.5 PS/2 Speaker Header J3201 A-6
A.2.6 Power On-Off Switch Header J3301 A-7
A.2.7 Reserved (Do Not Use)J3302 A-7
A.2.8 12V Back Fan HeaderJ3602 A-7
A.2.9 12V Front Fan HeaderJ3603 A-7
A.3 Connectors A-8
A.3.1 ATX Power Connector J1901 A-8
A.3.2 Memory DIMMs J0301, J0302, J0303, J0304
J0401, J0402, J0403, J0404 A-9
A.3.3 UltraSPARC Module (Memory and UPA64S) ConnectorJ0101
A-10
A.3.4 UltraSPARC Module (PCI-66) ConnectorJ0102 A-13
A.3.5 UPA64S (Vertical FFB) ConnectorJ0601 A-15
A.3.6 PCI 32-Bit Connectors J2001, J2002, J2003
J2101, J2102, J2103 A-18
A.3.7 Internal SCSI ConnectorJ1001 A-19
A.3.8 External SCSI ConnectorJ1003 A-20
A.3.9 Floppy Disk Drive Connector J1902 A-21
A.3.10 Serial Port Male Connector J1802 A-22
A.3.11 Parallel Port Female Connector J0901 A-23
A.3.12 EtherNet Transceiver Connector TPJ2301 A-24
A.3.13 Sun Keyboard and Mouse J0902 A-25
A.3.14 Adapters A-26
A.3.15 (PS/2) Keyboard and MouseJ2500 Mouse
AdapterJ2501 Keyboard A-26
A.3.16 Serial Port Channels A and B A-27
B. Mechanical Drawings B-1

B.1 Ultra AXi Motherboard Dimensions B-1
xii Contents
B.2 Height Profiles B-3
B.3 Back Panel Connections B-5
B.4 Thermal Map B-6
B.5 UltraSPARC IIi CPU Module Mechanical Drawings B-8
C. Assembly, Installation and Initial Start Up Procedures C-1

C.1 Before You Start C-1
C.1.1 Materials Required C-2
C.1.2 Power Budgeting C-3
C.1.3 Software Installation Information C-4
C.1.4 Tools Required C-5
C.2 Typical Assembly C-5
C.2.1 DIMM Configuration Considerations C-12
C.3 Initial Power-On and Firmware Update C-21
C.4 Software Installation C-22
C.5 System Aging Test C-23
D. Schematics D-1
E. Enclosures, Power Supplies, Peripheral Memory Devices and PCI Cards E-1
E.1 Independent Hardware Vendor (IHV) Device Information E-1
F. OpenBoot Firmware F-1

F.1 Minimum Requirements F-2
F.2 Additional OBP Features in Ultra AXi F-2
F.2.1 Additional Commands F-3
F.2.2 Additional Environment Variables F-3
F.3 Flash Memory and NVRAM Layout F-4
F.4 Power on Self-Test (POST) F-5
Contents xiii
F.5 OpenBoot Diagnostics (OB Diag) F-5
F.6 Entering the OBP Environment F-6
F.7 Selected OBP Commands F-7
F.8 Configuration Variables F-8
F.9 Device Tree F-10
F.10 PCI Probe Lists F-11
F.11 Device Aliases F-12
F.12 OBP Video Drivers F-13
F.12.1 Sun FFB Video Drivers F-13
F.12.2 PCI Video Drivers F-14
F.13 PS/2 Keyboard F-14
F.14 ASM Operation F-15
F.15 Field Upgrade of OBP F-15
F.15.1 Upgrading OBP When Operating in OBP F-16
F.15.2 Upgrading OBP When Operating in OS F-17
G. System Software
Solaris 2.6 Operating Environment G-1
G.1 Software Package G-1
G.1.1 Publications G-2
G.2 Technical Support G-2
G.3 Installation G-2
G.4 System Requirements G-2
G.5 Ultra AXi Platform Specifics G-3
G.5.1 Advanced System Monitoring (ASM) G-3
G.5.2 Video Drivers G-4
G.5.3 Set the Display Mode for OpenWindows or CDE G-5
G.5.4 PS/2 Keyboard Key Mapping G-7
G.5.5 PS/2 Mouse G-8
G.5.6 Speaker G-9
xiv Contents
G.6 Adding PCI Cards and Drivers G-9
G.6.1 To Install a PCI Card G-10
G.6.2 To Verify the Board is Seen by the System G-10
G.6.3 To Obtain Additional Assistance G-11
G.7 Language Versions G-11
H. System Software
SunVTS Validation Test Suite H-1
H.1 Distribution H-1
H.1.1 Obtaining Documentation from the Web H-1
H.2 System Requirements H-2
H.3 Installing SunVTS H-2
H.4 Configuring and Running SunVTS H-3
H.5 Error Messages H-3
H.6 Ultra AXi Specific Implementation H-4
H.7 SunVTS Test Reference Manual Table of Contents H-4
H.8 Loopback Connectors H-6
Contents xv
xvi Contents
Figures
FIGURE 1-1 Possible Configuration Examples 1-2
FIGURE 1-2 Motherboard Serial Number, Version Number and Date Code Locations 1-5
FIGURE 1-3 CPU Module Serial Number and Date Code Locations 1-6
FIGURE 3-1 Ultra AXi Motherboard Block Diagram 3-3
FIGURE 3-2 Ultra AXi Layout 3-4
FIGURE A-1 Ultra AXi Jumper, Header and Connector Layout A-2
FIGURE B-1 Ultra AXi Motherboard IO View B-1
FIGURE B-2 Ultra AXi Motherboard Top View B-2
FIGURE B-3 Height Profile Top View B-3
FIGURE B-4 Height Profile IO Side of Board B-4
FIGURE B-5 Height Profile from Module End of Board B-4

FIGURE B-6 IO Panel of the Ultra AXi Motherboard B-5
FIGURE B-7 Ultra AXi Motherboard Thermal Map B-6
FIGURE B-8 UltraSPARC IIi 333 MHz and 300 MHz Module B-8
FIGURE B-9 UltraSPARC IIi 270 MHz Module B-9
FIGURE B-10 UltraSPARC IIi Module B-10
FIGURE C-1 Ultra AXi IO Panel C-5
FIGURE C-2 Ultra AXi Motherboard Installation C-6
Figures xvii
FIGURE C-3 UltraSPARC IIi Module C-6
FIGURE C-4 CPU Module Hold Down Installation C-7
FIGURE C-5 Ultra AXi PS/2 Keyboard and Mouse Adapter C-8
FIGURE C-6 IO Panel Connector Panel Fasteners C-8
FIGURE C-7 Ultra AXi Hard Drive Installation C-9
FIGURE C-8 Ultra AXi Floppy Drive Installation C-9
FIGURE C-9 Ultra AXi CD ROM Installation C-10
FIGURE C-10 Ultra AXi DIMM Installation C-11
FIGURE C-11 DIMM Sockets Pair Assignments C-12
FIGURE C-12 Motherboard Power Connection C-16
FIGURE C-13 Floppy Drive Motherboard Connection C-16
FIGURE C-14 Internal SCSI Connector C-17
FIGURE C-15 Power On-Off Header C-18
FIGURE C-16 Power On LED Header C-18
FIGURE C-17 Speaker Header C-18
FIGURE C-18 Reset Switch header C-19
FIGURE C-19 Optional Fan Power Cable Motherboard Header C-19
FIGURE C-20 Optional Fan Power Cable Motherboard Header C-19
FIGURE C-21 ATI Video Boost PCI Card C-20
FIGURE F-1 OpenBoot Firmware Block Diagram F-1
FIGURE F-2 Ultra AXi CPU PROM Content Layout F-4
FIGURE F-3 Ultra AXi NVRAM Content Layout F-4
Figures xviii
Tables
TABLE 2-1 CPU Module Options 2-2
TABLE 4-1 Power Up Sequence 4-2
TABLE A-1 Motherboard Jumper Settings A-3

TABLE A-2 Header Summary A-4
TABLE A-3 Reset Switch Header A-5
TABLE A-4 Power-On LED Header A-5
TABLE A-5 PS/2 Mouse Headers A-5
TABLE A-6 PS/2 Keyboard Header A-6
TABLE A-7 PS/2 Speaker Header A-6
TABLE A-8 Power Enable Switch Header A-7
TABLE A-9 Reserved Header A-7
TABLE A-10 12V Optional Fan Header A-7
TABLE A-11 12V Optional Fan Header A-7
TABLE A-12 ATX Power Connector A-8
TABLE A-13 Memory DIMMs Pinouts A-9
TABLE A-14 UltraSPARC Module (Memory/UPA64S) Connector A-10
TABLE A-15 PCI 66 Connector Pinouts A-13
TABLE A-16 UPA64S (Vertical FFB) Connector Pinouts A-15
TABLE A-17 32-Bit PCI Connector Pinouts A-18
Tables xix
TABLE A-18 SCSI Internal Connector (Channel A) Pinouts A-19
TABLE A-19 SCSI External Connector (Channel B) Pinouts A-20
TABLE A-20 Floppy Connector A-21
TABLE A-21 DB-25 Serial Port Male Connector Pinouts A-22
TABLE A-22 Parallel Port Connector Pinouts A-23
TABLE A-23 Type RJ-45 Connector A-24
TABLE A-24 Sun Keyboard/Mouse Connector Pinouts A-25
TABLE A-25 PS/2 Mouse Connections A-26
TABLE A-26 PS/2 Keyboard Connections A-26
TABLE A-27 25-Pin Serial Channel A and B Connectors (Y Cable) A-27
TABLE B-1 Maximum Case Temperatures for Motherboard “Hot Spot” Components B-7
TABLE C-1 Materials Required (May be duplicated and used to record materials used) C-2
TABLE C-2 System and Peripheral Power Budgeting Requirements Table
(May be Duplicated and used as a worksheet to budget for a specific configuration) C-3
TABLE C-3 Installation Information Work Sheet
(May be Duplicated and Used to Record Build Data) C-4
TABLE C-4 DIMM Configurations C-13
TABLE C-5 Acceptable DIMM Locations 10-bit Column Address Mode C-15
TABLE C-6 Acceptable DIMM Locations 11-bit Column Address Mode C-15
TABLE D-1 List of Schematics D-1
TABLE F-1 Commonly Used Commands F-7
TABLE F-2 NVRAM Configuration Variables F-8
TABLE G-1 Default Sun to PS/2 Equivalent Keystrokes G-7
TABLE G-2 Equivalent Sun and PS/2 Mouse Buttons G-9
TABLE H-1 Memory Error Messages H-3
TABLE H-2 SunVTS Test Reference Manual Chapter Applicability H-4
Tables xx
CHAPTER 1
Introduction
The SPARCengine Ultra AXi is the latest member of Sun’s PCI-based platform
family. The Ultra AXi motherboard conforms to the ATX form factor, supports six
PCI expansion slots, and is designed to use industry standard peripheral devices.
SPARC architecture allows direct execution of Solaris operating environment in
native mode, with CPU speeds up to 333MHz. The SPARCengine Ultra AXi
motherboard makes it possible to build a general purpose computer using the
Solaris operating environment in a simple, modular assembly. Powered by the
UltraSPARC IIi processor, the Ultra AXi is designed to meet critical, high demand
application needs.
The Ultra AXi motherboard is intended for use in reliable, high performance
applications. The Ultra AXi uses the UltraSPARC IIi processor. The design objectives
include:
■ The basis for building robust general purpose computing platforms for
communications, networking or imaging.
■ Complete I/O subsystem: Ethernet, keyboard, mouse, serial ports, parallel port,
disk drives and floppy disk.
■ Industry standard components.
■ Industry standard expansion: six 32-bit PCI slots.
■ Industry standard DRAM DIMMs, monitor, enclosure, and power supply.
1-1
Enclosure
PSU
HDD CDROM Floppy
UltraSPARC IIi CPU Module Cables Adapters
Solaris 2.6
CD DOCUMENTS
Memory DIMMs
Ultra AXi Motherboard
System Integration
Solaris 2.6
FIGURE 1-1 Possible Configuration Examples
1-2 SPARCengine Ultra AXi OEM Technical Manual • August 1998

1.1 Features
■ Complies with ATX Specification and can utilize a wide variety of standard
enclosures.
■ Operates under Solaris 2.6 HW 3/98 and later.
■ Uses UltraSPARC IIi 270MHz, 300MHz or 333MHz processors.
■ Supports up to 1GB memory on-board, (32MB minimum).
■ PCI Local Bus master/slave interface.
■ Autosensed 10BASE-T (802.3) or 100BASE-T (802.30) EtherNet, with fully-
buffered transmit and receive channels.
■ Two Ultra-Wide SCSI buses, one internal, one external.
■ Floppy drive interface.
■ Parallel port, P1284-compliant, with ECP and EPP.
■ Two high speed serial ports
■ Interface for Sun keyboard and mouse and PS/2 keyboard and mouse
■ NVRAM/Real Time Clock module.
■ Flash EPROM.
■ Creator Graphics Module supported.
Chapter 1 Introduction 1-3

SPARCengine Ultra AXi Motherboard

1.2 Determination of Serial Number and
Version
1.2.1 Motherboard
The Ultra AXi Motherboard serial number, version number and date code can be
found on stickers located next to the internal SCSI connector (J1001). See
FIGURE 1-2, following and FIGURE 3-2 on page 3-4. The version number typically
appears as “-05 Rev.50”. The date code “0798” would mean the board was assembled
in the seventh week of 1998.
S501459900054
BAR CODE
Number
Serial
Version Date
Code
-05 Rev 50 CEL 0798

ASSEMBLED IN CANADA
FIGURE 1-2 Motherboard Serial Number, Version Number and Date Code Locations

1.2.2 CPU Module
The UltraSPARC IIi module Part Number and Serial Number can be found on a
sticker located on the side of the 180 pin module connector (J0101) facing the PCI
expansion slots. See FIGURE 1-3, following and FIGURE C-4 on page C-7.
Date Code
Serial Number
5015040000145 5040 - 02
BAR CODE REV 01 0998 ASSEMBLED IN CANADA
FIGURE 1-3 CPU Module Serial Number and Date Code Locations
1.2.3 Firmware
To determine which version of OBP is installed, enter the appropriate command:
If running OBP, at the OK prompt type:
ok> .version<cr>
The system will display:
OBP 3.10.X <creation date>
POST 2.Y.0 <creation date>
If running Solaris, at the <machine_name> prompt type:
<machine_name> /usr/sbin/prtconf -V
The third character group (X) in OBP is the revision number.
1.2.4 Software
To determine the release number of Solaris, at the <machine_name prompt> type:
<machine_name> uname -r
The machine will display the OS version in the following format:
X.X.X

1.3 Technical Support and Warranty
Should you have any technical questions or issues that are not addressed in the
SPARCengine Ultra AXi OEM Manual or on the Web site, contact your local
SunService Solution Center. To contact SunService in the U.S., phone (800) USA-
4SUN (800-872-4786). To find the SunService Worldwide Solution Center nearest you
go to this URL:
http://www.sun.com/service/contacting/solution.html
When you call SunService, be sure to indicate that the motherboard and CPU
module was purchased separately and is not associated with a system. Identify the
product by its part number.
■ SPARCengine Ultra AXi Motherboard — 501-4559-xx
■ UltraSPARC-IIi 270 MHz Module — S501-5039-xx
The SPARCengine Ultra AXi includes a 1-year return-to-depot warranty. Should

your board fail during this period, contact your local SunService representative for
instructions. Before you call, get the motherboard date code (for example, 0798 for
the seventh week of 1998) and serial number from the stickers located next to the
internal SCSI connector (J1001). The module date code and serial number are on
stickers on the 180 pin connector of the module. See FIGURE 1-2 on page 1-5 and
FIGURE 1-3 on page 1-6 for a detailed illustration.
1.4 Independent Hardware Vendors (IHV)

Independent Hardware Vendors generally supply non-Sun parts, components and
peripherals such as PCI and graphics cards, enclosures, power supplies, memory,
hard disk drives, floppy disk drives, CD-ROM drives, monitors, keyboards, mouse
devices, cables and adapters.
A list of these IHVs can be found on the Internet at:
http://www.sun.com/microelectronics/ihv

CHAPTER 2
Specification Summary
2.1 Functional Specifications

These specifications describe the Ultra AXi motherboard and the applicable version
of the OpenBoot Firmware and Solaris. (Solaris must be purchased separately.)
2-1
2.1.1 CPU Module
TABLE 2-1 CPU Module Options
Description Choice 1 Choice 2 Choice 3
CPU module features Compliant with V9 SPARC architecture specification,

Extended VIS support, Integrated E-Cache support,
Integrated interface similar to PCI Rev. 2.1
CPU Module 270 MHz 300 MHz 333 MHz
(Packaged Separately)
Part No. S501-5039-03 S501-5040-03 S501-5090-01
Cache 256KB 512KB 2MB
Performance:SPECint95 8.5 11.0 14.2
Performance:SPECfp95 10.1 12.8 16.2
Power requirement 1.6A from +3.3V 2.2A from +3.3V 1.6A(typ) from +3.3V
(Max) power rails power rails power rails
4.3A at 2.6V from 6.2A at 2.6V from 7.2A at 2.6V from
+5V rail +5V rail +5V rail
CPU Module Board 4 inches (101.6 mm) x 5 inches (127 mm)
Dimensions x 1.65 inches (41.9 mm) in height
Interface connectors 120-pin, 180-pin
See A.3.3 on page A-10 and A.3.4 on page A-13
Air flow requirement 300 lfm. (91.5 M/min.) on the heatsink
2.1.2 Main Memory Modules

Min. required memory 32MB
Max. supported memory 1GB
8 sockets provided (4 Pairs)
Access size 128 DATA bits + 16 ECC bits = 144 bits = 1 Pair
1 Pair = 2 sockets of 72 + 72 bits DIMM
Sockets for memory 8 sockets, 2 min. populated with DIMMs of identical
capacity. Pairs of different size auto configured, accepted
DIMM modules DRAM, EDO, Inputs Buffered except RAS,
3.3V, 60nS,72bits, 168 Pins
Refresh Rate CAS before RAS, 2K rows refreshed in 32 ms, (15.5 µs)
Height - Enclosure restriction may apply

Note – Some standard ATX chassis have height restrictions
Width - The connectors are 0.297 inches (7.544 mm.)

wide. A module thicker than this will partially block the
adjacent connector
See A.3.2 on page A-9, TABLE C-4 on page C-13 and

TABLE C-5 on page C-15
ECC features Single bit error correction

Double bit error detection
10-bit column address up to 128 MB
11-bit column address up to 128 MB
2.1.3 UPA64S Interface (Optional FFB)

SunExpress Part Number X3663A
Interface connector UPA64S, J0601, see A.3.5 on page A-15
Functional specification Refer to Data sheet PN 270-4172-02
Monitor supported Sun Monitor, 13W3 connector
Note: The optional FFB card will block access to one PCI slot.
2.1.4 Ultra-Wide SCSI Interface (SYM53C876)

Interface connector 68-pin UW connector rear panel for external devices
68-pin UW connector J1001 for internal devices
See A.3.7 on page A-19 and A.3.8 on page A-20 for
pinouts and part numbers
No. of devices Up to 8 devices on internal SCSI interface

Up to 8 devices on external SCSI interface
(The SCSI controller is considered one device)
Modes of operation Both narrow 8-bit and wide 16-bit in DMA modes are
supported
Electrical interface Single ended, fast-20, 16-bit wide bus
Cable length Max. 3 Meters for 2 devices (2 connectors)
Max. 3 Meters for 3 devices (3 connectors)
Chapter 2 Specification Summary 2-3

Max. 1.5 Meters for 6 devices (6 connectors)
Cable termination Required for both ends of internal and external cables
OnBoard termination always active for internal
OnBoard termination always active for external
Last device on cable end needs to be terminated
SCSI ID selection (Solaris default settings, internal SCSI bus)
OnBoard controller: 7
CD-ROM: 6
Hard Disk 1: 0
Hard Disk 2: 1
Boot Support Solaris CD-ROM: Single user, install operations

Solaris installed hard disk: single user, multi user, all
operations
SCSI Devices Supported CD-ROM drive with (512Bytes block size for bootable)
Hard disk drives
Tape drive units
Other devices need suitable Solaris device drivers
Additional SCSI information can be found at the
following URL: http://scitexdv.com:8080/SCSI2/
Frames/SCSI2.html
2.1.5 Ethernet 10/100 BASE-T Interface

Interface Connector RJ-45, 8-pin connector
Bootable via Network
Data Bit rate 10BASE-T @ 10Mbits/sec

100 BASE-T @ 100Mbits/sec
IEEE 802.3u Auto Negotiation
External Cables Category 3, 4 or 5 unshielded twisted pair cable,

1000 Meter max for 10BASE-T operation
Category 5 unshielded twisted pair cable,
100 Meter max for 100BASE-T operation

2.1.6 PCI Connectors
Compatibility Compliant with PCI Rev 2.1 specifications
Full 32bit support
Interface connector 62-pin PCB edge connector,

See A.3.5 on page A-15
Will accept long card or short card
Can support up to 25W per slot depending upon the power
supply selected
PCI-Bus segments 3 slots on PCI-A (bus segment)

3 slots on PCI-B (bus segment)
PCI-A and PCI-B segments are functionally identical
Signalling Interface level ‘5V signalling’ only

Supports 33MHz operation only
Address space 2GB address space within the same bus segment
2GB address space beyond its bus segment
IO, memory, configuration space mapped into
UltraSPARC
PCI address space is NON-CACHEABLE
Transactions All types and modes of PCI transactions are supported

Peer to peer transfers possible within the same bus
segment
Direct Data Transfers between bus segments are not
supported
Data transfer rates In PIO mode 124MB/s max

In DMA mode, read 78MB/s max
In DMA mode, write 124MB/s max
2.1.7 Sun Keyboard and Mouse Interface

Sun Express part no. Type 5 Keyboard (Unix) 320-1234, Mouse X494A
(Other keyboard language options are available)
Interface connector 8 Pin DIN type, J0902, see A.3.13 on page A-25
Baud rate, framing 1200N1 for kbd data, 1200N1 for mouse data
Note – Sun Type-5 Keyboard-Mouse must be used for full functionality

2.1.8 PS/2 Keyboard Interface
Interface Connector 4-Pin Header, J2501 see A.2.4 on page A-6
Use Adapter as found in A.3.15 on page A-26
Baud Rate, framing 9600N1, auto detected
Type Scan Code Set 2
2.1.9 PS/2 Mouse Interface

Interface Connector 4-Pin Header, J2500 see A.2.3 on page A-5
Use adapter as found in A.3.15 on page A-26
Baud Rate, framing 9600N1, auto detected
2.1.10 Parallel Port Interface

Interface Connector DB25S female connector on rear panel
Interface Standard IEEE 1284 compatible
Data Transfer rate up to 2MB/sec
System Support Standard Centronics, Compatibility, Nibble and Byte

modes, and EPP/ECP protocol modes
EPP and Byte mode not supported in the drivers
Interconnect Cable IEEE 1284 compliant printer cable not exceeding 2 Meters
2.1.11 Serial Port Interface

Interface Connector DB25P Male, wired for TTY-A and TTY-B,
see A.3.10 on page A-22 for PinOut
Need “Y” splitter cable to use TTY-B
Mode of operation Async @ 460.8 KBps max, Sync @ 384 Kbps max
HandShake signals CTS, RTS, DTR, DSR, fully supported, optional
Interface Voltage RS423 levels: J1804 = 2 & 3, J1806 = 2 & 3

RS232 levels: J1804 = 1 & 2, J1806 = 1 & 2
Slew Rate control Normal speed <100Kbps, 5V/µS J1805 = 2 & 3

High speed >100Kbps, 10V/µS J1805 = 1 & 2

Baud Rate Programmable: 300...460800 asynchronous mode
Parity Bit Programmable: Odd Parity, Even Parity, No Parity
Stop Bits Programmable: 1, 2
Interconnect cable Standard cable up to 30 Meters long

Synchronous Mode and HiSpeed need special attention
Standard IO default At boot time if video or keyboard is absent, OBP and OS

default console communications to TTY-A
OBP default initialize TTY-A: 9600N1; TTY-B: 9600N1
2.1.12 Floppy Disk Drive Interface

Interface connector 34 Pin Dual Row, J1902, see A.3.9 on page A-21
Interface cable 34 pin Flat Ribbon Cable, 13 inches or less

1:1 connection, 1 connector on each end
Device supported 3.5 inch Floppy Drive, 1 Drive only, DS0 or DS1 auto
search. Manual Eject only
Data transfer rate 500Kbps @ 1.44MB High Density ReadWrite operation

250Kbps @ 720KB double Density ReadWrite operation
Media, format supported 1.44MB Unix format only

1.44MB, 720KB DOS format
Boot support Booting from floppy disk is not supported
2.1.13 Non-Volatile Memory, Time-of-Day

Field removable module with integral battery, clock circuitry.
Note – Field removal allows removal and retention of module to preserve Host ID,
software license information, MAC address and other information if the
motherboard needs to be replaced.
The TOD/NVRAM may also contain configuration data specific to your installation.
Be sure to keep a copy of this information.
Battery Life 7 years min., 10 years typ.

Time accuracy Approx. 1.5 sec./mo. Can be calibrated for increased
accuracy

User Memory Capacity 8KB usable as OBP NVRAMRC. Used to store OBP
environment variables
Reserved Memory Space 2KB, Non-modifiable by user. Used to store System ID,
EtherNet Address
2.1.14 Advanced System Monitoring

The Advanced System Monitoring (ASM) (formerly referred to as RAS) feature
utilizes dedicated hardware to function. This hardware enables the Firmware and
Software to monitor temperatures and voltages, and monitor and control cooling
fans. Further details can be found in Chapter 3, “Functional Description”.
2.1.14.1 Temperature Sensing

Temperature Monitor Points One thermistor is under the CPU module heatsink.
This is used by ASM as the decision point to issue a
warning or to shut down the system. There are also
three thermistors on the Motherboard.
See Mechanical Drawings FIGURE B-7 on page B-6 and
FIGURE B-10 on page B-10
Warning 270 MHz CPU: 65° C
300 MHz CPU: 70°C
Shutdown 270 MHz CPU: 75°C
300 MHz CPU: 80°C
2.1.14.2 Fan Monitoring and Control

Fan Control Both fans controlled simultaneously
Fan Speed Four Steps: 8V, 10V, 11V, 12V
Control Matrix
T1 J3603 V J3602 V
T2 J3603 V J3602 V
T3 J3603 V J3602 V
T4 J3603 V J3602 V
Monitoring Individual Fan Fail Warnings (Back Fan Fail), (Front

Fan Fail)

2.1.14.3 Voltage Monitoring
Voltages Monitored 2.6V DC to DC converter at output
+5VDC at Power Supply (Power Good Signal)
Function Signals to the Operating System that the voltage

drops below minimum limits
Limits 2.6V DC to DC Converter. 2.34VDC to 2.86VDC

detected on Motherboard. Power Good <4.5V OR 2.9V
detected as Power Good Signal on Power Supply
2.1.14.4 Optional Cooling Fans

The use of these fans is optional depending upon specific configuration.
Motherboard Connectors J3602, J3603
Speed Control 0 to 12 VDC
Feedback TTL level open collector output
Fan Control Firmware controls fan on-off, software controls fan
speed using thermistor input
Recommended Fans The fans must be 12 VDC, variable speed with sensor
feedback to detect a failed fan
Sanyo Denki: Model 109R0812H4D01

NMB: Model 3110KL-04W-B39
2.1.15 Power On-Off Switch (front of enclosure)

Motherboard Connector J3301
Switch Type 2 Contact, momentary contact
Function Push On, Push Off
Control Circuit Uses +5V_SB power to control power supply

2.1.16 Speaker (enclosure mounted)
Type 8 ohm, 0.25W
Function Functions with PS/2 keyboard only
2.1.17 Reset Switch (front of enclosure)

Switch Type Momentary contact, push to reset
Function Hard reset
2.2 Power Requirements

Supply Voltage +5V, +3.3V, +12V, -12V
Maximum Power (Motherboard only, no CPU installed)
Voltage +3.3V +5V +12V - 12V +5V_SB

Maximum Power 1.0A 2.0A 0.5A .05A 20mA
Power sequencing +5V first, then +3.3V preferred, simultaneous OK.
Power Up Delay < 30ms; Slew rate: < 1V/ms.
Note: The CPU, Memory DIMMs and PCI cards are all powered through the
Motherboard. See TABLE C-2 on page C-3 for system power budgeting
including peripherals.
Note: The system can use software controlled power down. The system must be
powered up using either the front panel switch or keyboard switch.

2.3 Mechanical
Board Dimension 12.0 inches (304.8 mm) x 9.6 inches (243.8 mm)
Height Restrictions 1.65 inches (41.9 mm) at the CPU Module

1.7 inches (43.2 mm) max at the IO connector stack
0.5 inches (12.7 mm) or lower for rest of the board.
The height of the DIMMs will vary with supplier.
(Ensure adequate clearance between DIMMs and the
hard disk cage)
See FIGURE B-3 on page B-3, FIGURE B-4 on page B-4
and FIGURE B-5 on page B-4.
Mounting Holes 10 holes, ATX recommendation G Profile
2.4 Reliability
MTBF values are calculated.
CPU/Memory Mean Time Between Failure

Configuration MTBF (Hours)
No CPU 267,000
No Memory
CPU Module Installed 171,600
32MB Memory
CPU Module Installed 164,300
128MB Memory

2.5 Environmental
Operating Non-Operating
Temperature (ambient) 0°C to +55°C -40°C to +70°C
Air flow requirement 300 lfm at CPU heatsinks.
Humidity 5% to 95% 5% to 95%

RH non-condensing RH non-condensing
Shock 6 G peak, 11ms, 10 pulses 15 G peak, 11ms, 3 pulses
Vibration 0.25G, 2 sweeps, 5Hz ~ 500Hz 1.0 G, 2 sweeps, 5Hz ~ 500Hz

@ 1 Octave / min @ 1 Octave/min
Altitude 10,000 ft. (3,408 M) 40,000 ft. (12,192 M)
ESD --- 15.0KV 100% Soft, 25% Hard
2.6 EMI Compliance

The Ultra AXi has met the FCC requirements for Part 15, subtitle J, Class B in a
representative ATX enclosure (Chenming Mold Industrial Corporation, model
number ATX601B-P) using 270 MHz and 300 MHz CPU modules. A gasket may be
needed between the enclosure sides and the base with the 333MHz CPU module.
Filtered adapters (AMP part no. 842699-3, Connec part no. 243-A-10030-X) and
shielded cables may be required for the serial and parallel ports.
2.7 U.L. Recognition

The Ultra AXi is a U.L. recognized component, file no. E178105.

CHAPTER 3
Functional Description
3.1 General Information

This section describes the functionality of various modules of the SPARCengine
UltraAXi board. The functionality is explained in the context of UltraAXi hardware,
OBP firmware and Solaris operating system software. It is possible to use the Ultra
AXi with other operating systems, with or without OBP. This usage is not discussed
in this manual.
3-1
3.1.1 Terminology
The terminology used in this manual generally follows industry conventions. The
following list defines the specific meanings of words and terms as used in this
section.
Boot The process of initializing the hardware to execute and run an

operating environment such as Solaris 2.6.
Device tree The OBP probing process constructs a hierarchal representation of

the hardware devices that are found on the bus, the host-bus being
the root. The device tree includes several device nodes, (PCI bus is a
device-node).
Firmware This is software which stays with the hardware usually in a PROM or
similar device. Referred to as OBP in IEEE 1275 standards. In the
UltraAXi implementation, release version 3.10.x and later are
applicable. This version comes with the motherboard. The user may
upgrade the OBP to a newer version if needed.
Hardware The UltraAXi motherboard, CPU module, cables and peripheral

devices are typical examples of hardware.
NVRAMRC Acronym for non-volatile random-access memory run command.

This refers to the executable OBP script that is written in the NV-
RAM. Other text information or binary data may exist in the
NVRAM, but is not referred as NVRAMRC.
OBP Acronym for Open Boot PROM. This refers to a memory device
which consists of executable code by the UltraSPARC IIi CPU. The
code is responsible for initialization of the hardware and booting the
system to bring up the Solaris operating system.
Probing A process implemented in the firmware and software to identify

onboard hardware devices and add-on cards on the PCI bus. The
probing process creates the device-tree.
Software A collection of machine readable information, instructions, data and

procedures that enable the computer to perform specific functions.
Typically stored on removable media.
Solaris The best known operating system from Sun. The SPARC architecture
version of Solaris is used with the UltraAXi.

3.1.2 Block Diagram
Sun Video
168-Pin DIMMs Monitor
4 Pairs, 8 Sockets
144-bit
FFB
32 MB to 1 GB (optional)
Buffers Data MUX x6
72 Bits = 64 Data + 8 ECC UPA64S
Floppy Drive
PS/2 Mouse
Super I/O
NS87307 PS/2 Kbd
UltraSPARC IIi CPU Module

(270 or 300 MHz)
TOD / NVRAM Sun Kbd
N48T59
EBus2
Parallel Port
FPROM
28F800
6-bit IntNum
Serial Ports
IRQs
Dual Serial Ports

Resets
PCI-66 — 32-Bit, 3.3V, 66 MHz
SA88253
TxRx 10/100 BaseT

PCIO RJ45
Phy
RIC
PCI-B — 32-Bit, 5V, 33 MHz
E-bus, Ethernet Interface

Reset,
Interrupt,
Clock
PCI-B
APB PCI Slots x6

Advanced PCI Bridge 32-bit, 5V, 33MHz
PCI-A
PCI-A — 32-Bit, 5V, 33 MHz
Power SCSI Internal
Ch A
SCSI Controller
HDD Ch B SCSI External
POWER ACTIVITY RESET POWER SYM53C876
FIGURE 3-1 Ultra AXi Motherboard Block Diagram
Chapter 3 Functional Description 3-3

3.2 Layout Diagram
CPU Connector to Power Connector
PCI 66 Bus
Serial/Parallel
Connectors
Memory
Sun Keybd/
Mouse APB
RIC
External SCSI Connector
Serial
CPU Connector to
Memory/UPA64S
Ethernet
SCSI PCIO
Floppy Connector
Mounting Hole
10 places
Pin 1
UPA 64S
PCI Connectors
TOD/NVRAM
Assy/Rev No.
FLASH
Super I/O
Part No., Serial No.

Bar Code
ROM Emulator Internal SCSI Connector
FIGURE 3-2 Ultra AXi Layout

Also see FIGURE A-1 on page A-2 for Header, Jumper and Connector information.

3.3 SPARCengine Ultra AXi Motherboard
The motherboard implementation details appear in the Block Diagram and the
Layout Diagram. It is Fabricated on an 8 layer printed circuit board. Sockets are
provided for the CPU module and the memory DIMMs. The motherboard can be
equipped with either 270MHz or 300MHz CPU modules. Memory modules are
installed in Pairs (two DIMMs at a time) which allow the system to be equipped
with 32MB up to 1GB of memory. There are six 32-bit PCI slots available. User
configurable jumpers are described in A.1 on page A-3.
3.3.1 CPU Module

The UltraSPARC AXi module is a highly integrated CPU with memory controller
and PCI interfaces. The module also includes level-2 cache and high-speed UPA64S
interface for Fast Frame Buffer video module (FFB2). There are two versions of CPU
available at this time, UltraSPARC IIi-270 and UltraSPARC IIi-300. The architecture
complies with SPARC V9 instruction set, which enables the system to use a wide
range of peripherals and high performance Solaris 2.6. For further details on the
CPU refer to SME1040 Highly Integrated 64-bit RISC Processor, PCI Interface Data
Sheet document number 805-0086-02.
3.3.2 Main Memory Modules

The Ultra AXi architecture uses 128 data bits + 16 ECC bits in a single memory
access. This is achieved by populating 2 memory DIMMs in a Pair. The Ultra AXi
uses DRAM, EDO, Buffered, 10 or 11-bit Column Address, 3.3V, 60ns, 72-bit, 168-pin
DIMMs. The design has 4 DIMM Pairs of 8 sockets. The 144-bit Memory Data bus is
routed and multiplexed through BMX devices into the CPU Module as a 72-bit bus.
The memory design includes Error Check and Correction (ECC). A single bit error in
a 64-bit word is corrected on the fly. Errors of 2-bits or more are detected and flagged
to system software for error handling. This assures very high data integrity and a
reliable system. The design accommodates different capacity memory modules in 4
Pairs (both DIMMs in a Pair must be the same size). Depending upon the
combination of DIMMs used, it is possible to have from 32MB to 1GB populated.
(32MB, 48MB, 64MB, 80MB, 96MB, 112MB, 128MB...up to 1GB in 16MB increments).
CAS before RAS refresh is used. The memory organization of 10-bit column address
is supported in all DIMM Pairs. 11-bit column address is supported in DIMM Pairs 0
and 2 only. See FIGURE C-11 on page C-12, TABLE C-4 on page C-13 and TABLE C-5
on page C-15 for specific DIMM combinations.

3.3.3 Flash Memory
There is a 1Mx8bit Flash memory device on the EBus2. This is pre-programed with
the OBP code. The CPU fetches initial executable codes from Flash memory upon
power-on. The Flash memory is field reprogammable.
3.3.4 TOD/NVRAM
The Non-Volatile Memory PROM and a Time of Day (TOD) clock are both contained
in a module mounted on the motherboard. This module has its own lithium battery
to operate the clock and to keep the contents of the NVRAM during power-off
situations. This module is field removable.
Module is a SGS Thomson Microelectronics SGS-M48T59Y.
3.3.5 FFB2 Graphics

This is a high speed, high resolution graphics card, made and supported by Sun. It
interfaces directly with the CPU over the high performance UPA64S bus. The
motherboard accommodates one FFB2 card which is optional for high performance
video applications.
Note – The FFB2 card obstructs one PCI slot. When this card is installed, only 5 PCI
slots are available
3.3.6 Communication Ports

There are two serial communication ports available to the user, both ports are wired
to a single 25-pin connector, J1802, accessible at the rear panel. See A.3.16 on page A-
27. Both ports are capable of communicating with an interface at RS-232 level
(+12V to -12V swing) and RS-423 level (+5V to Gnd) by jumper settings on J1804 and
J1806. See TABLE A-1 on page A-3 and FIGURE A-1 on page A-2. Each channel is
progammable to operate in sychronous mode or asynchronous mode. In
asynchronous mode each channel is programmable to operate at various baud rates.
In synchronous mode, the program selects to the clock, or may be programmed to
use an external clock. To use Channel-A, connect a standard 25 pin terminal cable to
the DTE. To use Channel-B, connect the standard 25 pin terminal cable to the “B”
end of the “Y” splitter cable, see A.3.16 on page A-27. Using the “Y” splitter cable it
is possible to use both channels simultaneously. Implemented using Seimens

SAB8223 on the EBus2, with full interrupt support. During system power up, if no
keyboard or video interface is found, the system defaults to communicate through
TTY-A (Channel-A of the ComPorts).
3.3.7 Printer Port

A parallel interface for printers is provided on this port (J0901) and is compliant
with IEEE1284. It is implemented to work in DMA mode for high throughput and
works with all standard printers when used with a cable of the recommended type
and length. Super IO chip NS87307 provides the interface circuitry.
3.3.8 Sun Keyboard and Mouse

The standard Ultra AXi motherboard supports the Sun type 5 keyboard (SunExpress
Part No. 320-1234) and mouse (SunExpress Part No. X494A). This keyboard uses the
8 pin DIN connector (J0902) located on the rear panel. See A.3.13 on page A-25. The
Sun Keyboard has a speaker for “beep” signals built in. Localization for other
language keyboard is supported by Solaris. Consult the Solaris documentation for
specific details. Super IO chip NS87307 provides the interface circuitry.
3.3.9 PS/2 Keyboard and Mouse

Most types of PS/2 Keyboards and PS/2 Mouse devices are supported. The interface
connectors on the motherboard are J2500 for the PS/2 mouse header and J2501 for
the keyboard header. See A.2.3 on page A-5 and A.2.4 on page A-6. The interface
signals are brought to the rear panel using a cable adapter detailed in A.3.15 on
page A-26. Keyboards of 84 keys, 101 keys, 102 keys and 104 keys layout are
supported. For details on keyboard mapping for different languages, consult the
Solaris documentation. While a mouse with one, two or three buttons are all
supported, most Solaris applications function best with a three button mouse. For
details on mouse button mappings, consult the Solaris documentation. Super IO chip
NS87307 provides the interface circuitry.
3.3.10 Floppy Drive

One 3.5 inch, 1.44MB floppy drive is supported. Only manual eject is supported.
Super IO chip NS87307 provides the interface circuitry.

3.3.11 EtherNet Port
The EtherNet interface is a twisted pair type using an RJ45 connector at the rear
panel. The interface incorporates an auto negotiate feature to auto-detect 10Mbits/
sec. or 100Mbits/sec. bit rate and will auto-configure itself on the fly. See A.3.12 on
page A-24 for pin-out details. Sun ASIC PCIO STP2003QFP provides the circuitry to
support this function. A National DP83840A is used as a physical layer device (PHY)
for EtherNet 10BASE-T and 100BASE-T using category 5 unshielded, twisted pair
cables.
3.3.12 External and Internal SCSI Interface

The Ultra AXi fully implements SCSI on an UltraWide 16-bit bus which supports
transfer rates up to 40MB/sec. The SCSI connectors are 68-pin Amp type, single-
ended signals with an active terminator mounted on the motherboard. See A.3.7 on
page A-19 and A.3.8 on page A-20. Each SCSI cable requires a terminator on the last
device. SCSI is implemented with Character mode, Block mode DMA and single
initiator supports. There is extensive Solaris support for a wide variety of devices
such as hard disks, CD-ROMs and tape drives. Symbios chip SYM53C876 provides
the dual channel SCSI support.
3.3.13 PCI Bus Connectors

There are six PCI slots provided. All the slots are similar, they are 33 MHz, 32-bit, 5V
only. PCI slots 1, 2, 3 are on the internal PCI-A bus segment and PCI slots 4, 5, 6 are
on the PCI-B bus segment. See FIGURE A-1 on page A-2. All 6 PCI slots are identical
in characteristics. The PCI Bus is compliant with PCI 2.1 specification.
Note: If the FFB2 board is used, it blocks one PCI slot, leaving five usable slots.
3.3.14 Memory Bus

The UltraSPARC IIi CPU manages all memory control signals and multiplexes the
address lines for standard DRAMs. The data bus is 128-bits wide plus-16 bits ECC.
This 144-bit wide bus is converted to a 72-bit bus using 6 multiplexer chips to
interface with the CPU.

3.3.15 UPA64S Bus
The Sun Creator Graphics card family is supported for 2D and 3D graphics. The card
interfaces to the motherboard with a UPA64S connector, and to standard Sun
monitors with a 13W3 video connector. This is an internal bus only.
3.3.16 PCI 66 Bus

The UltraSPARC IIi CPU module has a PCI-66 bus. The bus operates at 66 MHz, 3.3V
and has characteristics similar to PCI specifications. The PCI-66 bus is bridged to the
PCI-A and PCI-B buses by the Sun ASIC Advanced PCI Bridge (APB)
SME2411BGA-66. This is an internal bus.
3.3.17 EBus2
This is a versatile 8-bit data, 24-bit address bus similar to an ISA bus. Components
on this bus provide economical interfaces to the Sun keyboard and mouse, PS/2
keyboard, PS/2 mouse, printers, floppy drives, serial ports, flash memory and
NVRAM/TOD devices. This is an internal bus only.
3.4 Advanced System Monitoring (ASM)

The ASM features implemented in the Ultra AXi monitor critical temperatures,
voltages, and the optional cooling fans. The ASM features will issue warnings for
high temperatures, low voltage, optional cooling fan failure and will initiate system
shutdown due to high temperature. ASM features also control the operation of the
two optional cooling fans. These functions and features are implemented internally
using dedicated circuitry that operates on the I2C serial-bit-bus. To support these
functions and features, OBP 3.10.4 or later and Solaris 2.6 HW: 3/98 or later is
required.
Further details regarding ASM can be found in the Sun document “SPARCengine
UltraAXi ASM Utilization and Calibration” Application Note, Part Number
(805-4877-01).

3.4.1 Temperature Monitoring Points
Temperatures are monitored at four thermistors. See FIGURE B-7 on page B-6 and
FIGURE B-10 on page B-10.
■ On the CPU module under the CPU heatsink (in both versions of CPU)
■ On the motherboard, R3407, near the mounting hole between J2002, J2001 PCI
connectors
■ On the motherboard, R3409, below the CPU module near J0101 CPU connector
■ On the motherboard, R3406, in between the CPU and Memory DIMM sockets
3.4.2 Voltage Monitoring Nodes

The ATX power supply generates a signal called Power_OK. This signal is a result of
a 'Voltage OK' condition when +3.3V and +5.0V are above 90% of their value. This is
one source of the voltage monitoring signal.
An onboard DC to DC converter generates the core voltage for the CPU, 2.6V ±5%.
The motherboard has circuitry to check that this voltage is within ±10%. This is the
second source of voltage monitoring signal.
3.4.3 Fan Control and Monitoring

There are connectors to power two optional fans from the motherboard. The fans
must be able to operate with variable power conditions for speed control and must
provide a TTL level signal to indicate whether the fan is rotating or not. The 3-pin
connectors J3602 and J3603 are used to connect the fans. See A.2.8 on page A-7 and
A.2.9 on page A-7.
3.4.4 OBP Functions for ASM

Under OBP, the 'env-monitor' variable defines 4 options to perform ASAM functions.
In OBP-Ver: 3.10.4, by default ASM is turned off.
Temperature monitoring provides a “Warning” message when the CPU temperature
rises out of limits. At extreme temperatures, ASM will initiate a “System
ShutDown”.
Voltage Monitoring provides a “Warning” when low voltages are detected.
The fan control function drives the fan at maximum speed. The fan monitor function
detects non operational fan(s).
The OBP is also responsible for generating the required 'RAS node' with associated
'property' for Solaris Drivers to implement ASM functions.
Refer to Appendix F for details on how OBP implements the ASM features.

3.4.5 Solaris Driver Functions for ASM
In the add-on package released for Solaris 2.6 HW: 3/98, RAS device drivers are
provided to implement ASM functions.
Temperature monitoring provides a “Warning” message if the CPU overheats. At

sufficient out of limit temperatures, the ASM driver initiates a “System ShutDown”.
Voltage monitoring provides a “Warning” when low voltages are detected.
The fan control function drives the fan at a defined speed. Internal decision tables
determine the speed of the fan to one of the four predefined speeds. The decision is
based on the input values of the temperature readings at the four thermistors. The
fan monitor function will detect a non-operational fan.
Refer to Appendix F “ASM Specifications” for details on how Solaris drivers

implement the ASM feature.

3.5 Miscellaneous Information
Either the Sun keyboard and mouse or PS/2 keyboard and PS/2 mouse is
supported.
Connecting both simultaneously will result in undesirable system aborts.

Keyboard and Mouse Configuration on Power Up Mode
PS/2 Keyboard alone TTY-A

PS/2 keyboard and PS/2 mouse Video
Sun Keyboard only Video
Sun Keyboard and Mouse Video
There is adequate system level support to configure multiple video devices. At the
maximum, FFB2 plus 5 PCI graphics can be supported. If both FFB2 and PCI
graphics cards are used the system will default to FFB as console.
No system support is available to boot from floppy.
Volume Manager in Solaris has the capability of electrically ejecting removable

media. When using floppy drives, magnetic tape drives or CD-ROMs, the
appropriate eject commands should be used. The floppy drive is manual eject only.
Refer to the Solaris documentation.
Devices which participate in the Boot Process such as Boot Device, Standard IO,
must have OBP support.
The Ultra AXi motherboard has built-in OBP support for certain PCI graphics cards
from ATI. See Appendix E.
Use of Sun keyboards other than the Type 5 may result in unpredictable operation.
For example, the front power switch will not shut down the machine with a Sun
Type 4 keyboard attached.
The boot -r command must be used to reconfigure the system if any cards are
added, removed or moved from one expansion slot to another, or if memory DIMMs
are added or removed or any other changes are made to the system configuration.
If the system has a monitor installed, but no keyboard the output will be TTY-A.
The system requires a minimum of 16MB of installed DRAM to operate in OBP, and
an additional 16 MB for a total of 32MB to operate Solaris.

CHAPTER 4
Sequence of Events at Power Up
This chapter details the sequence of events that occur at Power Up in the reference
configuration described in Appendix C. Interaction with OBP and Solaris is referred
to where applicable. This sequence does not address all possible configurations.
4.1 Configuration
A minimum configuration for the Ultra AXi motherboard is:
■ UltraAXi motherboard with OBP3.10.4 or later.
■ 32MB Memory
■ UltraSPARC IIi CPU Module.
■ Console terminal connected to TTYA.
■ Boot Device - network
The reference configuration for this manual is:

■ UltraAXi motherboard with OBP3.10.4
■ 128MB Memory
■ UltraSPARC IIi CPU @270MHz
■ ATI graphic card in a PCI slot connected to monitor
■ Sun Type 5 keyboard
■ Boot Device - Disk
■ OBP environment:
■ Boot-device = hard disk
■ Diag-switch? = false
■ Diag-Level = min
■ Auto-boot? = false
4-1
TABLE 4-1 Power Up Sequence
Phase Description Observation
Power-Connected When Power is connected, +5V SB power will be No fan rotation, no LED
Rear switch ON present. This Stand By power is available to the front Illumination.
panel power switch circuitry.
The Front Panel Power_On signal is driven to activate the power The fan in the power supply starts.
ON-OFF switch is supply. All the outputs appear. The power supply The hard disk and CD-ROM devices
pressed verifies the outputs have reached the nominal value self-initialize.
(output sequence applies) and drives the Power_OK
signal.
POWER OK signal All chips and the CPU module are brought to an
generates RESET initialized state. The PCI cards also receive this
signal. signal to initialize their internal state. The SCSI
devices and the floppy drive may also initialize
Pressing RESET using this signal.
button generates
RESET signal
The CPU starts executing the instructions from the
Flash memory
Minimum required hardware registers initialized. The power LED will illuminate.
CPU clock speed is also determined and re-initialized.
Probe for keyboard entry to skip POST.
Execute POST. POST messages appear on TTYA
console
Probe for amount of installed memory on four banks.
Decompress and copy ROM/OBP code into RAM.
Probe keyboard. LED’s on keyboard blink.
Either keyboard or enclosure
speaker will beep.
Probe for amount of installed memory on four banks.
Graphic display device installed. Banner displayed
Execute NVRAMRC.
Probe FFB.
Probe PCIB, Ethernet interface, Ebus
Probe PCIB slot J2001.
Probe PCIB slot J2002

TABLE 4-1 Power Up Sequence (Continued)
Phase Description Observation
Probe PCIB slot J2003

Probe PCIA, SCSI device. HDD activity light illuminates
momentarily.
Probe PCIA slot J2101
Probe floppy disk drive. FDD activity light illuminates
momentarily.
At OBP Prompt User Control OBP Prompt appears ok
boot command PROM loads bootblock (bootblk) program Boot messages appear.
entered
Bootblook program loads boot (usfboot) program
The boot (usfboot) program loads the kernel
The kernel initializes itself, loads all boot device
drivers, modules and starts init process
The init process starts the run control scripts Boot process takes about 3 minute
Console login
4.2 Reset Cautions

Review these cautions before proceeding.
Caution – Under certain conditions a soft reset (from the command line) may leave
! the system in an unknown state, indicated by a ”Wait-for-reset-timeout error”
message at the “OK” prompt. To correct this condition, power cycle the system.
Caution – At the OS level, the push button reset may leave the system in an
! unknown state and may corrupt the disk. Only assert the push button reset at the
“OK” prompt or if maintaining the state of the disks is not critical. As in any Solaris-
based system, the correct shutdown process is to become super-user, sync the file
system, then finally halt the system.
Chapter 4 Sequence of Events at Power Up 4-3

APPENDIX A
Jumpers, Headers, Connectors and

Adapters
All connectors shown as viewed from mating side.
Appendix A Contents
Jumpers Page A- 3
Headers Page A- 4
Connectors Page A- 8
Adapters Page A- 26
A-1
J3603
CPU Connector to J1501
PCI 66 Bus Power Connector
Serial/Parallel
Connectors J1901
J0102
Memory
Sun Keyboard/
Mouse APB
RIC
Serial
External SCSI Connector Floppy
Connector
CPU Connector to J0101
Memory/UPA64S Bus
Ethernet
SCSI PCIO Pin 1
PS/2
Keyboard
J2501
PS/2 J2103
J0404
J0304
J0403
J0303
J0402
J0302
J0401
J0301
Mouse
J2500
J0601 UPA 64S
PCI Connectors
J2102
Bus A
J2101
TOD/
J2003 NVRAM
J3602
J1804 J1805 J1806
FLASH
J2002
PCI Connectors
Super I/O
J3201
Bus B
J2001
J3302
Mounting Hole J1001

10 places
SROMBO Internal SCSI Connector

J1402 J1401
J3301 J1990
Default Jumper Settings

are indicated by shading
FIGURE A-1 Ultra AXi Jumper, Header and Connector Layout
A-2 SPARCengine Ultra AXi OEM Technical Manual • August 1998

A.1 Jumpers
TABLE A-1 shows the default motherboard jumper settings.
TABLE A-1 Motherboard Jumper Settings
Jumper Settings and Results
J1401 1-2 Flash Memory Write disabled

2-3 Flash Memory Write enabled (default)
J1402 1-2 Flash Memory selected (default)
2-3 ROM Emulator selected (used for system debug only)
J1804 1-2 RS232 (default)
2-3 RS423
J1806 1-2 RS232 (default)
2-3 RS423
J1805 1-2 FAST Serial
2-3 Normal RS232 (default)
Appendix A Jumpers, Headers, Connectors and Adapters A-3

A.2 Headers
TABLE A-2 Header Summary
Header Function
J1501 Reset Switch (front panel)

J1990 System Power On LED (front panel)
J2500 PS/2 Mouse (rear bracket)
J2501 PS/2 Keyboard (rear bracket)
J3201 Speaker (front panel)
J3301 Power ON-OFF Switch (front panel)
J3302 Reserved (No Jumper)
J3602 Optional Fan
J3603 Optional Fan

A.2.1 Reset Switch Header J1501
TABLE A-3 Reset Switch Header
Pin # Description
1 For factory use only.

2 Ground from reset switch.
3 Signal side from reset switch.
A.2.2 Power On LED Header J1990

TABLE A-4 Power-On LED Header
Pin # Description
1 +LED (Vcc through resistor).
2 -LED (GND through logic).
A.2.3 PS/2 Mouse Header J2500
TABLE A-5 PS/2 Mouse Headers
Pin # Description
1 Data
2 Gnd
3 Vcc
4 Clk

A.2.4 PS/2 Keyboard Header J2501
TABLE A-6 PS/2 Keyboard Header
Pin # Description
1 Data
2 Gnd
3 Vcc
4 Clk
A.2.5 PS/2 Speaker Header J3201
TABLE A-7 PS/2 Speaker Header
Pin # Description
1 Speaker.
2 N/C.
3 N/C.
4 Speaker.

A.2.6 Power On-Off Switch Header J3301
TABLE A-8 Power Enable Switch Header
Pin # Description
1 Power On-Off Signal

2 Ground.
A.2.7 Reserved (Do Not Use) J3302
TABLE A-9 Reserved Header
Pin # Description
1 Reserved
2 Reserved
3 Reserved
A.2.8 12V Optional Fan Header J3602
TABLE A-10 12V Back Fan Header
Pin # Description
1 Back fan fail

2 Power
3 GND
A.2.9 12V Optional Fan Header J3603
TABLE A-11 12V Front Fan Header
Pin # Description
1 Front fan fail

2 Power
3 GND

A.3 Connectors
A.3.1 ATX Power Connector J1901

Molex Inc. Part No. 39-29-9202
20 11
10 1
TABLE A-12 ATX Power Connector
Pin Voltage Pin Voltage
1 3.3V 11 3.3V
2 3.3V 12 -12V
3 COM 13 COM
4 5V 14 PS_ON
5 COM 15 COM
6 5V 16 COM
7 COM 17 COM
8 PW_OK 18 -5V
9 5V_SB 19 5V
10 +12V 20 5V

A.3.2 Memory DIMMs J0301, J0302, J0303, J0304
J0401, J0402, J0403, J0404
AMP Inc. Part No. 382826-4
FOXCONN Inc. Part No. AT08403-H6
TABLE A-13 Memory DIMMs Pinouts

Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal
1 VCC 85 VSS 29 RFU 113 RFU 57 DQ22 141 DQ58

85
2 DQ0 86 DQ36 30 RAS0 114 NC 58 DQ23 142 DQ59

1
3 DQ1 87 DQ37 31 OE0 115 RFU 59 VCC 143 VCC

4 DQ2 88 DQ38 32 VSS 116 VSS 60 DQ24 144 DQ60
5 DQ3 89 DQ39 33 A0 117 A1 61 RFU 145 RFU
6 VCC 90 VCC 34 A2 118 A3 62 RFU 146 RFU
7 DQ4 91 DQ40 35 A4 119 A5 63 RFU 147 RFU
8 DQ5 92 DQ41 36 A6 120 A7 64 RFU 148 RFU
9 DQ6 93 DQ42 37 A8 121 A9 65 DQ25 149 DQ61
10 DQ7 94 DQ43 38 A10 122 NC 66 DQ26 150 DQ62
Connector Key 39 NC 123 NC 67 DQ27 151 DQ63
11 DQ8 95 DQ44 40 VCC 124 VCC 68 VSS 152 VSS
12 VSS 96 VSS Connector Key 69 DQ28 153 DQ64
13 DQ9 97 DQ45 41 RFU 125 RFU 70 DQ29 154 DQ65
14 DQ10 98 DQ46 42 RFU 126 B0 71 DQ30 155 DQ66
15 DQ11 99 DQ47 43 VSS 127 VSS 72 DQ31 156 DQ67
16 DQ12 100 DQ48 44 OE2 128 RFU 73 VCC 157 VCC
17 DQ13 101 DQ49 45 RAS2 129 NC 74 DQ32 158 DQ68
18 VCC 102 VCC 46 CAS4 130 NC 75 DQ33 159 DQ69
19 DQ14 103 DQ50 47 RFU 131 RFU 76 DQ34 160 DQ70
20 DQ15 104 DQ51 48 WE2 132 PDE 77 DQ35 161 DQ71
21 DQ16 105 DQ52 49 VCC 133 VCC 78 VSS 162 VSS
22 DQ17 106 DQ53 50 NC 134 NC 79 PD1 163 PD2
23 VSS 107 VSS 51 NC 135 NC 80 PD3 164 PD4
24 NC 108 NC 52 DQ18 136 DQ54 81 PD5 165 PD6
25 NC 109 NC 53 DQ19 137 DQ55 82 PD7 166 PD8
168
84
26 VCC 110 VCC 54 VSS 138 VSS 83 ID0 167 ID1

27 WE0 111 RFU 55 DQ20 139 DQ56 84 VCC 168 VCC
28 CAS0 112 NC 56 DQ21 140 DQ57

A.3.3 UltraSPARC Module (Memory and UPA64S)
Connector J0101
TABLE A-14 UltraSPARC Module (Memory/UPA64S) Connector
Pin Signal Name Pin Signal Name Pin Signal Name
181 2 VID<1> 1 VID<0>

4 VID<3> 3 VID<2>
2 1
6 VID<4> 181 GND 5 NC
8 MFG_L 182 GND 7 GND
10 GND 183 GND 9 XCVR_CLK<0>
181 12 XCVR_CLK<1> 184 GND 11 GND
192 14 GND 13 XCVR_CLK<2>

16 XCVR_RD_CNTL<0> 15 GND
56 55
18 XCVR_SEL_L 17 XCVR_OEA_L
20 XCVR_RD_CNTL<1> 19 XCVR_OEB_L
22 XCVR_WR_CNTL<1> 21 XCVR_WR_CNTL<0>
24 GND 23 NC
26 RAM_ADR<02> 185 VDD 25 GND
28 RAM_ADR<03> 186 VDD 27 RAM_ADR<00>
34 RAM_ADR<09> 33 RAM_ADR<05>
40 GND 39 GND
42 UPA_DATABUS<02> 41 UPA_DATABUS<00>
46 UPA_DATABUS<06> 189 GND 45 UPA_DATABUS<03>

TABLE A-14 UltraSPARC Module (Memory/UPA64S) Connector (Continued)
66 UPA_DATABUS<26> 193 VDD 65 UPA_DATABUS<23>
58 57 72 UPA_DATABUS<32> 196 VDD 71 UPA_DATABUS<29>

193 76 UPA_DATABUS<36> 75 UPA_DATABUS<33>
80 NC 79 GND
82 VDD 81 NC
204 84 MEM_RAST_L<1> 83 MEM_WE_L
118 117 86 MEM_CAS_L<1> 197 GND 85 MEM_CAS_L<0>

88 MEM_RAST_L<2> 198 GND 87 MEM_RAST_L<0>
90 MEM_RASB_L<0> 199 GND 89 MEM_RAST_L<3>
92 MEM_RASB_L<2> 200 GND 91 MEM_RASB_L<1>
94 GND 93 MEM_RASB_L<3>
96 UPA_DATABUS<38> 95 VDD
104 UPA_DATABUS<46> 103 GND
112 GND 204 VDD 111 UPA_DATABUS<51>

TABLE A-14 UltraSPARC Module (Memory/UPA64S) Connector (Continued)

132 UPA_DATABUS<71> 208 GND 131 NC
134 VDD 133 UPA_ADDRESSBUS<14>
136 UPA_ADDRESSBUS<28> 135 UPA_ADDRESSBUS<13>
146 UPA_ADDRESSBUS<23> 209 VDD 145 UPA_ADDRESSBUS<08>
120 119
205
180 179
216 164 GND 163 VDD

166 NC 213 GND 165 UPA_CLK_POS
168 S_DATA 214 GND 167 UPA_CLK_NEG
170 GND 215 GND 169 GND
172 S_REPLY<2> 216 GND 171 ADR_VLD
174 P_REPLY<0> 173 P_REPLY<1>
176 S_REPLY<1> 175 S_REPLY<0>
178 S_LOAD 177 S_CLK
180 VDD 179 VDD

A.3.4 UltraSPARC Module (PCI-66) Connector J0102
TABLE A-15 PCI 66 Connector Pinouts
121 2 VDD CORE 1 VDD CORE

4 GND 3 GND
2 1
6 VDD CORE 121 VDD CORE 5 VDD CORE
8 GND 122 VDD CORE 7 GND
14 VDD CORE 13 VDD CORE
132 16 GND 15 GND
58 57 18 GND 17 GND
22 GND 21 GND
32 VDD CORE 128 VDD CORE 31 VDD CORE
34 GND 33 GND
38 GND 37 GND
40 PAD<01> 39 PAD<00>
42 PAD<03> 41 PAD<02>
44 PAD<05> 43 PAD<04>
46 PCBE_L<0> 129 GND 45 PAD<06>
48 PAD<09> 130 GND 47 PAD<07>
50 PAD<10> 131 GND 49 PAD<08>
52 PAD<12> 132 GND 51 PAD<11>
54 PAD<14> 53 PAD<13>
56 PCBE_L<01> 55 PAD<15>
58 PSERR_L 57 PPAR

TABLE A-15 PCI 66 Connector Pinouts (Continued)
60 PREQ_L<2> 59 NC
62 PDEVSEL_L 61 PPER_L
64 PIRDY_L 63 PREQ_L<3>
66 PCBE_L<02> 133 VDD +3.3V 65 PSTOP_L
68 PAD<17> 134 VDD +3.3V 67 PTRDY_L
70 PAD<19> 135 VDD +3.3V 69 PFRAME_L
72 PAD<21> 136 VDD +3.3V 71 PAD<16>
60 59 74 PAD<22> 73 PAD<18>
76 PAD<23> 75 PAD<20>
133
78 PCBE_L<03> 77 PREQ_L<1>
80 PAD<27> 79 PAD<24>
82 PAD<28> 81 PAD<25>
84 PAD<29> 83 PAD<26>
86 PAD<31> 137 GND 85 PAD<30>
120 119 88 PCI_CLK_SEL0 138 GND 87 PGNT_L<0>
90 PREQ_L<0> 139 GND 89 RESET_L
144
92 GND 140 GND 91 GND
94 PCI_REF_CLK 93 SB_PCI_CLK
96 GND 95 GND
98 PGNT_L<1> 97 PGNT_<2>
100 PGNT_L<3> 99 EMPTY<0>
102 DRAIN 101 EMPTY<1>
104 INT_NM<1> 103 INT_NM<0>
106 INT_NM<3> 141 VDD +3.3V 105 NT_NM<2>
108 INT_NM<5> 142 VDD +3.3V 107 INT_NM<4>
110 PB_RST_L 143 VDD +3.3V 109 SYS_RST_L
112 TCLK 144 VDD +3.3V 111 X_RST_L
114 TMS 113 MODULE_TDO
116 TEMP_SENSE1 115 MODULE_TDI
118 TEMP_SENSE0 117 TRST_L
120 EPD 119 PCI_CLK_SEL1

A.3.5 UPA64S (Vertical FFB) Connector J0601
This connector uses four contact blades in each cavity. The top pair (furthest from
the board) are separately wired and the bottom pair are connected. See Section AA
below.
TABLE A-16 UPA64S (Vertical FFB) Connector Pinouts
1 Pin Signal Name Pin Signal Name Pin Signal Name
1 VCC 2 VCC 3 VCC

A A
4 VCC 5 GND 6 VCC
7 SPARE0 8 VCC 9 VCC
10 SPARE2 11 GND 12 SPARE1
13 USB_DATA- 14 VCC 15 USB_DATA+
19 -12V 20 VCC 21 + 12V
22 UPA_DATABUS<61> 23 GND 24 + 12V
3 1
2
SECTION AA 73 UPA_DATABUS<29> 74 VDD 75 UPA_DATABUS<30>


1 82 UPA_DATABUS<23> 83 GND 84 UPA_DATABUS<24>
A A 85 UPA_DATABUS<21> 86 VDD 87 UPA_DATABUS<22>

Connector Key
118 VCC 119 GND 120 UPA_DATABUS<00>
121 VCC 122 VDD 123 VCC
124 TCLK2 125 GND 126 GND
127 MOD1_TDI 128 VDD 129 UPA_CLK_POS
130 A_TDI 131 GND 132 UPA_CLK_NEG
133 TRST_L 134 VCC 135 GND
3 1 136 MOD_TMS 137 GND 138 VCC
139 VCC 140 VCC 141 UPA_ADDRESSBUS<28>
2 142 UPA_ADDRESSBUS<27> 143 GND 144 UPA_ADDRESSBUS<26>
148 UPA_ADDRESSBUS<23> 149 GND 150 UPA_ADDRESSBUS<22>
SECTION AA

1 163 UPA_ADDRESSBUS<13> 164 VDD 165 UPA_ADDRESSBUS<12>

A A
184 UPA_P_REPLY<1> 185 GND 186 UPA_ADDRESS_VALID
187 UPA_P_REPLY<0> 188 VDD 189 UPA_P_REPLY<0>
190 UPA_P_REPLY<2> 191 GND 192 UPA_S_REPLY<1>
193 FFB_INT-L 194 VDD 195 UPA_RESET_L
196 SPEED<1> 197 GND 198 SPEED<0>
199 POWER_OK 200 VCC 201 SPEED<2>
205 SPARE10 206 VCC 207 SPARE11
211 VCC 212 VCC 213 SPARE3
214 VCC 215 GND 216 VCC
217 VCC 218 VCC 219 VCC
3 1
SECTION AA

A.3.6 PCI 32-Bit Connectors J2001, J2002, J2003
J2101, J2102, J2103
TABLE A-17 32-Bit PCI Connector Pinouts
B1 A1 Pin Side B Side A Pin Side B Side A

1 -12V TRST# 32 AD[17] AD[16]
2 TCK +12V 33 C/BE[2]# +3.3V
3 GND TMS 34 GND FRAME#
4 TDO TDI 35 IRDY# GND
5 +5V +5V 36 +3.3V TRDY#
6 +5V INTA# 37 DEVSEL# GND
7 INTB# INTC# 38 GND STOP#
8 INTD# +5V 39 LOCK# +3.3V
9 PRSNT1# Reserved 40 PERR# SDONE
10 Reserved +5V (I/O) 41 +3.3V SBO#
11 PRSNT#2 Reserved 42 SERR# GND
12 GND GND 43 +3.3V PAR
13 GND GND 44 C/BE[1]# AD[15]
14 Reserved Reserved 45 AD[14] +3.3V
15 GND RST# 46 GND AD[13]
16 CLK +5V (I/O) 47 AD[12] AD[11]
17 GND GNT# 48 AD[10] GND
18 REQ# GND 49 GND AD[09]
19 +5V (I/O) Reserved 50 Connector Key
20 AD[31] AD[30] 51 Connector Key
21 AD[29] +3.3V 52 AD[08] C/BE[0]#
B62 A62
22 GND AD[28] 53 AD[07] 3.3V
23 AD[27] AD[26] 54 +3.3V AD[06]
24 AD[25] GND 55 AD[05] AD[04]
25 +3.3V AD[24] 56 AD[03] GND
26 C/BE[3]# IDSEL 57 GND AD[02]
27 AD[23] +3.3V 58 AD[01] AD[00]
28 GND AD[22] 59 +5V (I/O) +5V (I/O)
29 AD[21] AD[20] 60 ACK64# REQ64#
30 AD[19] GND 61 +5V +5V
31 +3.3V AD[18] 62 +5V +5V

A.3.7 Internal SCSI Connector J1001
TABLE A-18 SCSI Internal Connector (Channel A) Pinouts

Pin Signal Name Pin Signal Name
1 GND 35 SCSI_AC_DAT<12>
1 35
5 GND 39 SCSI_AC_PAR<1>
14 GND 48 SCSI_AC_PAR<0>
15 GND 49 GND
16 GND 50 GND
17 TERMPWRA 51 TERMPWRA
18 TERMPWRA 52 TERMPWRA
19 GND 53 GND
20 GND 54 GND
21 GND 55 SCSI_AC_ATN_L
22 GND 56 GND
23 GND 57 SCSI_AC_BSY_L
24 GND 58 SCSI_AC_ACK_L
25 GND 59 SCSI_AC_RST_L
26 GND 60 SCSI_AC_MSG_L
34 68 27 GND 61 SCSI_AC_SEL_L
28 GND 62 SCSI_AC_CD_L
29 GND 63 SCSI_AC_REQ_L
30 GND 64 SCSI_AC_IO_L

A.3.8 External SCSI Connector J1003
TABLE A-19 SCSI External Connector (Channel B) Pinouts

1 GND 35 SCSI_BC_DAT<12>
1 35
5 GND 39 SCSI_BC_PAR<1>
14 GND 48 SCSI_BC_PAR<0>
15 GND 49 GND
16 GND 50 GND
17 TERMPWRB 51 TERMPWRB
18 TERMPWRB 52 TERMPWRB
19 GND 53 GND
20 GND 54 GND
21 GND 55 SCSI_BC_ATN_L
22 GND 56 GND
23 GND 57 SCSI_BC_BSY_L
24 GND 58 SCSI_BC_ACK_L
25 GND 59 SCSI_BC_RST_L
34 68 26 GND 60 SCSI_BC_MSG_L
27 GND 61 SCSI_BC_SEL_L
28 GND 62 SCSI_BC_CD_L
29 GND 63 SCSI_BC_REQ_L
30 GND 64 SCSI_BC_IO_L

A.3.9 Floppy Disk Drive Connector J1902
RNUGENT Part No. IDH-34LP-S3-TR
MOLEX Inc. Part No. 70246-3473
33 1
34 2
TABLE A-20 Floppy Connector
1 GND 2 FD_DENSEL
3 GND 4 33_Ω_to_VCC
5 GND 6 FD_DRATE0_MSEN0
7 N/C 8 FD_INDEX_L
9 GND 10 MTR0_L
11 GND 12 FD_DRV1_SEL_L
13 N/C 14 FD_DRV0_SEL_L
15 GND 16 FD_MTR1_L
17 MSEN1 18 FD_DIR_L
19 GND 20 FD_STEP_L
21 GND 22 FD_WR_DAT_L
23 GND 24 FD_WR_GATE_L
25 GND 26 FD_TRK0_L
27 MSEN0 28 FD_WR_PROT_L
29 GND 30 FD_RD_DAT_L
31 GND 32 FD_HD_SEL_L
33 GND 34 FD_DSK_CHNG_L

A.3.10 Serial Port Male Connector J1802
1 13
14 25
See TABLE A-27 on page A-27 for information and pinouts of “Y” cable serial port
adapter
TABLE A-21 DB-25 Serial Port Male Connector Pinouts
1 N/C 14 TXD-B
2 TXD-A 15 TRXC-A
3 RXD-A 16 RXD-B
4 RTS-A 17 RXC-A
5 CTS-A 18 TRXC-B
6 SYNC-A 19 RTS-B
7 Ground 20 DTR-A
8 DCD-A 21 NC
9 SYNC-B 22 NC
10 RXC-B 23 NC
11 DTR-B 24 TXC-A
12 DCD-B 25 TXC-B
13 CTS-B Metal Chassis Ground
Shell

A.3.11 Parallel Port Female Connector J0901
13 1
25 14
TABLE A-22 Parallel Port Connector Pinouts
Pin # Signal Name Pin # Signal Name
1 Strobe_out_l 14 Auto_feed_out_l
2 Data[0] 15 Errpr_in_l
3 Data[1] 16 Init_out_l
4 Data[2] 17 Select_in_l
5 Data[3] 18 GND
6 Data[4] 19 GND
7 Data[5] 20 GND
8 Data[6] 21 GND
9 Data[7] 22 GND
10 Ack_out_l 23 GND
11 Busy_out_l 24 GND
12 Pe_in 25 GND
13 Select_out

A.3.12 EtherNet Transceiver Connector TP J2301
Stewart Inc. Part No. SS-6488S-A-NF-SB02
MAXCONN Part No. MJHS-R-88
1 8
Twisted pair connection. Auto-configuration determines either 10BASE-T or

100BASE-T operation.
TABLE A-23 Type RJ-45 Connector
Pin # Signal Name
1 Transmit Data +
2 Transmit Data -
3 Receive Data +
4 Presence Detect Tx
5 Presence Detect Tx
6 Receive Data -
7 Presence Detect Rx
8 Presence Detect Rx

A.3.13 Sun Keyboard and Mouse J0902
FOXCONN Part No. MH11083-K2-HT
8 7 6
5 4 3
2 1
Mini DIN Connector
TABLE A-24 Sun Keyboard/Mouse Connector Pinouts
Pin # Signal
1 GND
2 GND
3 VCC KBD
4 MS in
5 SUN_KBD_OUT
6 VCC KBD
7 POWER_ON_L
8 VCC

A.3.14 Adapters
A.3.15 (PS/2) Keyboard and Mouse J2500 Mouse

Adapter J2501 Keyboard
6 5 6 5
Keyboard
3 3
Mouse
PS2
PS2
4 4
2 1 2 1
Motherboard
Connectors
PS/2 Back Panel and Adapter Connectors
TABLE A-25 PS/2 Mouse Connections
Signal DIN Connector Pin Motherboard Connector Pin
Data 1 1
NC 2
Gnd 3 2
Vcc 4 3
Clk 5 4
NC 6
TABLE A-26 PS/2 Keyboard Connections
Signal DIN Connector Pin Motherboard Connector Pin
Data 1 1
NC 2
Gnd 3 2
Vcc 4 3
Clk 5 4
NC 6

A.3.16 Serial Port Channels A and B
TABLE A-27 shows the signals on the two 25-pin connectors when using a “Y” cable to
separate serial channels A and B. See Appendix A.3.10 for serial connector pinouts.
The splitter cable is available from Y.C. Cable USA, Inc., 4568 Enterprise Street,
Fremont, CA 94538, part number DB25F-2M10.
I/O Panel Connector
A B
1 13 1 13
14 25 14 25
TABLE A-27 25-Pin Serial Channel A and B Connectors (Y Cable)
Pin A Signal Name Pin A Signal Name Pin B Signal Name Pin B Signal Name
1 NC 14 NC 1 NC 14 NC
2 TXD-A 15 TRXC-A 2 TXD-B 15 TRXC-B
3 RXD-A 16 NC 3 RXD-B 16 NC
4 RTS-A 17 RXC-A 4 RTS-B 17 RXC-B
5 CTS-A 18 NC 5 CTS-B 18 NC
6 SYNC-A 19 NC 6 SYNC-B 19 NC
7 Ground 20 DTR-A 7 Ground 20 DTR-B
8 DCD-A 21 NC 8 DCD-B 21 NC
9 NC 22 NC 9 NC 22 NC
10 NC 23 NC 10 NC 23 NC
11 NC 24 TXC-A 11 NC 24 TXC-B
12 NC 25 NC 12 NC 25 NC
13 NC Metal Chassis 13 NC Metal Chassis
Shell Ground Shell Ground

APPENDIX B
Mechanical Drawings
B.1 Ultra AXi Motherboard Dimensions

FIGURE B-1 shows a rear view of the Ultra AXi motherboard with dimensions to the
IO connectors and the IO aperture referenced to the mounting hole (0.000x0.000)
used as datum in FIGURE B-2.
158.75 131.9
(6.250) (5.193)
44.45
(1.750)
3.81
(0.150)
(5.256)
42.24
(9.150)
(8.559)
(5.926)
R1.8, 8X
133.5
232.4
217.4
150.5
(R0.071, 8X) (1.663)

30.5 (1.20) 49.1
(1.934)
20.4 (0.804)
15
13.9 (0.547) (0.590)
11.43 (0.450)
1.37 (0.054)
∅3.277, 4X 8.2 0.7
(∅0.129, 4X) (0.323) (0.028) R1.9, 2X
(R0.075, 2X)
(11.244)
(6.005)
(8.435)
214.25
(9.392)
(0.65)
152.5
238.6
285.5
16.5
Dimensions mm (inch)
FIGURE B-1 Ultra AXi Motherboard IO View
B-1
(167.35)
(182.24)
-0.1500
(227.33)
(20.32)
(22.86)
(34.29)
0.0310
0.3030
0.8000
0.9000
1.3500
(-3.81)
6.5885
7.1750
8.9501
(0.79)
(7.70)
11.3501
(288.29)
10.9380 11.1000
(277.83) (281.94)
10.7000 10.8750
(271.78) (276.22)
9.6390
(244.83)
8.7210
CPU MODULE
(221.51)
7.2500
(184.15)
6.3950
(162.43)
Pin 1
5.7660
(146.46)
5.350
(135.89)
4.9870
4.9000 (126.67)
(124.46)
4.3120
(109.52)
3.5120
(89.20) 3.4731
(88.22)
3.1000
(78.74)
2.7120
(68.88)
1.9120
(48.56)
1.1120
(28.24)
0.3120
(7.92)
0.0000 -0.3000
-0.3105 (-7.62)
(-7.89)
-0.6500
-0.4500 (-16.51)
(-11.43)
(0.94)
.0370
0.0000
-0.1000
(127.13)
(154.94)
(212.09)
(230.51)
(233.68)
(-2.54)
(31.12)
(79.35)
1.2250
3.1239
5.0050
6.1000
8.3500
9.0750
9.2001
(-10.16)
-0.4000
-0.2000
(-5.08)
DIMENSIONS INCHES (MILLIMETERS)
FIGURE B-2 Ultra AXi Motherboard Top View
B-2 SPARCengine Ultra AXi OEM Technical Manual • August 1998

B.2 Height Profiles
All height dimensions are measured from the component side of the Motherboard.
The Motherboard thickness 1.57 mm (0.062 inch) must be added to obtain the height
form the mounting pads of the enclosure. The Ultra AXi conforms to the ATX 2.01
specification height restrictions except in the space indicated by in the DIMM
slot area
9.25
(235)
Parallel/Serial 7.25
CPU Module (184.2)
Connector
48mm (1.89 inch)
Height Above 6.38
(162)
Motherboard
5.94
(151)
0.43 0.83 31
(11) (21) (1.22)
DIMM Socket Area
36mm (1.42 inch)
2.09
Some Enclosures May

Limit Height of DIMMs
Height Above
(53)
Usable in This Area

Motherboard when
using 31.75mm
(1.25 inch) DIMMs 108
(4.25)
CPU Module
112
(4.41)
175
Parallel/Serial (6.89)
Connector
32mm (1.26 inch)
Height Above
Motherboard
DIMM
Socket
Area
Dimensions inch (mm)
FIGURE B-3 Height Profile Top View
Appendix B Mechanical Drawings B-3

CPU Module
48 PCI Expansion Slots
(1.89) DIMM 36
Parallel Socket (1.42)
32 Area
(1.26) Serial
Connector 15.5
(0.61)
Dimension mm, (inch)

1.57
(0.62)
FIGURE B-4 Height Profile IO Side of Board
Parallel
Serial
Connector
CPU Module
48 DIMM
(1.89)
36 Socket
(1.42) Area 32
(1.26)
1.57 Dimension mm, (inch)

(0.62)
FIGURE B-5 Height Profile from Module End of Board
Except as described in the height profiles, no other vertically oriented component

exceeds 19mm, (.750 inch) in height. None of the horizontally oriented components
exceeds 5.6mm, (0.220 inch) in height.

B.3 Back Panel Connections
PS2
Mouse
PS2
Keyboard
Serial
Port
Parallel Sun Keyboard Ext. RJ45

Port Mouse SCSI Ethernet PS/2 Keyboard/Mouse
Adapter
FIGURE B-6 IO Panel of the Ultra AXi Motherboard

B.4 Thermal Map
Maximum Case Temperatures Measured Shown as (XX°C).
RAS Thermistors R3406, R3407, R3409 shown as
J1901
J0102
Serial/Parallel
U2901
Connectors
U1804 U1801 U1503 U0101 (110°C)

(90 °C) (95 °C) DC-DC
Conv
Buffer Buffer Buffer Latch
U1803 U0701 U1501 R3406
(90 °C)
(100 °C) (85 °C)
Buffer
APB RIC
U1802
(90 °C)
Xcvr
Buffer
Serial R3409
J0101
Xcvr
U2301 U1002 Buffer
(90 °C) (110°C)
SCSI SCSI SCSI SCSI SCSI SCSI
Enet Term Term Term Term Term Term U0201
Drvr
U1001 U0801 (105°C)
Xcvr
(100°C) (90°C) Buffer
U2201
SCSI PCIO
(110°C)
PHY
J2103
J0404
J0304
J0403
J0303
J0402
J0302
J0401
J0301
J2102 J0601
J2101
U1402
(90°C)
TOD/
J2003
NVRAM
U1301
U1403
J2002 (90°C) (90°C)
R3407
Super IO FLASH
J2001
J1001
FIGURE B-7 Ultra AXi Motherboard Thermal Map

TABLE B-1 Maximum Case Temperatures for Motherboard “Hot Spot” Components
Location Manufacturer Part Power Ambient Worst Case-

Number (Max) Operating Case
Temperature Temperature
Spec (°C) (Measured °C)
U0101 Texas Instruments SN74LVC374A 0.7W -40, 85 95

U0201 Pericom PI74LPT16244 1.0W -40, 85 105
U0701 Sun SME2411 3.5W 0, 70 100
U0801 Sun STP2003QFP 2.0W 0, 60 90
U1001 Symbios SYM53C876 1.0W 0, 70 100
U1002 Unitrode UC5606 1.0W -55, 150 110
U1301 National PC87307VUL 1.0W 0, 70 90
U1402 SGS Thomson M48T59 1.0W 0, 70 90
U1403 Intel 28F008SA-L 1.0W -20, 70 90
U1501 Sun STP2210QFP 0.5W 0, 70 85
U1802 Siemens SAB80352 0.5W 0, 70 90
U1803 Unitrode UC5170C 1.25W 0, 70 90
U1804 Unitrode UC5180C 1.20W 0, 70 90
U2201 National DP83840A 1.0W 0, 70 110
U2301 National DP83223 1.575W 0, 70 90
U2901 Raytheon RC5051 2.0W 0, 70 110

B.5 UltraSPARC IIi CPU Module Mechanical
Drawings
FIGURE B-8 and FIGURE B-9 show the 333 MHz, 300 MHz and 270 MHz Modules
FIGURE B-8 UltraSPARC IIi 333 MHz and 300 MHz Module

FIGURE B-9 UltraSPARC IIi 270 MHz Module

B-10
SPARCengine Ultra AXi OEM Technical Manual • August 1998
27.10
(1.067)
4.05 ±0.30
(0.159 ±0.012)
0.81 ±0.025
FIGURE B-10
(0.032 ±0.001)
1.57 ±0.20
(0.062 ±0.008) 10.92
UltraSPARC IIi Module
(0.430) Min
CPU Thermistor
(Under Heatsink)
130.00
(5.118)
44.500 (1.750) Nominal

100.00 44.975 (1.771) Worst Case
(3.937)
Dimensions mm, (Inch)
APPENDIX C
Assembly, Installation and Initial

Start Up Procedures
This appendix specifically addresses the reference configuration. Many configuration

possibilities exist, and the basic installation principles here should be applied.
Reference configuration
■ System boxed in a mid tower ATX type enclosure (Chenming Mold Co. Part No.
ATX601B-P)
■ Ultra AXi motherboard with UltraSPARC IIi CPU module
■ 128MB of memory on the motherboard
■ 3.5-inch floppy disk drive
■ 4GB hard disk drive
■ CD-ROM drive 12/20X speed
■ ATI Video Boost graphics card
■ Sun Type 5 keyboard and mouse
■ Solaris 2.6 rev. 3/98 or later
C.1 Before You Start

You may plan your system integration process in advance by using TABLE C-1 on
page C-2, TABLE C-2 on page C-3 and TABLE C-3 on page C-4.
Caution – These procedures should be performed only by qualified technicians. Be

sure to take appropriate precautions against electrical hazards.
Caution – As with all electronic devices, electronic circuit boards such as the Ultra
AXi components are extremely sensitive to static electricity. Ordinary amounts of
static from your clothes or work environment can destroy some devices. Therefore,
follow these guidelines:
■ Handle all boards only by the nonconducting edges
■ Do not touch the components to any metal parts
■ Always wear a grounding wrist strap connected to ground when working on
or handling the motherboard
C-1
C.1.1 Materials Required
TABLE C-1 Materials Required (May be duplicated and used to record materials used)
ID _____________________________ Ref. No. __________________ Date ______________________
Item Description Quan. Notes
Obtainable from Sun Microelectronics

1. Ultra AXi Motherboard Assembly 1
2. UltraSPARC-IIi Module 1
3. Solaris 2.6 Desktop Edition 1
4. Sun Type 5 Keyboard and Mouse 1
Obtainable from reputable electronics supplier
5. ATX style mid tower enclosure 1
6. ATX compliant power supply (250 watts) 1
7. 12V fan 1 (Optional)
8. CD-ROM Drive Plextor 12/20X or equivalent 1 5 inch bay
9. 5 inch bay
10. 5 inch bay
11. Hard drive 4GB, Seagate SCSI or equivalent 1 3 inch bay
12. 3 inch bay
13. Floppy drive 3.5 inch TEAC or equivalent 1 3 inch bay
14. 50 to 68 pin adapter, SCSI and floppy cables
15. 32MB Memory DIMMs 4 ea.
16. ATI-Video Boost PCI video graphics card 1 PCI Slot
17. PCI/UPA64S Slot
18. PCI Slot
19. PCI Slot
20. PCI Slot
21. PCI Slot
22. SVGA monitor 17" or any other desired screen size 1
23.
24.
25. Miscellaneous power cables, network cables, etc.
C-2 SPARCengine Ultra AXi OEM Technical Manual • August 1998

C.1.2 Power Budgeting
TABLE C-2 System and Peripheral Power Budgeting Requirements Table
(Duplicate and use as worksheet to budget for a specific configuration)
ID ___________________________Ref. No. _________________ Date_______________________
Device +3.3V +5.0V +12V -12V Notes
Motherboard 1.0A 2.0A 0.5A .05A
CPU Modules
270 MHz 1.6A 2.6A
300 MHz 2.2A 3.8A — —
333 MHz 1.6A (typ.) 7.2A 1
Memory — — — 2
PCI Card — 3
PCI Card —
PCI Card —
Fan-Sanyo Denki — — 0.13A —

Fan-NMB 0.22A 4
Subtotal on Motherboard
power connector (J1901)
Hard Drive — — 4
CD ROM Drive — — 4
Floppy Drive — — 4
Added Device — — 4
Added Device — — 4
Grand Total in Amps
Grand Total in Watts (AxV)
Total all Columns and add appropriate safety margin

for Power Supply requirement. _____ Watt + ___ % = _____ Watts
1. 5.0V is used to supply the 2.6 Vdd core voltage to the CPU. All values are
maximum unless otherwise specified.
2. Obtain specific power requirements from your DIMM vendor.
3. Obtain specific power requirements from your PCI card vendor.
4. Obtain specific power requirements from your equipment vendor.
Appendix C Assembly, Installation and Initial Start Up Procedures C-3

C.1.3 Software Installation Information
TABLE C-3 Installation Information Work Sheet
(May be Duplicated and Used to Record Build Data)
ID ___________________________________ Ref. No. _________________ Date _________________
Host Name
IP Address
Name Service (NIS, NIS+, Other
Domain Name
Name Server Host Name
Name Server IP Address
Connected to Network
Subnet
Subnet Mask
Geographic Location and Time Zone
Stand-alone or OS Server
OS Server - # of Diskless Clients
Configuration Cluster
System Disk
File System - root (/) 0
swap 1
3
4
5
6
7
Root Password
Notes:_____________________________________________________________________
___________________________________________________________________________

C.1.4 Tools Required
1. Phillips Screwdriver, #2.
2. Antistatic wrist strap.
3. Socket driver for 5mm. hex head screws.
C.2 Typical Assembly
▼ Procedure
1. Install power supply (if not already installed, normally supplied with enclosure).
2. Install additional fan below power supply (Optional fan).
3. Install the rear IO panel.
SERIAL
KEYBD
PARALLEL
FIGURE C-1 Ultra AXi IO Panel
4. Install the chassis standoffs (i.e., motherboard supports).
Note – Depending on access and clearances, it may be preferable to install some

peripherals and cables before the motherboard is installed.

5. Install the Ultra AXi motherboard
in the chassis.
Generally all ten motherboard

mounting screws are used, although 3 Screws
some installations delete the screw
marked “optional”, between the PCI 3 Screws
connectors and the back panel.
Optional
3 Screws
FIGURE C-2 Ultra AXi Motherboard Installation
6. Install CPU Module on motherboard.
a. Position the module over the connectors making

sure all pins are aligned with the connectors and J0102
press straight down, seating the module.
J0101
b. Install CPU hold down as shown in
FIGURE C-4 on page C-7
FIGURE C-3 UltraSPARC IIi Module

M3-.5 x 6 mm Long Phillips, Pan Head, Steel, Zinc
OR
6-32 x 1/4 inch Long Phillips, Pan Head, Steel, Zinc
FIGURE C-4
OR
4-40 x 1/4 inch Long Phillips, Pan Head, Steel, Zinc
Hold down Bracket

CPU Module Hold Down Installation
M/F Standoff, M3 x 22 mm Long, 6 mm Hex Al

OR
M/F Standoff, 6-32 x 7/8 inch Long, 1/4 inch Hex Al
OR
Appendix C
M/F Standoff, 4-40 x 7/8 inch Long, 1/4 inch Hex Al

Assembly, Installation and Initial Start Up Procedures
ASSEMBLY INSTRUCTIONS
Torque Screws to 5 in-lbs Part No., Serial No.

Tighten Screw “B” First and Date Code
Tighten Screw “A” Next
C-7
7. Install the PS/2 keyboard and mouse adapter.
Tip – Due to limited clearance, the adapter cable connectors should be connected to
the motherboard before the adapter is installed in the enclosure
a. Unscrew the retainer screw and remove the cover from the first expansion slot
adjacent to the RJ45 Ethernet connector. This is the preferred location to avoid
blocking PCI Expansion slots.
b. Connect the PS/2 mouse adapter cable to the motherboard header J2500.
c. Connect the PS/2 keyboard adapter cable to the motherboard header J2501.
d. Insert the tab of the PS/2 keyboard and mouse adapter in the expansion slot
and align the top retaining slot with the retainer screw hole.
e. Retain the PS/2 keyboard and mouse adapter with the screw removed in step a.
PS/2
Mouse
Port PS/2 Mouse Adapter Cable
(Connect to J2500) J2501
PS/2 J2500
Keyboard
Port
PS/2 Keyboard Adapter Cable
(Connect to J2501)
Insert
PS/2 Keyboard/Mouse Adapter Bracket
(install in rear panel card slot)
FIGURE C-5 Ultra AXi PS/2 Keyboard and Mouse Adapter
8. Install Serial, Parallel and SCSI

connector fasteners through IO panel.
SERIAL
a. Use four 4-40 x 4-40 female screw
locks to fasten the serial and parallel KEYBD
PARALLEL
connectors to the IO panel.
b. Use two 4-40 x 2-56 female screw

locks to fasten the SCSI connector to
the IO panel. 4-40 x 4-40 4-40 x 2-56
Four Places Two Places
FIGURE C-6 IO Panel Connector Panel Fasteners

9. Install the Hard Disk Drive
Note – If the DIMM slots are obstructed by the drive mount cage, skip to step 11.
a. Set the SCSI ID select as applicable. (Solaris default is 0, no jumper.) Consult

the drive label and manufacturer documentation for jumper information.
Two Screws
The lower bay is

the preferred location
for the Hard Drive
Disk Drive
Two Screws
FIGURE C-7 Ultra AXi Hard Drive Installation
10. Install the Floppy Drive
Floppy Drive
Two Screws
Jumper Set
for Floppy
Two Screws
FIGURE C-8 Ultra AXi Floppy Drive Installation

11. Install the CD ROM
a. Set the SCSI ID select as applicable. (Solaris default is 6.) Refer to the CD
ROM label and the manufacturers documentation for additional jumper
information.
Two Screws
ID Block Size
Plextor 12/20X
Jumper Panel
Two Screws
FIGURE C-9 Ultra AXi CD ROM Installation
Note – A block size of 512 bytes is selected when the jumper is placed as shown.
A 512 byte block size is required by Solaris.

12. Install DIMMs
For the reference enclosure, the DIMM modules can not exceed 1.25 inches
(31.75 mm) in height.
J0404
J0304
J0403
J0303
J0402
J0302
J0401
J0301
Pair 3
Pair 1
Pair 2
Pair 0
FIGURE C-10 Ultra AXi DIMM Installation
To install a DIMM on an Ultra AXi motherboard, perform the following steps:
Note – The DIMM slots are configured in 4 pairs of two slots. Slots J0403 and J0404
are Pair 0. Slots J0401 and J0402 are Pair 1. Slots J0303 and J0304 are Pair 2. Slots
J0301 and J0302 are Pair 3. See TABLE C-4 on page C-13 for specific configurations.
a. Attach an ESD wrist strap

b. Carefully remove the new DIMM from the protective packaging.
c. Hold the DIMM at the top left and right corners using the thumb and index
finger of each hand. Place DIMM in the socket. Be sure you orient the DIMM
so that the two notches at the bottom of the DIMM line up with the two tabs in
the DIMM connector.
d. Firmly push down simultaneously on both upper corners of the DIMM until
the bottom edge of the DIMM (the edge with the gold pads) is firmly seated
into the slot. You may hear or feel a “click” when the DIMM is properly seated.
e. Make sure the lever(s) on the end(s) of the connector are in the upright
position. Some Motherboards may have DIMM sockets with a lever on one end
only.

C.2.1 DIMM Configuration Considerations
1. Each DIMM Pair of 2 sockets must have identical DIMMs installed. The DIMM
Pairs may have different memory capacities or bank types as long as the DIMMs
within the Pair are identical.
2. DIMMs should be chosen as all 10-bit or all 11-bit column address type.
3. All DIMM sockets (4 Pairs) will support single or dual bank 10-bit column
address type DIMMs: 8MB, 16MB, 32MB, 64MB and 128MB.
4. 11-bit column address DIMMs may only be used in Pair 0 (Slots J0404, J0403) and
Pair 2 (Slots J0304, J0303). 256MB DIMMs must be 11-bit column address, dual
bank.
10-bit Column Address 11-bit Column Address
Pair 0 Pair 2 Pair 1 Pair 3 Pair 0 Pair 2

J0404
J0304
J0403
J0303
J0402
J0302
J0401
J0404
J0304
J0403
J0303
J0402
J0302
J0401
J0301
J0301
DO NOT USE
THESE SOCKETS
FIGURE C-11 DIMM Sockets Pair Assignments

The machine can be configured in many combinations of DIMMS in 16MB steps.
TABLE C-4 on page C-13 shows some of the more common combinations.
TABLE C-4 DIMM Configurations
Total 10-bit Column Address 11-bit Column Address

Memory
No of DIMM Case from No of DIMM Case from
DIMMs Size Table C-2 DIMMs Size Table C-3
32MB 4 8MB 3, 5, 6, 9, 10, 12 4 8MB 3

48MB 2 16MB 3, 5, 6, 9, 10, 12 2 16MB 3
2 8MB 2 8MB
6 8MB 7, 11, 13, 14
64MB 2 32MB 1, 2, 4, 8 2 32MB 1, 2
4 16MB 3, 5, 6, 9, 10, 12 4 16MB 3
8 8MB 15
4 8MB 7, 11, 13, 14
2 16MB
96MB 4 8MB 15
4 16MB
6 16MB 7, 11, 13, 14
4 8MB 7, 11, 13, 14
2 32MB
2 32MB 3, 5, 6, 9, 10, 12
2 16MB
128MB 4 32MB 3, 5, 6, 9, 10, 12 4 32MB 3
8 16MB 15
2 32MB 7, 11, 13, 14
4 16MB
2 64MB 1, 2, 4, 8 2 64MB 1, 2
192MB 6 32MB 7, 11, 13, 14
4 32MB 15
4 16MB
2 64MB 7, 11, 13, 14
4 16MB
2 64MB 3, 5, 6, 9, 10, 12 2 64MB 3
2 32MB 2 32MB

TABLE C-4 DIMM Configurations (Continued)
Total 10-bit Column Address 11-bit Column Address

Memory
No of DIMM Case from No of DIMM Case from
DIMMs Size Table C-2 DIMMs Size Table C-3
256MB 8 32MB 15
4 64MB 3, 5, 6, 9, 10, 12 4 64MB 3
4 32MB 7, 11, 13, 14
2 64MB
4 16MB 15
2 32MB
2 64MB
2 128MB 1, 2, 4, 8 2 128MB 1, 2
384MB 4 32MB 15
4 64MB
6 64MB 7, 11, 13, 14
2 128MB 3, 5, 6, 9, 10, 12 2 128MB 3
2 64MB 2 64MB
2 128MB 7, 11, 13, 14
4 32MB
512MB 8 64MB 15
4 64MB 7, 11, 13, 14
2 128MB
4 128MB 3, 5, 6, 9, 10, 12 4 128MB 3
2 256MB 1, 2
768MB 4 128MB 15
4 64MB
6 128MB 7, 11, 13, 14
2 256MB 3
2 128MB
1024MB 8 128MB 15
6 128MB 7, 11, 13, 14
4 256MB 3

TABLE C-5 Acceptable DIMM Locations 10-bit Column Address Mode
10-bit Column Address Mode
Pair 0 Pair 2 Pair 1 Pair 3

J0404, J0403 J0304, J0303 J0402, J0401 J0302, J0301
CASE 1
CASE 2
CASE 3
CASE 4
CASE 5
CASE 6
CASE 7
CASE 8
CASE 9
CASE 10
CASE 11
CASE 12
CASE 13
CASE 14
CASE 15
TABLE C-6 Acceptable DIMM Locations 11-bit Column Address Mode
11-bit Column Address Mode
Pair 0 Pair 2
J0404, J0403 J0304, J0303
DO NOT USE
CASE 1 THESE PAIRS
CASE 2
CASE 3

13. Connect internal power cables.
a. Connect ATX power cable to motherboard.
FIGURE C-12 Motherboard Power Connection
b. Connect hard drive power cable.
c. Connect floppy drive power cable.
d. Connect CD ROM power cable.
14. Connect floppy drive signal cable to motherboard connector
a. Connect floppy drive cable between the

floppy disk drive and the motherboard
connector J1902.
FIGURE C-13 Floppy Drive Motherboard Connection

15. Connect the SCSI cable to the motherboard and the
SCSI devices.
Note – There are two SCSI configurations, depending

on the hard drive connector. If the hard drive has a
standard 68 pin SCSI connector, follow steps a. through
c. If the hard drive has an SCA (Single Connector
Attachment) connector, follow steps d. through f.
Standard SCSI hard drive connection

a. Connect one end of the SCSI cable to the internal
SCSI connector J1001. The SCSI controller on the
motherboard has active termination, no settings are
needed.
FIGURE C-14 Internal SCSI Connector
b. Connect the second connector of the SCSI cable to the 68 pin end of the 68 pin
to 50 pin adapter and connect the 50 pin connector of the adapter to the CD
ROM. Set the jumper as shown in FIGURE C-9 on page C-10 and set the target ID
to 6. The terminator must be DISABLED.
c. Connect the last end of the SCSI cable to the hard disk drive. The terminator
must be ENABLED. Set the device ID jumper to 0. Refer to the label on the
hard disk drive to identify the jumper locations.
SCA SCSI hard drive connection
d. Connect one end of the SCSI cable to the internal SCSI connector J1001. The
SCSI controller on the motherboard has active termination, no settings are
needed.
e. Connect the second connector of the SCSI cable to the 68 pin end of the 68 pin
to 50 pin adapter and connect the 50 pin connector of the adapter to the CD
ROM. Set the jumper as shown in FIGURE C-9 on page C-10 and set the target ID
to 6. The terminator must be DISABLED.
f. Connect the last end of the SCSI cable to the SCA to SCSI adapter and connect
the adapter to the hard disk drive. The terminator on the hard disk drive must
be ENABLED. Set the device ID jumper to 0. Refer to the label on the hard disk
drive to identify the jumper locations.

16. Connect the front panel cables to the motherboard headers.
a. Connect the front panel Power On-Off

switch to motherboard header J3301.
J3301
FIGURE C-15 Power On-Off Header
b. Connect Power On LED motherboard

header J1990.
Some LED cables have 3-pin connectors. If
this is the case the connector may need to be
modified to make the LED functional.
J1990
FIGURE C-16 Power On LED Header
c. Connect the speaker wires to motherboard

header J3201.
J3201
FIGURE C-17 Speaker Header

d. Connect Reset Switch cable to Pins 2 and 3
on motherboard header J1501
J1501
FIGURE C-18 Reset Switch header
17. Connect optional fan power cable to motherboard header

J3603.
J3603
FIGURE C-19 Optional Fan Power Cable Motherboard Header
18. Connect optional fan power cable to

motherboard header J3602.
J3602
FIGURE C-20 Optional Fan Power Cable Motherboard Header

19. Install ATI Video Card
Note – Be sure to follow instructions from PCI card vendor.
a. Carefully remove the new PCI card from

the protective packaging.
b. Ensure the jumper on the card is set to
Interrupt Enable.
c. Hold the card by its edges, align the
contacts on the bottom of the card with
the slots in the socket.
d. Apply pressure evenly along the length
of the PCI card and push it into its
motherboard connector socket. When
doing this action and the motherboard ATI Video Card
is inside a case such as an ATX mini-
tower, be sure that the connector bracket
is properly seated on the back panel.
e. Use a hex head machine screw and
attach the connector bracket to the back
panel.
FIGURE C-21 ATI Video Boost PCI Card
20. To Complete Assembly
a. Tie all cables and wires as needed.
b. Apply labels.
c. Install enclosure feet.
d. Install blank plates over unused PCI slots.
e. Install enclosure cover.

21. Make all external connections.
Note – Ensure power supply and monitor power switches are off.
a. Connect monitor signal cable from ATI Video Boost connector to monitor.
b. Connect keyboard cable to keyboard connector as applicable.
c. Connect network cable as applicable.
d. Connect power cables to power supply input and monitor.
e. Connect power cables to appropriate power outlets.
C.3 Initial Power-On and Firmware Update

22. Power up the system.
a. Position power supply switch to ON, position monitor power switch to ON

then press front panel power switch.
Video should be displayed in 90 seconds.
23. Perform the following diagnostic steps.
a. Verify the following information is correct before continuing to the next step.
Valid memory configuration is displayed on the banner.
Valid ethernet address is displayed on the banner.
b. At the ok prompt, type:

ok probe-scsi-all <cr>
It may take 5 minutes to complete this probe. Make sure all devices are
recognized by the system. Ensure the CD ROM is recognized as target 6.
c. At the ok prompt, type:

ok .version <cr>
24. Determine if OBP needs to be Updated.
The motherboard was shipped with the latest version of OBP available at the time of
manufacture.
The diskette shipped with the motherboard may contain a later version of OBP,
which can be used to update.
Information on the latest version of OBP may be found at the URL:

http://www.sun.com/microelectronics/SPARCengineUltraAXi/
Instructions are provided at the Web site to download and update OBP.
25. Update the OBP
a. Insert the diskette into the floppy disk drive.
b. At the ok prompt, type:

ok load floppy:nolabel<cr>
ok init-program<cr>
Follow the on screen instructions, answer prompts as appropriate.
c. At the ok prompt, type:

ok reset-all<cr>
C.4 Software Installation

The information from TABLE C-3 on page C-4 as appropriate to perform the software
installation.
To install the system from the CD ROM, go to Step 26.

To install the system from a network, go to Step 27.
26. To install the system from the CD ROM, at the ok prompt, type:
ok boot cdrom <cr>
System will boot from the CD ROM and Solaris will install from the CD ROM.
Various prompts will be displayed as the system comes up, answer as
appropriate.
27. To install the system from a network boot server, the boot client Ethernet address
(the system being built) must be obtained.
a. At the ok prompt (on the system being built) type:

ok banner <cr>
This will display the Ethernet address in the following format:
X.X.XX.X.X.XX
b. Enter the address obtained in step a. in the boot server as a boot client. (See the
Solaris documentation to set up an install server).
c. At the ok prompt on the client (the system being built), type:

ok boot net <cr>
System will boot from the network and Solaris will install from the network.
Various prompts will be displayed as the system comes up, answer as
appropriate.
28. After Solaris is installed, at the ok prompt, type:

ok boot disk -rv <cr>
The system will configure itself after installation,
C.5 System Aging Test

29. Obtain SunVTS using the procedures described in Appendix H.
a. Install SunVTS following the procedures shown in Appendix H.
b. Run SUNvts for 24 hours as a stand-alone system. See Appendix H.

The following tests need to be selected and tested in the SunVTS:
KMEM
PMEM
CPU
SYSTEM
SE
ECPP
CDTEST
FDD
DISKTEST

APPENDIX D
Schematics
This appendix presents schematics of the I/O sections of the Ultra AXi motherboard.
TABLE D-1 List of Schematics
Circuit Sheet Page
UltraSPARC IIi Module Connectors 1 D-2

168 Pin EDO DIMM Sockets 3 D-3
168 Pin EDO DIMM Sockets 4 D-4
UPA64S (Vert FFB) Connector, Power Connector 6 D-5
Sun Keyboard and Mouse Connector, Parallel Port 9 D-6
53C876 Dual Channel SCSI 10 D-7
PC87307 Super I/O 13 D-8
EB_Latch, Flash, NVRAM, ROMBO Connector 14 D-9
RISC, Scan 15 D-10
SAB, Serial Ports 19 D-11
PCI Bus B Connectors 20 D-12
PCI Bus A Connectors 21 D-13
100MBit XCVR 23 D-14
PS/2 Keyboard and Mouse Headers 25 D-15
Core Regulator, Test Edge Connectors 29 D-16
TDR Traces, Speaker 32 D-17
Power Management 33 D-18
RAS 36 D-19
D-1
D-2
8 7 6 5 4 3 2 1
AMPCONN180 LOGIC: UltraSPARC IIi MODULE CONNECTORS
ZPACK F J0105 1-2 MODULE IN SCAN CHAIN
VID0 1 2 VID1 J0105 2-3 MODULE BYPASSED IN SCAN CHAIN
OUT 1 2 OUT 29A6<
VID2 3 J0101 4 VID3
OUT OUT 29A6<
5 6 VID4 OUT 29A6<
7 181 8 MFG_L
XCVR_CLK<0> 9 182 10
OUT
11 183 12 XCVR_CLK<1> 5A5<
OUT
XCVR_CLK<2> 13 184 14 J0105
OUT
15 16 XCVR_RD_CNTL<0> 5A3< 5A5< 5A8< 5C3< 5C6< 5C8< JMP3
D OUT DIP
XCVR_OEA_L 17 18 XCVR_SEL_L 5A3< 5A5< 5A8< 5C3< 5C6< 5C8< 1 MODULE_TDO 1A3>
OUT OUT D
XCVR_OEB_L 19 20 XCVR_RD_CNTL<1> 5A3< 5A5< 5A8< 5C3< 5C6< 5C8< 2 CPU_TDO
OUT OUT
XCVR_WR_CNTL<0> 21 VDD 22 XCVR_WR_CNTL<1> 5A3< 5A5< 5A8< 5C3< 5C6< 5C8< 3 MODULE_TDI 15C6>
OUT OUT
23 +3.3V 24 RAM_ADR<12..00> 1D8> 2C4<
OUT
RAM_ADR<12..00> 25 26 02 VDD
OUT
00 27 185 28 03 +3.3V
01 29 186 30 06
04 31 187 32 08 U0101
7
18
31
42
05 33 188 34 09
07 35 36 10 VDD
11 37 38 12 V3 +3.3V
DAT<71..00> 39 40 DAT<71..00> 1D8<> 5C1<> 6B3<> 6B8<> J0102
BI BI LVC16374 VDD CORE
00 41 42 02
01 43 44 04 PCI_CLK 48
SSOP
16B1> IN 1CLK
03 45 46 06 25 AMPCONN120
2CLK
05 47 189 48 08 PD4 1 1OE
IN AMPCONN F
07 49 190 50 10 PU5 24 2OE 1 2
IN
09 51 191 52 12 3 4
11 53 192 54 14 37 12 5 6
1D8 1Q8
13 55 56 16 38 11 7 121 8
1D7 1Q7
15 57 58 18 15C6> INT_NUM<5> 40 1D6 9 INT_NM<5> 1A1 31A7< 9 122 10
IN 1Q6 OUT
17 59 60 20 15C6> INT_NUM<4> 41 1D5 8 INT_NM<4> 1A3 31A6< 11 123 12
IN 1Q5 OUT
19 61 62 22 15C6> INT_NUM<3> 43 6 INT_NM<3> 1A1 31B6< 13 124 14
IN 1D4 1Q4 OUT
C 21 63 64 24 15C6> INT_NUM<2> 44 5 INT_NM<2> 1A3 31A7< 15 16 C
IN 1D3 1Q3 OUT
23 65 66 26 15C6> INT_NUM<1> 46 3 INT_NM<1> 1A1 31B6< 17 18
IN 1D2 1Q2 OUT
25 67 193 68 28 15C6> INT_NUM<0> 47 1D1 2 INT_NM<0> 1A3 31B6< 19 20
IN 1Q1 OUT
27 69 194 70 30 21 22
29 71 195 72 32 PU2 26 23 23 24
IN 2D8 2Q8
31 73 196 74 34 27 22 25 26
2D7 2Q7
33 75 76 36 29 2D6 20 27 125 28
2Q6
35 77 78 37 30 2D5 19 29 126 30
2Q5
79 80 PU3 32 17 31 127 32
IN 2D4 2Q4
81 82 33 16 33 128 34
2D3 2Q3
MEM_WE_L 83 84 MEM_RAST_L<1> 2A8< 35 14 35 36
OUT OUT 2D2 2Q2
MEM_CAS_L<0> 85 86 MEM_CAS_L<1> 2C8< 36 2D1 13 7A8< 7C8<> 1C1<> PAD<31..00> 37 38 PAD<31..00>
OUT OUT 2Q1 BI BI
MEM_RAST_L<0> 87 197 88 MEM_RAST_L<2> 2A8< 00 39 40 01
OUT OUT
MEM_RAST_L<3> 89 198 90 MEM_RASB_L<0> 2B8< 02 41 42 03
OUT OUT
MEM_RASB_L<1> 91 199 92 MEM_RASB_L<2> 2B8< GND 04 43 44 05 PCBE_L<3..0>
OUT OUT BI
MEM_RASB_L<3> 93 200 94 06 45 46 0
OUT
4
95 96 38 07 47 129 48 09
10
15
21
28
39
34
45
39 97 98 40 08 49 130 50 10
41 99 100 42 11 51 131 52 12
43 101 102 44 13 53 132 54 14
103 104 46 15 55 56 1
45 105 106 48 7C8< PPAR 57 58 PSERR_L
BI BI
47 107 201 108 50 59 60 PREQ_L<2>
B GND IN B
49 109 202 110 52 7C8< PPERR_L 61 62 PDEVSEL_L
BI BI
51 111 203 112 PREQ_L<3> 63 64 PIRDY_L

IN BI
53 113 204 114 54 7C8< PSTOP_L 65 66 2
BI
55 115 116 56 7C8< PTRDY_L 67 133 68 17
BI
57 117 118 58 7C8< PFRAME_L 69 134 70 19
BI
59 119 120 60 16 71 135 72 21
61 121 122 62 18 73 136 74 22
63 123 124 64 20 75 76 23
65 125 126 66 PREQ_L<1> 77 78 3
IN
67 127 205 128 68 24 79 80 27
69 129 206 130 70 25 81 82 28
UADR<28..00> 131 207 132 71 26 83 84 29
OUT
14 133 208 134 UADR<28..00> 6B3< 6B8< 30 85 86 31
OUT 1B8>
13 135 136 28 31A8< 7A8< PGNT_L<0> 87 137 88 PCI_CLK_SEL0
OUT
12 137 138 27 2C8< RESET_L 89 138 90 PREQ_L<0>
OUT IN
11 139 140 26 91 139 92
10 141 142 25 16B1> PCI_REF_CLK 93 140 94 SB_PCI_CLK
IN IN
09 143 144 24 95 96
08 145 146 23 PGNT_L<2> 97 98 PGNT_L<1>
IN IN
07 147 209 148 22 7A8> EMPTY<0> 99 100 PGNT_L<3>
IN IN
06 149 210 150 21 EMPTY<1> 101 102 DRAIN
IN OUT
05 151 211 152 20 INT_NM<0> 103 104 INT_NM<1>
04 153 212 154 19 INT_NM<2> 105 106 INT_NM<3>
03 155 156 18 INT_NM<4> 107 141 108 INT_NM<5>
A 02 157 158 17 15D3<> SYS_RST_L 109 142 110 PB_RST_L
IN IN
01 159 160 16 15C6> X_RST_L 111 143 112 TCLK
IN IN A
00 161 162 15 1D2< MODULE_TDO 113 144 114 TMS
OUT IN
163 164 15C6> MODULE_TDI 115 116 TEMP_SENSE_POS
IN OUT
UPA_CLK_POS 165 166 15C6> TRST_L 117 118 TEMP_SENSE0
OUT IN OUT
UPA_CLK_NEG 167 213 168 S_DATA PCI_CLK_SEL1 119 120 EPD
OUT IN 2C6>
169 214 170
ADR_VLD 171 215 172 S_REPLY<2>
OUT OUT 6A3<
P_REPLY<1> 173 216 174 P_REPLY<0> DRAWING
IN IN 6A8>
S_REPLY<0> 175 176 S_REPLY<1>
OUT OUT 6A8<
S_CLK 177 178 S_LOAD
IN IN 15A6>
179 179
180
GND 180 GND
COPYRIGHT (C) 1998 SUN MICROSYSTEMS. ALL RIGHTS RESERVED.
sun USE, REPRODUCTION OR DISCLOSURE IS PROHIBITED EXCEPT UNDER WRITTEN LICENSE SHEET: 1
BY SUN MICROSYSTEM INC. USE OF COPYRIGHT NOTICE IS PRECAUTIONARY ONLY
microsystems AND DOES NOT IMPLY PUBLICATION OR DISCLOSURE.
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LOGIC: 168PIN EDO DIMM SOCKETS
RAM_DATA<143..000>
BI
BMEM_ADDR<12..00>
IN
D DRAM168P J0301 DRAM168P J0302 DRAM168P J0303 DRAM168P J0304
1
R0301 MODULE MODULE MODULE MODULE D
100OHM
SIMM-EJ1 SIMM-EJ1 SIMM-EJ1 SIMM-EJ1
123 A13 123 A13 123 A13 123 A13
12 39 A12 12 39 A12 12 39 A12 12 39 A12
2
11 122 A11 DQ71 161 071 11 122 A11 DQ71 161 143 11 122 A11 DQ71 161 071 11 122 A11 DQ71 161 143
10 38 A10 DQ70 160 070 10 38 A10 DQ70 160 142 10 38 A10 DQ70 160 070 10 38 A10 DQ70 160 142
09 121 A09 DQ69 159 069 09 121 A09 DQ69 159 141 09 121 A09 DQ69 159 069 09 121 A09 DQ69 159 141
08 37 A08 DQ68 158 068 08 37 A08 DQ68 158 140 08 37 A08 DQ68 158 068 08 37 A08 DQ68 158 140
07 120 A07 DQ67 156 067 07 120 A07 DQ67 156 139 07 120 A07 DQ67 156 067 07 120 A07 DQ67 156 139
06 36 A06 DQ66 155 066 06 36 A06 DQ66 155 138 06 36 A06 DQ66 155 066 06 36 A06 DQ66 155 138
GND 119 DQ65 154 119 DQ65 154 119 DQ65 154 119 DQ65 154
05 A05 065 05 A05 137 05 A05 065 05 A05 137
04 35 A04 DQ64 153 064 04 35 A04 DQ64 153 136 04 35 A04 DQ64 153 064 04 35 A04 DQ64 153 136
03 118 A03 DQ63 151 063 03 118 A03 DQ63 151 135 03 118 A03 DQ63 151 063 03 118 A03 DQ63 151 135
02 34 A02 DQ62 150 062 02 34 A02 DQ62 150 134 02 34 A02 DQ62 150 062 02 34 A02 DQ62 150 134
01 117 A01 DQ61 149 061 01 117 A01 DQ61 149 133 01 117 A01 DQ61 149 061 01 117 A01 DQ61 149 133
00 33 A00 DQ60 144 060 00 33 A00 DQ60 144 132 00 33 A00 DQ60 144 060 00 33 A00 DQ60 144 132
BMEM_ADDRB<00> 126 B00 DQ59 142 059 2C1> BMEM_ADDRB<00> 126 B00 DQ59 142 131 2C1> BMEM_ADDRB<00> 126 B00 DQ59 142 059 2C1> BMEM_ADDRB<00> 126 B00 DQ59 142 131
IN
DQ58 141 058 DQ58 141 130 DQ58 141 058 DQ58 141 130
RAM_RAST3_L<1> 129 RAS3 DQ57 140 057 2A6> RAM_RAST3_L<1> 129 RAS3 DQ57 140 129 2A6> RAM_RAST2_L<1> 129 RAS3 DQ57 140 057 2A6> RAM_RAST2_L<1> 129 RAS3 DQ57 140 129
IN IN
RAM_RASB3_L<1> 45 RAS2 DQ56 139 056 2A6> RAM_RASB3_L<1> 45 RAS2 DQ56 139 128 2B6> RAM_RASB2_L<1> 45 RAS2 DQ56 139 056 2B6> RAM_RASB2_L<1> 45 RAS2 DQ56 139 128
IN IN
RAM_RAST3_L<0> 114 RAS1 DQ55 137 055 2A6> RAM_RAST3_L<0> 114 RAS1 DQ55 137 127 2A6> RAM_RAST2_L<0> 114 RAS1 DQ55 137 055 2A6> RAM_RAST2_L<0> 114 RAS1 DQ55 137 127
IN IN
RAM_RASB3_L<0> 30 RAS0 DQ54 136 054 2A6> RAM_RASB3_L<0> 30 RAS0 DQ54 136 126 2B6> RAM_RASB2_L<0> 30 RAS0 DQ54 136 054 2B6> RAM_RASB2_L<0> 30 RAS0 DQ54 136 126
IN IN
RAM_CAS1_L<1> 130 CAS5 DQ53 106 053 2C6> RAM_CAS1_L<1> 130 CAS5 DQ53 106 125 2C6> RAM_CAS1_L<1> 130 CAS5 DQ53 106 053 2C6> RAM_CAS1_L<1> 130 CAS5 DQ53 106 125
IN
C RAM_CAS1_L<0> 46 CAS4 DQ52 105 052 2C6> RAM_CAS1_L<0> 46 CAS4 DQ52 105 124 2C6> RAM_CAS1_L<0> 46 CAS4 DQ52 105 052 2C6> RAM_CAS1_L<0> 46 CAS4 DQ52 105 124 C
IN
IN
IN
RAM_WE1_L 48 WE2 DQ49 101 049 2B6> RAM_WE1_L 48 WE2 DQ49 101 121 2B6> RAM_WE1_L 48 WE2 DQ49 101 049 2B6> RAM_WE1_L 48 WE2 DQ49 101 121
IN 27
RAM_WE0_L 27 WE0 DQ48 100 048 2B6> RAM_WE0_L 27 WE0 DQ48 100 120 2B6> RAM_WE0_L 27 WE0 DQ48 100 048 2B6> RAM_WE0_L WE0 DQ48 100 120
IN
R0302 44 OE2 DQ47 99 047 R0304 44 OE2 DQ47 99 119 R0306 44 OE2 DQ47 99 047 R0308 44 OE2 DQ47 99 119
1 2 31 OE0 DQ46 98 046 1 2 31 OE0 DQ46 98 118 1 2 31 OE0 DQ46 98 046 1 2 31 OE0 DQ46 98 118
100OHM DQ45 97 045 100OHM DQ45 97 117 100OHM DQ45 97 045 100OHM DQ45 97 117
R0303 167 ID1 DQ44 95 044 R0305 167 ID1 DQ44 95 116 R0307 167 ID1 DQ44 95 044 R0309 167 ID1 DQ44 95 116
1KOHM 83 ID0 DQ43 94 043 1KOHM 83 ID0 DQ43 94 115 1KOHM 83 ID0 DQ43 94 043 1KOHM 83 ID0 DQ43 94 115
1 2 132 PDE DQ42 93 042 1 2 132 PDE DQ42 93 114 1 2 132 PDE DQ42 93 042 1 2 132 PDE DQ42 93 114
GND 166 PD8 DQ41 92 GND 166 PD8 DQ41 92 GND 166 PD8 DQ41 92 GND 166 PD8 DQ41 92
041 113 041 113
82 PD7 DQ40 91 040 82 PD7 DQ40 91 112 82 PD7 DQ40 91 040 82 PD7 DQ40 91 112
VDD 163 PD2 DQ35 77 035 VDD 163 PD2 DQ35 77 107 VDD 163 PD2 DQ35 77 035 VDD 163 PD2 DQ35 77 107
+3.3V 79 PD1 DQ34 76 034 +3.3V 79 PD1 DQ34 76 106 +3.3V 79 PD1 DQ34 76 034 +3.3V 79 PD1 DQ34 76 106
DQ33 75 033 DQ33 75 105 DQ33 75 033 DQ33 75 105
168 DQ32 74 032 168 DQ32 74 104 168 DQ32 74 032 168 DQ32 74 104
157 DQ31 72 031 157 DQ31 72 103 157 DQ31 72 031 157 DQ31 72 103
143 DQ30 71 030 143 DQ30 71 102 143 DQ30 71 030 143 DQ30 71 102
B 133 DQ29 70 029 133 DQ29 70 101 133 DQ29 70 029 133 DQ29 70 101 B
124 DQ28 69 028 124 DQ28 69 100 124 DQ28 69 028 124 DQ28 69 100
110 DQ27 67 027 110 DQ27 67 099 110 DQ27 67 027 110 DQ27 67 099
102 DQ26 66 026 102 DQ26 66 098 102 DQ26 66 026 102 DQ26 66 098
90 DQ25 65 025 90 DQ25 65 097 90 DQ25 65 025 90 DQ25 65 097
84 VCC DQ24 60 024 84 VCC DQ24 60 096 84 VCC DQ24 60 024 84 VCC DQ24 60 096
73 DQ23 58 023 73 DQ23 58 095 73 DQ23 58 023 73 DQ23 58 095
59 DQ22 57 022 59 DQ22 57 094 59 DQ22 57 022 59 DQ22 57 094
49 DQ21 56 021 49 DQ21 56 093 49 DQ21 56 021 49 DQ21 56 093
40 DQ20 55 020 40 DQ20 55 092 40 DQ20 55 020 40 DQ20 55 092
26 DQ19 53 019 26 DQ19 53 091 26 DQ19 53 019 26 DQ19 53 091
18 DQ18 52 018 18 DQ18 52 090 18 DQ18 52 018 18 DQ18 52 090
6 DQ17 22 017 6 DQ17 22 089 6 DQ17 22 017 6 DQ17 22 089
DQ16 21 016 DQ16 21 088 DQ16 21 016 DQ16 21 088
162 DQ15 20 015 162 DQ15 20 087 162 DQ15 20 015 162 DQ15 20 087
152 DQ14 19 014 152 DQ14 19 086 152 DQ14 19 014 152 DQ14 19 086
138 DQ13 17 013 138 DQ13 17 085 138 DQ13 17 013 138 DQ13 17 085
127 DQ12 16 012 127 DQ12 16 084 127 DQ12 16 012 127 DQ12 16 084
116 DQ11 15 011 116 DQ11 15 083 116 DQ11 15 011 116 DQ11 15 083
107 DQ10 14 010 107 DQ10 14 082 107 DQ10 14 010 107 DQ10 14 082
96 DQ09 13 009 96 DQ09 13 081 96 DQ09 13 009 96 DQ09 13 081
85 DQ08 11 008 85 DQ08 11 080 85 DQ08 11 008 85 DQ08 11 080
78 VSS DQ07 10 007 78 VSS DQ07 10 079 78 VSS DQ07 10 007 78 VSS DQ07 10 079
68 DQ06 9 006 68 DQ06 9 078 68 DQ06 9 006 68 DQ06 9 078
A 54 DQ05 8 005 54 DQ05 8 077 54 DQ05 8 005 54 DQ05 8 077
43 DQ04 7 004 43 DQ04 7 076 43 DQ04 7 004 43 DQ04 7 076
32 DQ03 5 003 32 DQ03 5 075 32 DQ03 5 003 32 DQ03 5 075 A
23 DQ02 4 002 23 DQ02 4 074 23 DQ02 4 002 23 DQ02 4 074
12 DQ01 3 001 12 DQ01 3 073 12 DQ01 3 001 12 DQ01 3 073
1 DQ00 2 000 1 DQ00 2 072 1 DQ00 2 000 1 DQ00 2 072
DRAWING
Appendix D
GND GND GND GND
(BANK ORIENTATION DESIGNED TO ACCOMODATE TALL STACKED DIMMS IN BANKS 0 & 2 FARTHEST FROM BOARD EDGE)
BY SUN MICROSYSTEMS INC. USE OF COPYRIGHT NOTICE IS PRECAUTIONARY ONLY
8 7 6 5 4 3 2 1
Schematics
D-3
D-4
8 7 6 5 4 3 2 1
LOGIC: 168PIN EDO DIMM SOCKETS
RAM_DATA<143..000>
BI
BMEM_ADDR<12..00>
IN
D DRAM168P J0401 DRAM168P J0402 DRAM168P J0403 DRAM168P J0404
1
R0401 MODULE MODULE MODULE MODULE D
100OHM
SIMM-EJ1 SIMM-EJ1 SIMM-EJ1 SIMM-EJ1
123 A13 123 A13 123 A13 123 A13
12 39 A12 12 39 A12 12 39 A12 12 39 A12
DQ71 DQ71
2
11 122 A11 DQ71 161 071 11 122 A11 161 143 11 122 A11 161 071 11 122 A11 DQ71 161 143
10 38 160 070 10 38 DQ70 160 142 10 38 DQ70 160 070 10 38 DQ70 160 142
A10 DQ70 A10 A10 A10
09 121 DQ69 159 069 09 121 DQ69 159 141 09 121 DQ69 159 069 09 121 DQ69 159 141
A09 A09 A09 A09
08 37 A08 DQ68 158 068 08 37 A08 DQ68 158 140 08 37 A08 DQ68 158 068 08 37 A08 DQ68 158 140
07 120 A07 DQ67 156 067 07 120 A07 DQ67 156 139 07 120 A07 DQ67 156 067 07 120 A07 DQ67 156 139
GND 06 36 155 066 06 36 DQ66 155 138 06 36 DQ66 155 066 06 36 DQ66 155 138
A06 DQ66 A06 A06 A06
05 119 154 065 05 119 DQ65 154 137 05 119 DQ65 154 065 05 119 DQ65 154 137
A05 DQ65 A05 A05 A05
04 35 A04 DQ64 153 064 04 35 A04 DQ64 153 136 04 35 A04 DQ64 153 064 04 35 A04 DQ64 153 136
03 118 A03 DQ63 151 063 03 118 A03 DQ63 151 135 03 118 A03 DQ63 151 063 03 118 A03 DQ63 151 135
02 34 A02 150 062 02 34 A02 DQ62 150 134 02 34 A02 DQ62 150 062 02 34 A02 DQ62 150 134
DQ62
01 117 A01 149 061 01 117 A01 DQ61 149 133 01 117 A01 DQ61 149 061 01 117 A01 DQ61 149 133
DQ61 DQ60 DQ60 DQ60
00 33 A00 DQ60 144 060 00 33 A00 144 132 00 33 A00 144 060 00 33 A00 144 132
BMEM_ADDRB<00> 126 B00 DQ59 142 059 2C1> BMEM_ADDRB<00> 126 B00 DQ59 142 131 2C1> BMEM_ADDRB<00> 126 B00 DQ59 142 059 2C1> BMEM_ADDRB<00> 126 B00 DQ59 142 131
IN
DQ58 141 058 DQ58 141 130 DQ58 141 058 DQ58 141 130
RAM_RAST1_L<1> 129 140 057 RAM_RAST1_L<1> 129 DQ57 140 129 2A6> RAM_RAST0_L<1> 129 DQ57 140 057 2A6> RAM_RAST0_L<1> 129 DQ57 140 129
IN RAS3 DQ57 2A6> RAS3 RAS3 RAS3
RAM_RASB1_L<1> 45 139 056 RAM_RASB1_L<1> 45 DQ56 139 128 2B6> IN RAM_RASB0_L<1> 45 DQ56 139 056 2B6> RAM_RASB0_L<1> 45 DQ56 139 128
IN RAS2 DQ56 2B6> RAS2 RAS2 RAS2
RAM_RAST1_L<0> 114 RAS1 137 055 2A6> RAM_RAST1_L<0> 114 RAS1 DQ55 137 127 2A6> IN RAM_RAST0_L<0> 114 RAS1 DQ55 137 055 2A6> RAM_RAST0_L<0> 114 RAS1 DQ55 137 127
IN DQ55 IN
RAM_RASB1_L<0> 30 RAS0 136 054 2A6> RAM_RASB1_L<0> 30 RAS0 DQ54 136 126 2B6> RAM_RASB0_L<0> 30 RAS0 DQ54 136 054 2B6> RAM_RASB0_L<0> 30 RAS0 DQ54 136 126
IN DQ54 IN 2C6>
RAM_CAS1_L<1> 130 CAS5 106 053 2C6> RAM_CAS1_L<1> 130 CAS5 DQ53 106 125 2C6> RAM_CAS1_L<1> 130 CAS5 DQ53 106 053 RAM_CAS1_L<1> 130 CAS5 DQ53 106 125
IN DQ53 105 2C6>
C RAM_CAS0_L<1> 46 CAS4 DQ52
105 052
2C6> RAM_CAS0_L<1> 46 CAS4 DQ52 105 124 2C6> RAM_CAS1_L<0> 46 CAS4 DQ52 052 RAM_CAS1_L<0> 46 CAS4 DQ52 105 124 C
IN 104 DQ51 DQ51 104 2C6> DQ51
RAM_CAS1_L<0> 112 CAS1 DQ51 051 2C6> RAM_CAS1_L<0> 112 CAS1 104 123 2C6> RAM_CAS0_L<1> 112 CAS1 051 RAM_CAS0_L<1> 112 CAS1 104 123
IN 2C6>
RAM_CAS0_L<0> 28 CAS0 DQ50 103 050 2C6> RAM_CAS0_L<0> 28 CAS0 DQ50 103 122 2C6> RAM_CAS0_L<0> 28 CAS0 DQ50 103 050 RAM_CAS0_L<0> 28 CAS0 DQ50 103 122
IN
RAM_WE1_L 48 WE2 101 049 2B6> RAM_WE1_L 48 WE2 DQ49 101 121 2B6> RAM_WE1_L 48 WE2 DQ49 101 049 2B6> RAM_WE1_L 48 WE2 DQ49 101 121
IN DQ49
RAM_WE0_L 27 WE0 100 048 2B6> RAM_WE0_L 27 WE0 DQ48 100 120 2B6> RAM_WE0_L 27 WE0 DQ48 100 048 2B6> RAM_WE0_L 27 WE0 DQ48 100 120
IN DQ48 99 DQ47 DQ47 99 DQ47
R0402 44 OE2 DQ47 047 R0404 44 OE2 99 119 R0406 44 OE2 047 R0408 44 OE2 99 119
1 2 31 OE0 98 046 1 2 31 OE0 DQ46 98 118 1 2 31 OE0 DQ46 98 046 1 2 31 OE0 DQ46 98 118
DQ46
100OHM 97 040 100OHM DQ45 97 117 100OHM DQ45 97 045 100OHM DQ45 97 117
DQ45 044 116
R0403 167 ID1 95 R0405 167 ID1 DQ44 95 R0407 167 ID1 DQ44 95 044 R0409 167 ID1 DQ44 95 116
DQ44 94 94
1KOHM 83 ID0 043 1KOHM 83 ID0 DQ43 94 115 1KOHM 83 ID0 DQ43 043 1KOHM 83 ID0 DQ43 94 115
132 DQ43 93 93
1 2 PDE 042 1 2 132 PDE DQ42 93 114 1 2 132 PDE DQ42 042 1 2 132 PDE DQ42 93 114
GND DQ42 GND GND GND
166 PD8 92 041 166 PD8 DQ41 92 113 166 PD8 DQ41 92 041 166 PD8 DQ41 92 113
DQ41
82 PD7 91 040 82 PD7 DQ40 91 112 82 PD7 DQ40 91 040 82 PD7 DQ40 91 112
DQ40 89 039 DQ39 111 DQ39 89 DQ39
165 PD6 165 PD6 89 165 PD6 039 165 PD6 89 111
DQ39 88 DQ38 DQ38 88 DQ38
81 PD5 038 81 PD5 88 110 81 PD5 038 81 PD5 88 110
DQ38 87 DQ37 DQ37 87 DQ37
164 PD4 037 164 PD4 87 109 164 PD4 86 037 164 PD4 87 109
DQ37 036 108 036
80 PD3 86 80 PD3 DQ36 86 80 PD3 DQ36 80 PD3 DQ36 86 108
DQ36
VDD 163 PD2 77 VDD 163 PD2 DQ35 77 107 VDD 163 PD2 DQ35 77 035 VDD 163 PD2 DQ35 77 107
DQ35 035
+3.3V 79 PD1 76 034 +3.3V 79 PD1 DQ34 76 106 +3.3V 79 PD1 DQ34 76 034 +3.3V 79 PD1 DQ34 76 106
DQ34 75 DQ33 DQ33 75 DQ33
033 75 105 033 75 105
DQ33
168 DQ32 74 032 168 DQ32 74 104 168 DQ32 74 032 168 DQ32 74 104
157 DQ31 72 031 157 DQ31 72 103 157 DQ31 72 031 157 DQ31 72 103
143 DQ30 71 030 143 DQ30 71 102 143 DQ30 71 030 143 DQ30 71 102
B 133 70 029 133 DQ29 70 101 133 DQ29 70 029 133 DQ29 70 101 B
DQ29 DQ28 DQ28 DQ28

124 69 124 69 124 69 124
DQ28 028 100 028 69 100
110 67 027 110 DQ27 67 099 110 DQ27 67 027 110 DQ27 67 099
DQ27 098
102 DQ26 66 026 102 DQ26 66 098 102 DQ26 66 026 102 DQ26 66
90 65 025 90 DQ25 65 097 90 DQ25 65 025 90 DQ25 65 097
84 VCC DQ25 60 VCC 84 VCC 60 VCC 096
024 84 DQ24 60 096 DQ24 024 84 DQ24 60
DQ24 095
73 DQ23 58 023 73 DQ23 58 095 73 DQ23 58 023 73 DQ23 58
59 57 022 59 DQ22 57 094 59 DQ22 57 022 59 DQ22 57 094
DQ22 093
49 56 021 49 DQ21 56 49 DQ21 56 021 49 DQ21 56 093
DQ21 55 DQ20 092 DQ20 55
40 020 40 55 40 020 40 DQ20 55 092
DQ20 53 DQ19 DQ19 53 DQ19
26 019 26 53 091 26 019 26 53 091
DQ19
18 52 018 18 DQ18 52 090 18 DQ18 52 018 18 DQ18 52 090
DQ18
6 22 017 6 DQ17 22 089 6 DQ17 22 017 6 DQ17 22 089
DQ17 088
21 016 DQ16 21 DQ16 21 016 DQ16 21 088
162 DQ16 20 162 20
015 162 DQ15 20 087 DQ15 015 162 DQ15 20 087
DQ15
152 19 014 152 DQ14 19 086 152 DQ14 19 014 152 DQ14 19 086
DQ14 085 085
138 17 013 138 DQ13 17 138 DQ13 17 013 138 DQ13 17
DQ13 16 084 16 084
127 DQ12 012 127 DQ12 16 127 DQ12 012 127 DQ12 16
15 083 15
116 DQ11 011 116 DQ11 15 116 DQ11 011 116 DQ11 15 083
107 DQ10 14 107 DQ10 14 107 DQ10 14 010 107 DQ10 082
010 082 14
96 DQ09 13 009 96 DQ09 13 081 96 DQ09 13 009 96 DQ09 13 081
85 DQ08 11 008 85 DQ08 11 080 85 DQ08 11 008 85 DQ08 11 080
78 VSS DQ07 10 007 78 VSS DQ07 10 079 78 VSS DQ07 10 007 78 VSS DQ07 10 079
68 DQ06 9 006 68 DQ06 9 078 68 DQ06 9 006 68 DQ06 9 078
54 DQ05 8 54 DQ05 54 DQ05 8 DQ05 077
A 005 8 077 005 54 8
43 DQ04 7 004 43 DQ04 7 076 43 DQ04 7 004 43 DQ04 7 076
32 DQ03 5 003 32 DQ03 5 075 32 DQ03 5 003 32 DQ03 5 075 A
23 DQ02 4 002 23 DQ02 4 074 23 DQ02 4 002 23 DQ02 4 074
12 DQ01 3 001 12 DQ01 3 073 12 DQ01 3 001 12 DQ01 3 073
1 DQ00 2 000 1 DQ00 2 072 1 DQ00 2 000 1 DQ00 2 072
DRAWING
GND GND GND GND
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LOGIC: UPA64S (VERT FFB) CONNECTOR, POWER CONNECTOR
+12V VCC -12V

(+5 VDC)
VDD J0601
+3.3V
CONN219
D AMP
DUAL73 HSCF D
3 VCC 2 VCC VCC 1
6 VCC GND 5 VCC 4
9 VCC 8 VCC SPARE0 7
12 SPARE1 GND 11 SPARE2 10
15 USB_DATA+ 14 VCC USB_DATA- 13
21 +12V 20 VCC -12V 19
24 +12V GND 23 D63 22 63
27 D62 26 VDD D61 25 61
30 D60 GND 29 D59 28 59
33 D58 32 VDD D57 31 57
36 D56 GND 35 D55 34 55
39 D54 38 VDD D53 37 53
42 D52 GND 41 D51 40 51
45 D50 44 VDD D49 43 49
48 D48 GND 47 D47 46 47
51 D46 50 VDD D45 49 45
54 D44 GND 53 D43 52 43
57 D42 56 VDD D41 55 41
60 D40 GND 59 D39 58 39
63 D38 62 VDD D37 61 37
C 66 D36 GND 65 D35 64 35 C
69 D34 68 VDD D33 67 33
72 D32 GND 71 D31 70 31
75 D30 74 VDD D29 73 29
78 D28 GND 77 D27 76 27
81 D26 80 VDD D25 79 25
84 D24 GND 83 D23 82 23
87 D22 86 VDD D21 85 21
90 D20 GND 89 D19 88 19
93 D18 92 VDD D17 91 17
96 D16 GND 95 D15 94 15
99 D14 98 VDD D13 97 13
102 D12 GND 101 D11 100 11
105 D10 104 VDD D9 103 09
108 D8 GND 107 D7 106 07
111 D6 110 VDD D5 109 05
114 D4 113 D3 112 03
117 D2 116 D1 115 01
6B3<> 120 D0 GND 119 VCC 118 DAT<63..00>
5C1<> BI 1D5<> 1D8<> 5C1<> 6B8<>
1D5<> DAT<63..00> 123 VCC 122 VDD VCC 121
1D8<>
BI GND TCLK
126 GND 125 124 TCLK2 15C6>
IN
1A8> UPA_CLK_POS 129 CLK+ 128 VDD TDI 127 MOD1_TDI 15C6>
IN IN
1A8> UPA_CLK_NEG 132 CLK- GND 131 TDO 130 A_TDI 21D6<
B IN OUT B
135 GND 134 VCC TRST 133 TRST_L
IN 15C6>
UADR<28..00> 138 VCC GND 137 TMS 136 MOD1_TMS
1A5> IN IN 15B6>
1B8> 141 A28 140 VCC
VDD VCC 139 UADR<28..00> 1A5> 1B8>
IN
144 A26 GND 143 A27 142 27
147 A24 146 VDD A25 145 25
150 A22 GND 149 A23 148 23
153 A20 152 VDD A21 151 21
156 A18 155 A19 154 19
159 A16 158 VDD A17 157 17
162 A14 GND 161 A15 160 15
165 A12 164 VDD A13 163 13
168 A10 GND 167 A11 166 11
171 A8 170 VDD A9 169 09
174 A6 GND 173 A7 172 07
177 A4 176 VDD A5 175 05
180 A2 GND 179 A3 178 03
183 A0 182 VDD A1 181 01
1A8>
ADR_VLD 186 ADDR-VAL GND 185 P-REPLY3<1> 184 P_REPLY<1> 1A8<
IN OUT
1A5< P_REPLY<0> 189 P-REPLY3<0> 188 VDD S-REPLY3<0> 187 S_REPLY<0> 1A8>
OUT IN
1A5> S_REPLY<1> 192 S-REPLY3<1> GND 191 S-REPLY3<2> 190 S_REPLY<2> 1A5>
IN IN
2C6> PRST_L 195 UPA_RESET 194 VDD GFX_INT 193 FFB_INT_L 15B8< 31 31C7<
IN OUT
SPEED<0> 198 SPEED<0> GND 197 SPEED1 196 SPEED<1> 8C2< 25C7<
OUT 200 OUT 34B4<>
SPEED<2> 201 SPEED<2> VCC POWER-OK 199 POWER_OK 19D6>
OUT IN
204 SPARE9 GND 203[ SPARE8 202
A 207 SPARE11 206 VCC SPARE10 205
213 SPARE3 212 VCC VCC 211 A
216 VCC GND 215 VCC 214
219 VCC 218 VCC VCC 217
DRAWING
UPA64S (VERTICAL FFB) CONNECTOR
GND
Appendix D
8 7 6 5 4 3 2 1
Schematics
D-5
D-6
8 7 6 5 4 3 2 1
LOGIC:
VCC
(+5 VDC)
U0901 PARALLEL PORT
L0907
IPEC1284 J0901
QSOP
ACA5020
20 VCC PPSTB_L 11 12 PAR_DS_L_CONN 9D3 FDB25 F
PP_SLIN_L 19 1 PPSLIN_L PPAUTO_FD_L 9 10 PAR_AFXN_L_CONN FDIPEX
IN PAR_DS_L_CONN
PP_INIT_L 18 2 PPINIT_L PPD0 7 8 PPDAT0_CONN 1 PAR_AFXN_L_CONN
D IN
PP_ERROR_L 17 3 PPERROR_L PPD1 5 6 PP_DAT1_CONN 14
IN PP_DAT0_CONN D
PP_AUTO_FD_L 16 4 PPAUTO_FD_L PPERROR_L 3 4 PAR_ERROR_L_CONN 9D1 2 PAR_ERROR_L_CONN
IN
13D4< PP_STB_L 15 5 PPSTB_L PPINIT_L 1 2 PAR_INIT_L_CONN 9D1
9D3 15
BI PP_DAT1_CONN
14 6 PPD0 9D3 3
13 7 PPD1 IN OUT 16
PAR_INIT_L_CONN
9D1 PP_DAT2_CONN
12 8 PPD2 4
11 9 PPD4 17
PAR_SLIN_L_CONN
PP_DAT3_CONN 5
GND 10 L0908
C=180PF R1=4.7K
13B4< PP_DAT<7..0> R2=33 18 PPGND
BI PP_DAT4_CONN
0 ACA5020 6
1 PPD5 1 2 PP_DAT5_CONN 9D3 19
2 3 4 PPGND PP_DAT5_CONN 7
9D1
4 PPD4 5 6 PP_DAT4_CONN 9D3 20
3 PPD3 7 8 PP_DAT3_CONN PP_DAT6_CONN 8
U0902 9D3
5 PPSLIN_L 9 10 PAR_SLIN_L_CONN 9D1 21
IPEC1284 PPD2 11 12 PP_DAT2_CONN PP_DAT7_CONN 9
6 9D3
QSOP
7 22
PAR_ACK_L_CONN
20 VCC IN OUT 10
19 1 PPD3 23
18 2
PAR_BUSY_CONN 11
PPD5
17 3 PPD6 L0909 24
16 4 PPD7 GND PAR_PE_CONN 12
15 5 ACA5020 25
PP_ACK_L 14 6 PPACK_L PPSLCT_L 1 2 PAR_SEL_L_CONN PAR_SEL_L_CONN 13
C 13D4< BI 9C3 C
13D4< PP_BUSY 13 7 PPBUSY PPBUSY 3 4 PAR_BUSY_CONN 9C3
BI
PP_PE 12 8 PPPE PPPE 5 6 PAR_PE_CONN 9C3
PP_SLCT_L 11 9 PPSLCT_L PPACK_L 7 8 PAR_ACK_L_CONN 9C3
GND 10 PPD7 9 10 PP_DAT7_CONN 9C3
C=180PF R1=4.7K
R2=33 PPD6 11 12 PP_DAT6_CONN 9C3
IN OUT
GND
VCC
(+5 VDC)
SUN KEYBOARD AND MOUSE CONNECTOR

R0901 R0903 R0902
2
2
CHGND \G
B B
10
11
9
VCC L0901 J0902
4.7KOHM
4.7KOHM
4.7KOHM
1
1
(+5 VDC) CHGND
SMT L0905 SMT
F0901 BLM41A01 1 2 SUN_KBD_IN_L
SMT DIN8MINI R/A

DIP MMZ2012Y202B
8
7
6
1 FUSE 2 1 2 VCC_KBD L0904 SMT
H G F
1.3A 1 2 POWERON_L 33A5< 33D6<
OUT 14A4<
MMZ2012Y202B L0903 SMT
3
4
5
1 2 SUN_KBD_OUT_L 9A3>
C D E
MMZ2012Y202B
L0906 SMT
2
1
2
1 2 SUN_MS_IN_L
A B
+1
2
MMZ2012Y202B
680PF
V0903 C0903
2
16V 10%
C0901 C0902
1UF SMTTANT
150A 680PF
1
U0904
SMT GND_KBD
1
2
2
1 2 F04
BLM41A01 V0902 V0901 SUN_KBD_OUT 5 6 SUN_KBD_OUT_L 9B4< 29B8<
IN SO
L0902
2
150A 150A
820PF
10%
1
1
GND GND
C0904
U0904
A F04
SUN_KBD_IN_L 9 SO 8 SUN_KBD_IN OUT 13C4< A
9B7 CHGND \G
CHGND
U0904
F04
SUN_MS_IN_L 11 10 SUN_MS_IN DRAWING
SO OUT 13C4<
sun USE, REPRODUCTION OR DISCLOSURE IS PROHIBITED EXCEPT UNDER WRITTEN LICENSE

SHEET: 9
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LOGIC: 53C876 DUAL CHANNEL SCSI
R1006 VCC
(+5 VDC)
0OHM J1004
AAD<12> 1 2 SCSI_IDSEL J1003 EXT SCSI CH B
JMP3 VCC U1008
SCSI_TDI 1DIP (+5 VDC) CONN68 F
22B4> PHY_TDO 2 UCC3912 F
SCSI_TDO 3 C1015 SO 1 1 35
35 SCSI_BC_DAT<12>
6
13
22
31
39
47
55
206
90
124
138
172
75
186
64
131
201
1 SHUTDOWN 16 29C8<> 29C7<> TERMPWRA 2 36 SCSI_BC_DAT<13>
FAULTOUT 2 36
SCSI IN LOOP : 2-3 2 15 3 37 SCSI_BC_DAT<14>
D
2
VDDIO VDD VDDC SCSI BYPASS : 1-2 3 VIN VOUT 14 C1014 4 38 SCSI_BC_DAT<15>
6 B3 11 5 39 SCSI_BC_PAR<1> D
CT
16V
1
1
1
4
.1UF
7 B2 6 40 SCSI_BC_DAT<0>
1
+1
1
8 B1 5 7 41 SCSI_BC_DAT<1>
.1UF
.1UF
.1UF
B2_CLK_U1001 197 65 CLK_40M 9 B0 GND 12 8 42
10UF
IN CLK SYM53C876 SCLK 8C2> SCSI_BC_DAT<2>
2
2
2
2
.1UF
ASD15-0 SCSI_A_DAT<15..0> 10 29C7<>29C8<> 13 9 43 SCSI_BC_DAT<3>
SMTTANT
29C8<> IMAX
2
ARST_L 196 SCSI_A_PAR<1..0> 10 44
20%
IN RDT A_SDP1-0 29C7<> SCSI_BC_DAT<4>
PQFP A_SC_D 146 SCSI_A_CD_L 29C7<> 11 45 SCSI_BC_DAT<5>
29C7<> GND
AAD<31..00> AD31-0 A_SI_O 144 SCSI_A_IO_L C1007 C1008 C1009 C1010 12 46 SCSI_BC_DAT<6>
BI 29C7<> GND
A_SMSG 149 SCSI_A_MSG_L 29C8<> 13 47 SCSI_BC_DAT<7>
ACBE_L<3..0> 145 GND 14 48 SCSI_BC_PAR<0>
BI CBE3-0 A_SREQ SCSI_A_REQ_L 29C8<> GND
A_SCTRL_L S_SACK 151 SCSI_A_ACK_L 15 49
152 GND
A_PAR PAR A_SBSY SCSI_A_BSY_L 29C8<> VCC U1009 16 50
BI 154 (+5 VDC)
A_SATN SCSI_A_ATN_L 29C7<> 17 51
A_FRAME_L 150 SCSI_A_RST_L 29C8<> TERMPWRB 18 52 TERMPWRB
BI FRAME A_SRST 148 UCC3912
A_TRDY_L TRDY U1001 A_SSEL SCSI_A_SEL_L 29C8<> C1017 SO 19 53
BI
A_SDIR15-0 1 SHUTDOWN 16 TERMPWRB 20 54
FAULTOUT
A_IRDY_L 23 IRDY A_SDIRP0/1 173 VCC 2 15 21 55 SCSI_BC_ATN_L
BI (+5 VDC)
A_STOP_L 28 STOP A_BSYDIR 132 R1007 3 VIN VOUT 14 C1016 22 56
BI
A_SELDIR 128 6 B3 11 23 57 SCSI_BC_BSY_L
CT
16V
.1UF
A_DEVSEL_L 26 DEVSEL A_RSTDIR 130 4.7KOHM 7 4 24 58 SCSI_BC_ACK_L
BI B2
+
SCSI_IDSEL 7 IDSEL A_DIFFSENS 125 1 2 8 5 25 59 SCSI_BC_RST_L
B3
.1UF
.1UF
.1UF
127 9 GND 12 26 60 SCSI_BC_MSG_L
10UF
A_IGS SINGLE-ENDED B0
.1UF
AREQ_L<0> 200 REQ A_TGS 126 10 13 27 61 SCSI_BC_SEL_L
SMTTANT
C OUT IMAX
C
AGNT_L<0> 199 28 62 SCSI_BC_CD_L
20%
IN GNT
B_SD15-0 SCSI_B_DAT<15..0> 29 63 SCSI_BC_REQ_L
GND
A_SERR_L 32 SERR B_SDP1-0 SCSI_B_PAR<1..0> C1018 C1011 C1012 C1013 30 64 SCSI_BC_IO_L
BI GND
A_PERR_L 30 PERR B_SC_D 98 SCSI_B_CD_L 31 65 SCSI_BC_DAT<8>
BI GND
B_SI_O 96 SCSI_B_IO_L 32 66 SCSI_BC_DAT<9>
GND
SCSI_INTA_L 195 INTA B_SMSG 101 SCSI_B_MSG_L 33 33 67
67 SCSI_BC_DAT<10>
OUT GND
SCSI_INTB_L 194 INTB B_SREQ 97 SCSI_B_REQ_L 34 34 68
68 SCSI_BC_DAT<11>
OUT
B_SCTRL_L B_SACK 103 SCSI_B_ACK_L
68 A_GPIOO_FETCH B_SBSY 104 SCSI_B_BSY_L 95P VCC
69 106 SCSI_B_ATN_L (+5 VDC)
A_GPIO1_MASTER B_SATN DONOTSTUFF R1008
70 A_GPIO2 B_SRST 102 SCSI_B_RST_L 10C8> SCSI_INTB_L SB2_INTR_L<7>
GND GND
71 A_GPIO3 B_SSEL 100 SCSI_B_SEL_L 4.7KOHM
73 A_GPIO4 R1002 10C8> SCSI_INTA_L 1 2
84 B_GPIO0_FETCH J1001 INT SCSI CH A

86 B_GPIO1_MASTER R1009 CONN68 F
1
87 B_GPIO2
22
21
88 B_GPIO3 C1003 20% U1004 4.7KOHM FV
89 B_GPIO4 2.2UF 16V 10C8> SCSI_INTB_L 1 2 1 1 35
35 SCSI_A_DAT<12>
2
TESTIN 66 2 2 36
36 SCSI_A_DAT<13>
191 MWE TCK 60 TCLK3 15C6> 3 SCSI_B_DAT<11> 3 37 SCSI_A_DAT<14>
193 62 2 4 38
SSOP
MCE TMS TMS1_5V 15B6> SCSI_B_DAT<10> R1005 SCSI_A_DAT<15>
B 192 61 SCSI_TDI GND 1 5 39 B
MOE_TESTOUT TDI SCSI_B_DAT<9> SCSI_A_PAR<1>
Reg_out
24
190 MAS0 TDO 63 SCSI_TDO SCSI_B_MSG_L 1KOHM 6 40 SCSI_A_DAT<0>
189 MAS1 23 SCSI_B_SEL_L 10B4 10A4 10A3 TERMDIS 1 2 7 41 SCSI_A_DAT<1>
MAD<7..0> MAD7-0 14 SCSI_B_CD_L 8 42 SCSI_A_DAT<2>
67 13 SCSI_B_REQ_L 9 43 SCSI_A_DAT<3>
129 12 SCSI_B_IO_L R1001 10 44 SCSI_A_DAT<4>
TERM LINES (9)

GNDC
198 11 SCSI_B_DAT<8> 11 45 SCSI_A_DAT<5>
R1017 GND GNDS 1KOHM 12 46 SCSI_A_DAT<6>
UC5606PLUS
Termpwr
DISCONNECT
10A7 10A6 10A5 TMPWR_DIS 13 47 SCSI_A_DAT<7>
2
9
14 48 SCSI_A_PAR<0>
15
19
94
99
163
168
153
158
100OHM
110
115
120
142
147
51
133
188
41
178
105
24
29
35
45
57
72
85
MAD<4> 15 49
15
16
204
10
TERMPWRB TERMDIS 16 50
17 51
29C8<> 29C7<> TERMPWRA 18 52 TERMPWRA
19 53
1
1
1
1
1
20 54
GND
C1006 20% C1004 20% C1005 20% C1001 20% C1002 20% 21 55 SCSI_A_ATN_L
21
22
21
22
22
21
21
22
21
22
2.2UF 16V U1007 2.2UF 16V U1005 2.2UF 16V U1006 2.2UF 16V U1002 2.2UF 16V U1003 22 56
2
2
2
2
2
23 57 SCSI_A_BSY_L
24 58 SCSI_A_ACK_L
3 SCSI_A_DAT<11> 3 SCSI_A_DAT<3> 3 SCSI_A_RST_L 3 SCSI_B_DAT<3> 3 SCSI_B_RST_L 25 59 SCSI_A_RST_L
GND GND GND GND GND
SSOP
SSOP
SSOP
SSOP
SSOP
2 SCSI_A_DAT<10> 2 SCSI_A_DAT<2> 2 SCSI_A_ACK_L 2 SCSI_B_DAT<2> 2 SCSI_B_ACK_L 26 60 SCSI_A_MSG_L

1 SCSI_A_DAT<9> 29C7<> 1 SCSI_A_DAT<1> 29C7<> 1 SCSI_ABSY_L 29C8<> 1 SCSI_B_DAT<1> 1 SCSI_BSY_L 27 61 SCSI_A_SEL_L
Reg_out
Reg_out
Reg_out
Reg_out
Reg_out
24 SCSI_A_MSG_L 29C7<> 24 SCSI_A_DAT<12> 29C7<> 24 SCSI_A_DAT<4> 29C8<> 24 SCSI_B_DAT<12> 24 SCSI_B_DAT<4> 28 62 SCSI_A_CD_L

23 SCSI_A_SEL_L 23 SCSI_A_DAT<13> 23 SCSI_A_DAT<5> 23 23 SCSI_BDAT<6> 29 63
A 29C8<> 29C8<> 29C7<> SCSI_B_DAT<13> SCSI_A_REQ_L
14 SCSI_A_CD_L 29C7<> 14 SCSI_A_DAT<14> 29C7<> 14 SCSI_A_DAT<6> 29C8<> 14 SCSI_B_DAT<14> 14 SCSI_B_DAT<6> 30 64 SCSI_A_IO_L
13 SCSI_A_REQ_L 29C8<> 13 SCSI_A_DAT<15> 29C8<> 13 SCSI_A_DAT<7> 29C7<> 13 SCSI_B_DAT<15> 13 SCSI_B_DAT<7> 31 65 SCSI_A_DAT<8> A
12 SCSI_A_IO_L 12 SCSI_A_PAR<1> 12 SCSI_A_PAR<0> 12 SCSI_B_PAR<1> 12 SCSI_B_PAR<0> 32 66 SCSI_A_DAT<9>
29C7<> 29C7<> 29C8<>
TERM LINES (9)

TERM LINES (9)
TERM LINES (9)
TERM LINES (9)
TERM LINES (9)
11 SCSI_A_DAT<8> 29C8<> 11 SCSI_A_DAT<0> 29C8<> 11 SCSI_A_ATN_L 29C7<> 11 SCSI_B_DAT<0> 11 SCSI_B_ATN_L 33 67 SCSI_A_DAT<10>

33 67
34 34 68
68 SCSI_A_DAT<11>
UC5606PLUS
Termpwr
DISCONNECT
UC5606PLUS
Termpwr
DISCONNECT
UC5606PLUS
Termpwr
DISCONNECT
UC5606PLUS
Termpwr
DISCONNECT
UC5606PLUS
Termpwr
DISCONNECT
15
15
16
15
16
16
15
16
15
16
10
10
10
10
10
TERMPWRA TMPWR_DIS 29C7<> TERMPWRA TMPWR_DIS 29C7<> TERMPWRA TMPWR_DIS TERMPWRB TERMDIS TERMPWRB TERMDIS
29C8<> 29C8<> GND GND DRAWING
USE, REPRODUCTION OR DISCLOSURE IS PROHIBITED EXCEPT UNDER WRITTEN LICENSE SHEET: 10
Appendix D
sun
microsystems
AND DOES NOT IMPLY PUBLICATION OR DISCLOSURE.
8 7 6 5 4 3 2 1
sun
Schematics
D-7
D-8
8 7 6 5 4 3 2 1
U1302 ECO DESCRIPTION DATE APPROVALS

ACT04
7D6> ARST_L 11 10 49 112 PP_STB_L 100OHM R1334 9D8<>
SO IRQ15 PC87307 STB/WRITE
48 68 1 2
IRQ14 CS0/CSOUT
PS2_MOUSE 47
IRQ12
U1310 46 97 FD_INDEX_L
IRQ11 INDEX
ACT02 45 96 FD_TRK0 19B1>
IRQ10 TRK0
2 44 98 FD_WR_PROT_L 19B1>
IRQ9 WP GND
KBRD_IRQ_L 1 43 95 FD_RD_DAT_L
_L 19B1>
D SO IRQ8 RDATA
3 CHEERIO_PPORT_INT_L 42 99 FD_DSK_CHNG_L 19B1>
IRQ7 PQFP DSKCHG D
FLP_IRQ 41 82 FD_DRATE0_MSEN0 19B3> 29D7> 29C8
IRQ6 MSEN0
U1310 39 83 FD_DRATE1_MSEN1 19B3> 29D7>
IRQ5 MSEN1
ACT02 SUN_KBRD_IRQ 38
IRQ4 119
5 SUN_MSE_IRQ 37 PP_AUTO_FD_L
IRQ3 AFD/DSTRB
MSE_IRQ_L 4 PS2_KBRD 36 U1301 113 PP_ACK_L
SO IRQ1 ACK
6 111 PP_BUSY 9C8<> VCC
BUSY/WAIT (+5 VDC)
VCC PCI_RESET 51 115 PP_PE
(+5 VDC) MR PE
EB_RDY_L 32 114 PP_SLCT_L
IOCHRDY SLCT
118 PP_SLIN_L
SLIN/ASTRB
59 117 PP_INIT_L
DDACK3 INIT
8A5> EB_DACK_L<3> 58 116 PP_ERROR_L
DDACK2 ERR
1
57 94 FD_DENSEL 29C7> 4.7KOHM R1320
DDACK1 DENSEL
2
8A5> EB_DACK_L<0> 56 132 2 1 4.7KOHM R1321
DDACK0 DCD1
133 2 1
DSR1
10KOHM
EB_RD_L 33 137 SUN_KBD_IN
R1303
8A4> RD SIN1 9A3>
10KOHM
2
8A4> EB_WR_L 34 WR 136 SIOBAD1 10KOHM R1324
RTS1/BADDR1
1
69 138 2 1
R1302
RING/XDCS SOUT1/BOUT1/CFG0
SUN_KBD_OUT 4.7KOHM R1322
8A5> EB_TC 35 131 2 1
TC CTS1
134 SIOBAD0 4.7KOHM R1323
34D8<> EB_DAT<7> DTR1/BADDR0
18D8<>
10 135 2 1
D7 RI1
14D4<> EB_DAT<6> 9 71
D6 CS1/XD0
15C2 8A3<> EB_DAT<5> 8 4.7KOHM R1325
D5
C 34D8<> EB_DAT<4> 7 142 2 1 4.7KOHM R1326 C
18D8<> D4 DCD2
14D4<> EB_DAT<3> 6 143 2 1
D3 DSR2
R1309 4.7KOHM 15C2 8A3<> EB_DAT<2> 5 147 SUN_MS_IN 9A3>
18D8<> D2 SIN2
1 2 EB_DAT<1> 4 146
8A3<> D1 RTS2/CFG2
15C2 14D4<> EB_DAT<0> 3 148 4.7KOHM R1328
D0 SOUT2/BOUT2/CFG3
34D8<> 141 2 1
CTS2
77 144 4.7KOHM R1330
IRSL2/XD6/SELCS/GPIO21 DTR2/CFG1
R1308 4.7KOHM 8A4> EB_SUPERIO_CS_L 30 145 2 1
AEN RI2
1 2 72
CS2/XD1
14D2> EB_LADR<15> 29
15D2
A15
15D2 14D2> EB_LADR<14> 28 DRATE0 84
A14 55
14D2> EB_LADR<13> 27
A13 DRQ3 54
R1307 4.7KOHM 15D2 EB_LADR<12> 26 EB_DREQ<3>
23 A12 DRQ2 53
1 2 PS2_KBRD 14D2> EB_LADR<11> A11 DRQ1
15D2 14D2> 15D2 EB_LADR<10> 22 52 EB_DREQ<0>
21 A10 DRQ0
14D2> EB_LADR<09> A9
15D2 14D2> 15D2 EB_LADR<08> 20 85 FD_MTR0_L 29C7>
A8 MTR0
R1305 4.7KOHM 8A3> EB_ADR<7> 19 88 FD_DRV1_SEL_L 29C8>
A7 DR1
1 2 15D2 8A3> 15D2 EB_ADR<6> 18 87 FD_DRV0_SEL_L 29C8>
A6 DR0
8A3> EB_ADR<5> 17 86 FD_MTR1_L
A5 MTR1
15D2 8A3> 15D2 16 90 FD_DIR_L 29D8>
EB_ADR<4> A4 DIR

8A3> 15 91 FD_STEP_L 29D7>
15D2
EB_ADR<3> A3 STEP
R1304 4.7KOHM 15D2 8A3> 14 89 FD_WR_DAT_L
B EB_ADR<2> A2 WDATA B
1 2 8A3> 13 93 FD_WR_GATE_L 29D7>
EB_ADR<1> A1 WGATE
15D2 8A3> 15D2 12 92 FD_HD_SEL_L 29D7>
A0 HDSEL
SUPIO_CLK 50 129 PP_DAT<7> 9D8<> VCC
X1/OSC PD7 (+5 VDC)
79 128 PP_DAT<6> 9D8<> R1327
IRRX2/IRSL0/ID0 PD6
R1340 4.7KOHM 80 127 PP_DAT<5> DONOTSTUFF
IRRX1 PD5
PS2_MOUSE 62 126 PP_DAT<4> SIOBAD0 1 2 BADDR1,0 HAVE INTERNAL PULLDOWNS.
X1C PD4
63 125 PP_DAT<3> 9D8<> CFG0 PULLED UP TO ENABLE FDC, KBC
X2C PD3
124 PP_DAT<2> 9D8<> AND RTC TO WAKE UP ACTIVE
PD2
106 123 PP_DAT<1> 9D8<> R1329
P12 PD1
ACT04
107 122 PP_DAT<0> 4.7KOHM
P16 PD0
SO
108 SIOBAD1 2 1
P17
109 102 KBCLK
10PF P20 KBCLK
C1301 110 103 KBDATA
P21 KBDAT
4 3
2 1 104 MSCLK
U1302
MCLK
66 SWITCH 105 MSDATA
MDAT
2
156 31
GPIO17/WDO ZWS
2
155
154 GPIO16
X1301 GPIO27/XD5 76
GPIO15
ACT04
153 75
GPIO14 GPIO26/XD4
152
SO
74
SMD4P
XTAL
GPIO13 GPIO25/XD3
151 73
24MHZ
GPI012 GPIO24/XD2
1
1
150 160
GPIO11 GPIO23/RING
149 159
U1302
A 10PF GPIO10 GPIO22/POR
0OHM 158
GPIO21/IRSL2/IRSL0/ID2 A
1 2 1 2 78 157
IRSL1/XD7/ID1 GPIO20/IRSL1/ID1
70
1/8W XDRD/ID3
64 81
VBAT IRTX
C1302 R1310 65 67
VCCH ONCTL
GND VDD
VCC
1
(+5 VDC)
2
11
61
24
25
60
40
121
101
GND
139
130
120
100
140
GND

sun
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LOGIC: EB_LATCH, FLASH, NVRAM, ROMBO CONNECTOR
31B5< 31B4< 15C2 13C7< 2C8< 34D8<> 18D8<> 8A3<> BI

EB_DAT<7..0>
VCC
D (+5 VDC)
D
U1401 EB_LADR<19..08> OUT 13B7< 13C7< 15A8< 15D2
ABT373
SSOP U1403
7
R1402 6 17 16 I28F008SA
D6
2
5 14
18 15
19 PROM_ADDR_TOP TSOP
D5
D7 O5
4 13 15A6> 1
D4 O4
O6 IN A19
8 1 3 9 8 1 2
A18
2.2KOHM
7 1 2 8 7 1 O7 6 3
U1404 A17
1
6 1 1 7 4 1 5
9 4
D1 O1 A16
LM393 5 1 0 6 3 1 2
12 5
D0
D2 O0
O2 A15
SO 8A4> EB_LATCH 11 14 6
IN LE
D3 O3 A14
14C3< FLASH_RST_L 1 8 OE 13 7
A13
12 8
A12
1
9
TEMP_REF 2 7 11 13 35 7
37
IN A11 DQ7
A B 10 14 34 6
A10 DQ6
34B4<> 19D6> POWER_OK 3 6 U1405 09 15 33 5
IN A9 DQ5
15D2 8A3> EB_ADR<7..0> 08 16 32 4
IN A8 DQ4
4 5 ABT373 7 17 3 28
A7 DQ3
SSOP 6 18 2 27
A6 DQ2
C 7 5 18 5 1 19 1 19 26 C
D7 O7 A5 DQ1
6 4 17 1 16 0 20 25
D6 4 A4 DQ0
34D8<> 2C6> PRST1_L 5 3 14 1 15 +12V 21
IN D53 A3
4 2 13 2 1 12 22
D4
3 1 8 1 1 9 23
D3 O3 A1
2 0 7 0 1 6 24
D2 O2
O4 A0
A2
1 9 4 0 5
GND D1 O1
O5
0 8 3 0 2 11
D0 O0
O6 VPP
11
LE
14C7> OE FLASH_RST_L 12
RP
WE OE CE
1
RYBY
36
38
100OHM
1 2
R1408
GND
U1402
M48T59
J1401: 1-2 FLASH WRITE
2 PROTECT 12 8KX8
A12 DIP
B 23
2-3 FLASH WRITEABLE 11 7 B
A11 DQ7
21 10 6
A10 DQ6
24 17
VCC 09 5
(+5 VDC) A9 DQ5
J1401 25 16
18 08 4
A8 DQ4
R1404 19 7 3
JMP3 A7 DQ3
4.7KOHM 6 A6 2
DIP DQ2
1 5 1 2 12 5 1
A5 DQ1
VCC 2 PROM_WE_L
6
4 04 11
13
(+5 VDC) A4 DQ0
2
3 3 15 A3
2 8 R1401 A2
1 9
7 1
A1 RST
1KOHM
SMT 0 10
D1401 A0
1
MBRS340T3 GND
20
EB_TOD_CS_L
IN E
8A4> IN
EB_WR_L 27
W
8A4> IN
EB_RD_L 22
G
9B4> POWERON_L26
IN IRQ
SCHOTTKY DIODE TO KILL NEGATIVE SPKIES ON VCC
PLACE THIS DIODE CLOSE TO TOD VCC
(+5 VDC)
R1406 R1405
2
2
A
J1402:1-2 FLASH SELECTED A
2-3 ROMBO SELECTED
4.7KOHM
4.7KOHM
1
1
J1402
JMP3
FLASH_CS_L 1DIP
8A4> EB_EPROM_CS_L 2
IN
ROMBO_CS_L 3 DRAWING
Appendix D
8 7 6 5 4 3 2 1
Schematics
D-9
D-10
8 7 6 5 4 3 2 1
LOGIC: RISC, SCAN
NOTE: RISC INPUTS ARE INTERNALLY PULLED-UP
U1501 VCC
(+5 VDC)
VDD ROMBO CONNECTOR
(INO) +3.3V
AUD_PL_INT_L 35 SB3_INTREQ7 (24) VDD_0 106 LAB CONSOLE EB_LADR<19..08>
20D6> B1_INTA_L 34 SB3_INTREQ6 (20) VDD_1 116
IN
21D3> A2_INTC_L 33 SB3_INTREQ5 (20) VDD_2 121
IN VCC
2
2
20D8> B1_INTB_L 32 SB3_INTREQ4 (20) VDD_3 131 VDD J1502 (+5 VDC)
IN
20D6> B1_INTC_L 30 SB3_INTREQ3 (20) VDD_4 96 U1503 +3.3V
D IN
SB3_INTR_L<2> 29 SB3_INTREQ2 (20) VDD_5 36
CONN34
10KOHM
10KOHM
20D8> B1_INTD_L 28 SB3_INTREQ1 (20) VDD_6 71 PALV16V8 - 10 HEADER
D
IN
R1502
R1503
1
1
3.3 20 19 1 2
PWR 1 2
SB2_INTR_L<7> 27 SB2_INTREQ7 (20) 9 I8 IO7 19 16 3 4 18
IN
20D1> B3_INTA_L 25 SB2_INTREQ6 (20) JMP3 8 SOC 18 15 5 6 17
IN DIP I7 IO6
21D6> A1_INTC_L 24 SB2_INTREQ5 (20) BUTTON_XIR_L 7 IO5 17 15B3< EB_ADR<7..0> 12 7 8 14
IN OUT 15B8< I6
20D3> B3_INTB_L SB2_INTREQ4 (20) 2 6 I5 IO4 16 1A3< SYS_RST_L 7 9 10 13
IN GND
1
QFP
20D1> B3_INTC_L 22 SB2_INTREQ3 (20) 3 BUTTON_POR_L 5 I4 IO3 15 6 11 12 08
IN OUT 15B8<
SB2_INTR_L<2> 23
20 SB2_INTREQ2 (20) 2C6> PRST_L 4 IO2 14 5 13 14 09
IN I3
RISC
20D3> B3_INTD_L 19 SB2_INTREQ1 (20) J1501 8A4> EB_RD_L 3 IO1
13 4 15 16 11
IN I2
15C6> SYS_RST_PAL_L 2 IO0
12 3 17 18 EB_RD_L
I1
21D3> A2_INTA_L 18 SB1_INTREQ7 (20) 2 19 20 10
IN
20D3> B2_INTA_L 17 SB1_INTREQ6 (20) 8C1> CLK_5M 1 CLK/I0 1 21 22 ROMBO_CS_L
IN GND
21D5> A2_INTB_L 15 SB1_INTREQ5 (20) 0 23 24 7
IN
20D5> B2_INTB_L 14 SB1_INTREQ4 (20) INT_NUM<5..0> OE/I9 0 25 26 6
IN OUT 1C5<
20D3> B2_INTC_L 13 SB1_INTREQ3 (20) INT_NUM5 64 5 1 27 28 5
IN
11
21D5> A2_INTD_L 12 SB1_INTREQ2 (20) INT_NUM4 63 4 2 29 30 4
IN
20D5> B2_INTD_L 10 SB1_INTREQ1 (20) INT_NUM3 62 3 VCC 31 32 3
IN (+5 VDC)
(INO) 60 2 DONOTSTUFF 8A4> EB_CS_L2 191P 33
33 34
34 EB_WR_L
21D6> A1_INTA_L 9 SB0_INTREQ7 (20) INT_NUM1 59 1
IN
21D1> A3_INTA_L 8 SB0_INTREQ6 (20) INT_NUM2
INT_NUM0 58 0
IN
21D8> A1_INTB_L 7 SB0_INTREQ5 (20) R1510
IN
21D3> A3_INTB_L 5 SB0_INTREQ4 (20) SYS_POR 124 SYS_RST_PAL_L
IN OUT 15D4<
330OHM
R1511
A3_INTC_L 4 125 PB_RST_L GND
C 21D1> IN SB0_INTREQ3 20 P_BUTTON_RESET OUT 1A1< C
21D8> A1_INTD_L 3 SB0_INTREQ2 20 X_BUTTON_RESET 127 X_RST_L EB_DAT<7..0>
IN OUT 1A3< 7C6<
21D3> A3_INTD_L 2 SB0_INTREQ1 (20) TRST 123 TRST_L R1504
IN OUT 1A3< 6B3<
SP_TDO 82 SCAN_TDO 4.7KOHM
2C6> PRST_L 78 SB_RESET TDO_A 102 MOD1_TDI 2 1 POWER_OK 19D6> 34B4<>
IN OUT 6B3< GND
(INO) TDO_B 103 MODULE_TDI 15A3<
OUT 1A3< 1D2<
10C8> SCSI_INTA_L 42 SCSI_INT (20)
IN
8B8> PCIO_ENET_INT_L 43 ETHERNET_INT (21) TCLK_1 100 TCLK 1A1<
IN OUT
8B8> PCIO_FPY_INT 52 FLOPPY_INT (27) TCLK_2 104 TCLK1 7C6< 15B8<
IN OUT
KB_INT 50 KEYBOARD_INT TCLK_3 105 TCLK2 6B3<
OUT
PCIO_PPORT_INT_L 44 PARALLEL_INT (22) TCLK_4 117 TCLK3 8A3< 10B5< 22B7< VDD
IN OUT VCC
19B4> WARN_INT_L 47 AUDIO_INT (26)
(23) TCLK_5 118 PCI_TCLK 20D3< 20D5< 20D8< 21D3< 21D5< 21D8< +3.3V (+5 VDC)
OUT
GRAPHIC2_INT_L 49 GRAPHIC2_INT (20) TCLK_6 119
6A3> FFB_INT_L 45 GRAPHIC1_INT (20)
IN
34A1> I2C_GLOBAL_INT_L 53 SPARE_INT (28) TMS8 115
IN
34A1> I2C_ENV_INT_L 48 POWER_FAIL_INT (25) TMS7 114 JSCC SCAN CONNECTOR
IN
POWER_OK 149 TMS6 113
IN
15D5> BUTTON_POR_L 133 BUTTON_POR TMS5 112 PCI_TMS 20D3< 20D6< 21D1< 21D3< U1502
OUT 20D1<
2
2
2
2
2
2
15D5> BUTTON_XIR_L 134 POWER_OK
BUTTON_XIR TMS4 110 21D6<
15B1> SCAN_TAS 83 SP_TAS TMS3 109 MOD1_TMS ABT244
OUT 6B3<
15B1> SCAN_MPR_L 84 SP_MP TMS2 108 SSOP
220OHM
220OHM
220OHM
220OHM
220OHM
10KOHM
15A1> SCAN_TDI 85 SP_TDI TMS1 107 TMS 7C6< SYS_RST_L 2 A4 Y4 18
OUT 1A1< IN
R1522
R1523
R1524
R1525
R1590
R1506
1
1
1
1
1
1
15B1> SCAN_TCLK 87 SP_TCLK TMS1_B 148 TMS1_5V 10B5< 22B7<
B OUT 8A3< B
15A1> SCAN_TMS 88 SP_TMS JTAG_TAS 4 A3 Y3 16 SCAN_TAS 15B8<
OUT
15A1> SCAN_RESET_L 89 SP_RESET TRST_5V 79 TRST_5V_L 20D1< 20D3< 20D6< 21D1<
OUT 8A3<
99 TDI<8> 21D3< 21D6< 22B7< JTAG_MPR_L 6 A2 Y2 14 SCAN_MPR_L 15B8<
OUT
98 TDI<7>
97 TDI<6> CLK_SEL2 130 JTAG_TCLK 8 A1 Y1 12 SCAN_TCLK 15B8<

OUT
B_TDO 95 TDI<5> CLK_SEL1 129
IN
94 TDI<4> CLK_SEL0 128 OE
93 TDI<3>
1
2
4
6
8
MOD1_TDO 92 TDI<2>
IN
SCSI_TDO 90 TDI<1>
IN GND
15C6> TCLK1 158 TCLK
IN
KBRD_IRQ_L 54 SKEY_INT_L SLAVIO_RESET 65
IN
CONN8 M
HEADER
DUAL
MSE_IRQ_L 55 SMOU_INT_L
IN
1
3
5
7
18C8> SYNC_SER_IRQ_L 57 SSER_INT_L J1504

IN
73 CPU_SP2_2 CPU_SP4_2 39
VCC 72 CPU_SP2_1 CPU_SP4_1 38 U1502
(+5 VDC) 70 37
CPU_SP2_0 CPU_SP4_0
ABT244
69 75 SSOP
68 CPU_SP1_1 CPU_SP3_1 74 JTAG_RESET_L 11 A4 Y4 9 SCAN_RESET_L 15B8<
OUT
2
R1507 67 CPU_SP1_2
CPU_SP1_0 CPU_SP3_2
CPU_SP3_0 77
15C6> SCAN_TDO 13 A3 Y3 7 JTAG_TDO
IN OUT
EB_LADR<19> 151
IN
4.7KOHM
152 XOR_IN2 XOROUT 153 PROM_ADDR_TOP JTAG_TMS 15 A2 Y2 5 SCAN_TMS 15B8<
OUT 14D3< OUT
1
A 145 XOR_IN1
PR_CSIN PR_CSOUT 147
SC_CS 154 JTAG_TDI 17 A1 Y1 3 SCAN_TDI 15B8<
OUT A
15D2 8A3> EB_ADR<0> 135 LC_BS 155
IN
2
2
2
2
2
15D2 8A3> EB_ADR<1> 137 S_LOAD 122 S_LOAD OE

IN OUT 1A5<
14D2> EB_LADR<13> 138 EB_ADR_13 S_CLOCK 132 S_CLK R1508
GND IN OUT 1A8<
15D2 EB_LADR<14> 139 EB_ADR_1
19
IN EB_ADR_14 100OHM
330OHM
330OHM
330OHM
330OHM
330OHM
EB_ADR_0
15D2 14D2> EB_LADR<19> 140 EB_RDY 144 1 2
IN
R1526
R1527
R1528
R1529
R1520
1
1
1
1
1
8A4> EB_WR_L 142 EB_WR

IN
8A4> EB_RISC_CS_L 143 EB_ADR_19
EB_CS DRAWING
IN
16A1> B3_CLK_U1501 159 SBUS_CLK

IN GND
8C1> CLK_5M 157 ENET_CLK
IN
SIO PASSES INTS TO PCIO FOR FDC & PP INTERRUPTS GND

THIS MATERIAL CONTAINS TRADE SECRETS INFORMATION OF SUN MICROSYSTEMS INC. 15
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ECO DESCRIPTION
-12V +12V VCC

(+5 VDC)
VDD
+3.3V
D
J1901 D
CONN20
ATX PWR DONOTSTUFF
11 3.3V 3.3V
1 PS_ON_L 2 1 R1900 RELAY_PS_ON_L 33C2>
12 -12V 3.3V
2
13 3 1/8W
COM COM
PS_ON_L 14 PS-ON 5V
4 0OHM
IN
VCC 15 COM COM
5 2 1 R1910
(+5 VDC) 16 6
COM 5V
17 7 1/8W
COM COM
18 -5V PW-OK
8 POWER_OK 34B4<> 6A3< 14C7< 15B8< 15C4< 29A7< 33B5<
OUT
19 9 5V_SB 33B5< 33C5< 33C6< 33D4< 33D6< 33C5<
5V 5VSB OUT
20 10 GND
5V 12V
C1905 C1906 C1902 C1915 C1903 C1904 C1908 C1998
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
.01UF
10%
.01UF
10%
.01UF
10%
.01UF
10%
.01UF
10%
.01UF
10%
.01UF
10%
.01UF
10%
VCC
C (+5 VDC) C
3
GND R1903 Q1901
1KOHM VCC
POWER_OFF 2 1 1 SMT (+5 VDC)
8A6>
MMBT3904L
D1902
1
2
1
2
R1906 R1907
1KOHM
2
R1905
A NC1
2
2
1
1DIODE
1N4148
2.49KOHM
1%
1/8W
2
SMTDIODE R1908
100OHM
1%
1/8W
1
SMT0805 GND
2
C 1MOHM R1927
1
1UF 2 1
3
1 2 R1901 CONN34
1
1/8W 5% C1909
HEADER
4.7KOHM
4.7KOHM
C1910 .1UF 1 2 FD_DENSEL

20% 1MOHM R1909 1 2 IN 33.0_OHM 29C7>
2 1 1 2 3 4 2 1
5 6 FD_DRATE0_MSEN0 R1904 19B3> 29D7>
1/8W 5% IN
7 8 FD_INDEX_L 29C8
GND OUT 13D4< 29C7<
LM613 9 10 FD_DRV0_SEL_L 29C8>
IN
SO R1950 11 12 FD_DRV1_SEL_L 29C8>
TEMP 2 COMP V+ 4 GND 13 14 FD_DRV0_SEL_L
19B4> IN 0OHM 33D6< IN 29C8>
B 15KOHM 1 2 1 SUPPLY_TRIP_L 29D8< 33C6< 15 16 FD_MTR0_L 29C7> B
OUT
19B4> TH_TRIP 2 1 3 13D4< 29D7> FD_DRATE1_MSEN1 17 18 FD_DIR_L
IN 1/8W 5% OUT IN 29D8>
6 OP-AMP 19 20 FD_STEP_L 29D7>
1/8W 1% IN
7 TH_TRIP 19B8< 21 22 FD_WR_DAT_L
OUT IN
R1911 5 23 24 FD_WR_GATE_L
IN 29D7>
TEMP_SENSE_POS 11 OP-AMP 25 26 FD_TRK0_L
1D1> IN OUT 13D4< 29D8<
10 TEMP 19B8< 13D4< 29D7> FD_DRATE0_MSEN0 27 28 FD_WR_PROT_L 13D4< 29D7<
OUT OUT OUT
12 29C8 19B1< 29 30 FD_RD_DAT_L 13D4< 29D8<
R1912 15 COMP 31 32 FD_HD_SEL_L OUT IN 29D7>
10KOHM 16 WARN_INT_L 15C8< 33 34 FD_DSK_CHNG_L 13D4< 29D8<
OUT 33 34 OUT
19A4> TH_WARN 2 1 14 VCC
IN (+5 VDC)
13 9 J1902
1/8W 1% V- CATHODE
8
2
2
2
FEEDBACK
R1922
R1923
R1925
R1924
R1926
2
U1902
R1913 GND
C1911
2
2
2
10KOHM
1%
1/8W
1
1
1
GND .01UF
C1912 R1914
4.7KOHM
1
.01UF 1 2
2.21KOHM
1%
1/8W
4.7KOHM
2 1 C1913
1
1
TEMP_REF
2
2
2
SMT1210
10% TH_WARN 19B8<
OUT
1 1
10% R1915 VCC 233P

(+5 VDC)
.1UF
10UF
20%
16V
10KOHM L1901 R1999 J1990
10KOHM
1%
1/8W
1
1
2 1 C1914 R1916 BLM21A01 510OHM CONN2
1
R1917 10KOHM R1918 1 2
10KOHM
HDR
1/8W 1%
A 1/8W 1%
2
2 1 1
1/8W 2 VT
F04 M A
1%
1
8A6> SYS_LED 3 SO 4
1/8W
GND GND
R1920 U0904
4.7KOHM
2
Appendix D
GND
NOTE: TO DISABLE THE THERMAL TRIP CIRCUIT, REPLACE R1920 WITH A 0 OHM RESISTOR

microsystems
sun AND DOES NOT IMPLY PUBLICATION OR DISCLOSURE.
8 7 6 5 4 3 2 1
Schematics
D-11
4 3 2 1
LOGIC: PCI BUS B CONNECTORS
VCC -12V +12V

(+5 VDC)
J2001
VDD
PCI32CONN_5V +3.3V
D
B1 -12V TRST
A1 TRST_5V_L 15B6>
D
15C6> PCI_TCLK B2 TCK +12V
A2
B3 GND TMS A3 PCI_TMS 15B6>
B2_TDI B4 TDO TDI
A4 A_TDO
B5 +5V +5V
A5
B6 +5V INTA
A6 B1_INTA_L OUT 15D8< 31D5<
31B7< 15D8< OUT
B1_INTB_L B7 INTB INTC A7 B1_INTC_L OUT 31C3< 15C8<
31B6< 15D8< OUT
B1_INTD_L B8 INTD +5V A8
26C1< 8B8< OUT
B1_PRSNT1_L B9 PRSNT1 RESERVED
A9
B10 RESERVED +5V
A10
26C2< 8B8< OUT
B1_PRSNT2_L B11 PRSNT2 RESERVED
A11
B12 GND GND A12
B13 GND GND
A13
B14 RESERVED RESERVED
A14
B15 GND RST
A15 BRST_L IN 7D3>
16B1> IN
B1_CLK B16 CLK +5V
A16
B17 GND GNT A17 BGNT_L<1> IN 7A3>
26C8< 7A3< OUT
BREQ_L<1> B18 REQ GND
A18
B19 +5V RESERVED
A19
31 B_AD<31> B20 AD<31> AD<30>
A20 B_AD<30> 30
29 B_AD<29> B21 AD<29> +3.3V A21
B22 GND AD<28>
A22 B_AD<28> 28
C 27 B_AD<27> B23 AD<27> AD<26>
A23 B_AD<26> 26 C
25 B_AD<25> B24 AD<25> GND
A24
B25 +3.3V AD<24>
A25 B_AD<24> 24
3 B_C/BE_L<3> B26 C/BE<3> IDSEL A26 B1_IDSEL 20A8
23 B_AD<23> B27 AD<23> +3.3V
A27
B28 GND AD<22>
A28 B_AD<22> 22
21 B_AD<21> B29 AD<21> AD<20>
A29 B_AD<20> 20
19 B_AD<19> B30 AD<19> GND A30
B31 +3.3V AD<18>
A31 B_AD<18> 18
17 B_AD<17> B32 AD<17> AD<16>
A32 B_AD<16> 16
2 B_C/BE_L<2> B33 C/BE<2> +3.3V
A33
B34 GND FRAME
A34 B_FRAME_L 7
5 B_IRDY_L B35 IRDY GND A35
B36 +3.3V TRDY
A36 B_TRDY_L 4
6 B_DEVSEL_L B37 DEVSEL GND
A37
B38 GND STOP
A38 B_STOP_L 3
B1_LOCK_L B39 LOCK +3.3V A39
1 B_PERR_L B40 PERR SDONE A40 B1_SDONE
B41 +3.3V SBO
A41 B1_SBO_L
2 B_SERR_L B42 SERR GND
A42
B43 +3.3V PAR
A43 B_PAR 0
1 B_C/BE_L<1> B44 C/BE<1> AD<15> A44 B_AD<15> 15
14 B_AD<14> B45 AD<14> +3.3V
A45
B B46 GND AD<13>
A46 B_AD<13> 13 B
12 B_AD<12> B47 AD<12> AD<11>
A47 B_AD<11> 11
10 B_AD<10> B48 AD<10> GND
A48
B49 GND AD<09> A49 B_AD<09> 09
PCB_KEY
08 B_AD<08> B52 AD<08> C/BE<0>
A52 B_C/BE_L<0> 0
07 B_AD<07> B53 AD<07> +3.3V A53
B54 +3.3V AD<06>
A54 B_AD<06> 06
05 B_AD<05> B55 AD<05> AD<04>
A55 B_AD<04> 04
03 B_AD<03> B56 AD<03> GND
A56
B57 GND AD<02>
A57 B_AD<02> 02
01 B_AD<01> B58 AD<01> AD<00> A58 B_AD<00> 00
B59 +5V +5V
A59
IN
B_ACK64_L B60 ACK64 REQ64
A60 B_REQ64_L OUT
B61 +5V +5V
A61
B62 +5V +5V A62
13 B1_IDSEL
A 14 B2_IDSEL
GND
15 B3_IDSEL A
BAD<31..00> 7C3<> 8D8<>

BI
BCBE_L<3..0> 7B3<> 8C8<>
BI
BCTL<7..0> 7C3<> 8C8<>
BI
sun
microsystems
USE, REPRODUCTION OR DISCLOSURE IS PROHIBITED EXCEPT UNDER WRITTEN LICENSE

SHEET: 20
4 3 2 1
D-12 SPARCengine Ultra AXi OEM Technical Manual • August 1998

4 3 2 1
LOGIC: PCI BUS A CONNECTORS
VCC
(+5 VDC) -12V J2101, J2102, J2103 +12V
VDD
PCI32CONN_5V +3.3V
D B1 -12V TRST A1 TRST_5V_L 15B6>
PCI_TCLK B2 A2 D
15C6> TCK +12V
B3 GND TMS A3 PCI_TMS 15B6>

A2_TDI B4 TDO TDI A4 A_TDI 6B3>
B5 +5V +5V A5
B6 +5V INTA A6 A1_INTA_L OUT 15C8< 31D4<
31D5< 15C8< OUT
A1_INTB_L B7 INTB INTC A7 A1_INTC_L OUT
A1_INTD_L B8 A8 26D1<
31D5< 15C8< OUT
INTD +5V
31B7< 15C8<
26D3< 8B8< OUT
A1_PRSNT1_L B9 PRSNT1 RESERVED A9
B10 RESERVED +5V A10
26D2< 8B8< OUT
A1_PRSNT2_L B11 PRSNT2 RESERVED A11
B12 GND GND A12
B13 GND GND A13
B14 RESERVED RESERVED A14
B15 GND RST A15 ARST_L IN 7D6>
16B1> IN
A1_CLK B16 CLK +5V A16
B17 GND GNT A17 AGNT_L<1> IN 7A6>
31B6< 7A6< OUT
AREQ_L<1> B18 REQ GND A18
B19 +5V RESERVED A19
31 A_AD<31> B20 AD<31> AD<30> A20 A_AD<30> 30
29 A_AD<29> B21 AD<29> +3.3V A21
B22 GND AD<28> A22 A_AD<28> 28
27 A_AD<27> B23 AD<27> AD<26> A23 A_AD<26> 26
C 25 A_AD<25> B24 AD<25> GND A24 C
B25 +3.3V AD<24> A25 A_AD<24> 24
3 A_C/BE_L<3> B26 C/BE<3> IDSEL A26 A1_IDSEL 21A8
23 A_AD<23> B27 AD<23> +3.3V A27
B28 GND AD<22> A28 A_AD<22> 22
21 A_AD<21> B29 AD<21> AD<20> A29 A_AD<20> 20
19 A_AD<19> B30 AD<19> GND A30
B31 +3.3V AD<18> A31 A_AD<18> 18
17 A_AD<17> B32 AD<17> AD<16> A32 A_AD<16> 16
2 A_C/BE_L<2> B33 C/BE<2> +3.3V A33
B34 GND FRAME A34 A_FRAME_L 7
5 A_IRDY_L B35 IRDY GND A35 10C8<>
10C8<> B36 +3.3V TRDY A36 A_TRDY_L 4
6 A_DEVSEL_L B37 DEVSEL GND A37 10C8<>
10C8<> B38 GND STOP A38 A_STOP_L 3
A1_LOCK_L B39 LOCK +3.3V A39
1 A_PERR_L B40 PERR SDONE A40 A1_SDONE 10C8<>
10C8<> B41 +3.3V SBO A41 A1_SBO_L
2 A_SERR_L B42 SERR GND A42 10C8<>
B43 +3.3V PAR A43 A_PAR 0
1 A_C/BE_L<1> B44 C/BE<1> AD<15> A44 A_AD<15> 15
10C8<> 14 A_AD<14> B45 AD<14> +3.3V A45
B46 GND AD<13> A46 A_AD<13> 13
B 12 A_AD<12> B47 AD<12> AD<11> A47 A_AD<11> 11 B
10 A_AD<10> B48 AD<10> GND A48
B49 GND AD<09> A49 A_AD<09> 09
PCB_KEY
08 A_AD<08> B52 AD<08> C/BE<0> A52 A_C/BE_L<0> 0
07 A_AD<07> B53 AD<07> +3.3V A53
B54 +3.3V AD<06> A54 A_AD<06> 06
05 A_AD<05> B55 AD<05> AD<04> A55 A_AD<04> 04
03 A_AD<03> B56 AD<03> GND A56
B57 GND AD<02> A57 A_AD<02> 02
01 A_AD<01> B58 AD<01> AD<00> A58 A_AD<00> 00
B59 +5V +5V A59
IN
A_ACK64_L B60 ACK64 REQ64 A60 A_REQ64_L OUT
B61 +5V +5V A61
B62 +5V +5V A62
13 A1_IDSEL
A GND
14 A2_IDSEL
A
15 A3_IDSEL
AAD<31..00>
BI 7C6<> 10D8<> 10D8<
ACBE_L<3..0>
BI 7B6<> 10D8<>
ACTL<7..0> 7C6<>
BI
sun
microsystems
USE, REPRODUCTION OR DISCLOSURE IS PROHIBITED EXCEPT UNDER WRITTEN LICENSE

SHEET: 21
4 3 2 1
Appendix D Schematics D-13

D-14
8 7 6 5 4 3 2 1
VCC_D 22C3>
ECO DESCRIPTION DATE APPROVALS
R2309
16.5OHM
1
R2301 R2302 R2303 R2304 22C4> TXS+ 1 2
IN
1
1
1
82.5OHM 82.5OHM 82.5OHM 82.5OHM 1%
1% 1% 1% 1% R2310
1/8W 1/8W 1/8W 1/8W 16.5OHM 1/8W
2
22C4> TXS- 1 2
IN
2
2
2
D SD+ SD- RD- RD+ 1% C2310
1/8W SMT0805 D
1000PF
U2302
1
1
1
1
R2305 R2306 R2307 R2308 1 2
XFMR
127OHM 127OHM 127OHM 127OHM
1% 1% 1% 1% R2311 10% PE68510 R2313 R2314
1/8W 1/8W 1/8W 1/8W 10OHM 50V 16 9 75OHM 75OHM RJ_TXD+_CONN
2
2
2
2
22C4> TXU- 1 2 15 10 1 2 1 2 RJ_4T_D3P_CONN
IN
1 8
1% SMT0805 HI-SPD-LAN 1% 1%
1/8W 1000PF 1/8W 1/8W
GND_D 23A3<> 23B2<> 23B3<> 1 2 C2311
C2302 R2312 10% U2303

10OHM 50V
22C4>
SMT0805 TXU+ 1 2 XFMR
.1UF IN
PE68510 R2315 R2316 J2301
RXI+ 1 2 1% 1/8W 16 9
22C4< OUT 75OHM 75OHM
15 10 1 2 1 2 1
5% 1 8 RJ_TXD-_CONN 2
C2303 50V HI-SPD-LAN 1% 1/8W 1% 1/8W RJ_RXD+_CONN 3 111P
4
SMT0805 C2301 5
.1UF SMT0805 RJ_RXD-_CONN 6
C RJ45 C
2
22C4< RXI- 1 2 .1UF 7 CONN
OUT
5% 8
S
1
5% R2320 50V C2312
1
2
50V
10OHM
1
1%
R2322
9
SMT1825
680PF
10%
3KV
10
1
1/8W 10OHM
2
GND_D
RD100- 1%
1/8W
1
R2321 9B7 CHGND \G
23A3<>
23B2<>
23B3<>
CHGND
39.2OHM
1% 1/8W
2
RD100+ CHGND
1
R2323
RJ_4T_D4P_CONN
39.2OHM
1
1%
R2335
1/8W 47.5OHM
2
1
1%
R2339
1
1/8W 47.5OHM
R2340
2
1% 12.4OHM
B 112P 1/8W 1% B
2
SMT0805 Q2302
.01UF 1/8W
2
VCC_D 22C3> VCC R2334

1 2 GND\G (+5 VDC)
390OHM
1 2 1 SMT
C2304 MMBT2222A
Q2303
3
TXREF 10% R2338

2
U2301 50V 5% 1/8W 390OHM C2308

SMT
2
1 2 1 SMT0805

MMBT2222A
1
1
R2325 R2326 DP83223 18PF
1
PLCC 5% 1/8W 5%
82.5OHM 82.5OHM
2
1
1% 1% 12 R2333 50V
ENCSEL
1/8W 1/8W 2 9 TD100+ GND_D
RXI+ TXO+
2
2
1 8 TD100- 390OHM
RXI- TXO- 5%
6 GND_D GND_C
TXREF 1/8W
2
TD+ 15 25 RD+ C2306
IN PMRD+ PMID+
TD- 16 24 RD-
IN PMRD- PMID- 10PF
17
EQSEL
1
18 20 SD+ 5% 50V
CDET SD+
1
R2327 R2328 C2305 19 21 SD- 1 2
LBEN SD-
.01UF TXREF
127OHM 127OHM
1% 1% 10%
2
2
2
1/8W 1/8W
RXGND
RXVCC
EXTVCC
TXVCC
TXGND
1
50V Q2301
3
99P R2331 R2337
3
4
5
7
11
10
3.01KOHM
23A6< 22C2< 22A5< 23B3<>
28
27
23
23D7< 23A8< 22A6< 22A2<
23A7< 23C5< 22B4< 23A3<>
GND_D GND_D 1 2 1 SMT 499OHM

A 23B3<> 23B2<> 23A3<> 23A3<> 23B2<> 23B3<> C2307 1%
MMBT2222A
2
GND_D 1/8W
A
2
1% 1/10W SMT0805
GND
2
VCC\G 1 27PF
R2332
3
5% R2336
1
LOOP_100 1KOHM 50V

22B4<> IN 390OHM
VCC_C 1% 1 2 1 SMT
22D3>
1/10W MMBT2222A
2
SPEED10 GND\G 5% 1/8W Q2304

2
GND_D

sun
8 7 6 5 4 3 2 1
5 4 3 2 1
ECO DESCRIPTION DATE APPROVALS
D D
VCC
(+5 VDC)
VDD F2500
SMT
+3.3V 1 FUSE 2 PS2_VCC
2A
R2508
2
2
2
L2507
R2502 R2501 SMT
4.7KOHM
10KOHM
10KOHM
1
BLM41A01
1
1
2
SPEED<2> SPEED<0> SPEED<1> 6A8> 6A3>
R2507 R2513 L2502

J2500
2
2
CONN4
SMT JMPR
MSDATA 1 2 1 1
SMT BLM41A01 2
4.7KOHM
4.7KOHM
1
1
1 2 3
BLM41A01 4 4
L2501 C
C M VT
GND SMT
MSCLK 1 2
BLM41A01 C2506
2
L2503
C2505 C2501 C2502
2
2
2
330PF
1
330PF
330PF
330PF
1
1
1
MH3 MH1
1 1
CHGND
MOUNTING_HOLE MOUNTING_HOLE
MH4 MH2
VCC
1 1 (+5 VDC)
B PS2_VCC B
1
CHGND
L2504
MH5
2
2
R2503 SMT
R2504 BLM41A01
1 10KOHM
10KOHM
2
1
1
MOUNTING_HOLE
MH6 L2505 CONN4
SMT JMPR
KBDATA 1 2 1 1
1 SMT BLM41A01 2
1 2 3 J2501
BLM41A01 4 4
MOUNTING_HOLE L2500 M VT
MH7 MH0 GND
SMT
KBCLK 1 2
1 1 BLM41A01
L2506 A
A C2507
2
Appendix D
C2503 C2500 C2504
2
2
2
MH8
330PF
MH9
1
330PF
330PF
330PF
1
1
1
1 1
MOUNTING_HOLE MOUNTING_HOLE_275R
GND GND CHGND
Schematics

sun
5 4 3 2 1
D-15
D-16
8 7 6 5 4 3 2 1
LOGIC: CORE REGULATOR, TEST EDGE CONNECTORS
CARD-TEST EDGE CONNECTOR
+12V -12V VCC
(+5 VDC)
VDD
+3.3V
VCC
(+5 VDC)
J2902
CONN80 M
VDD
D +3.3V
R/A D
EDGE D2902
1
SUPPLY_TRIP_L 1 2
IN SMT
3 4
5 6 MBRS340T3
2
7 8
9 10 FD_DRATE1_MSEN1 19B3> 13D4<
OUT
FD_DSK_CHNG_L 11 12 FD_DRATE0_MSEN0 19B3> 13D4< 19B1< 29C8
IN OUT
FD_RD_DAT_L 13 14 FD_HD_SEL_L 13B4< 19B1<
IN OUT
FD_TRK0_L 15 16 FD_WR_PROT_L 19B1>
IN IN
FD_WR_DAT_L 17 18 FD_WR_GATE_L 13B4< 19B1<
IN OUT
FD_DIR_L 19 20 FD_STEP_L 13B4< 19B1<
OUT OUT
FD_DRV0_SEL_L 21 22 FD_MTR0_L 13B4< 19B2<
OUT OUT
FD_DRV1_SEL_L 23 24 FD_INDEX_L 19B1>
OUT IN
FD_DRATE0_MSEN0 25 26 FD_DENSEL 13C4< 19B1<
OUT
27 28 SCSI_A_DAT<11> 10A1< 10A7< 10D5<
BI
SCSI_A_DAT<10> 29 30 SCSI_A_DAT<09> 10A1< 10A7< 10D5<
BI BI
SCSI_A_DAT<08> 31 32 SCSI_A_IO_L 10A1< 10A7< 10D5<
BI BI
SCSI_A_REQ_L 33 34 SCSI_A_CD_L 10A1< 10A7< 10D5<
BI BI
SCSI_A_SEL_L 35 36 SCSI_A_MSG_L 10A1< 10A7< 10D5<
BI BI
SCSI_A_RST_L 37 38 SCSI_A_ACK_L
BI IN
SCSI_A_BSY_L 39 40 SCSI_A_ATN_L 10A1< 10A5< 10C5<
BI BI
TERMPWRA 41 42 TERMPWRA 29C8<> 10A1< 10A2< 10A6< 10A7< 10A8< 10D3<
BI BI
C SCSI_A_PAR<0> 43 44 SCSI_A_DAT<07> 10A5< 10B1< 10D5< C
BI BI
SCSI_A_DAT<06> 45 46 SCSI_A_DAT<05> 10A5< 10B1< 10D5<
BI BI
BI BI
BI BI
SCSI_A_DAT<00> 51 52 SCSI_A_PAR<1> 10A6< 10B1< 10D5<
BI BI
BI BI
BI BI
57 58
59 60
61 62
63 64
65 66
67 68
9A3> SUN_KBD_OUT_L 69 70 SER_RXD_A/RC VCC
IN IN (+5 VDC)
SUN_KBD_IN_L 71 72 SER_TXD_A/RC
IN IN 18B3>
SUN_MS_IN_L 73 74 SER_RXD_B/RC
IN IN
SMT
2R4NC
KBCLK 75 76 SER_TXD_B/RC
IN IN 18B3>
MSDATA 77 78 KBDATA 1 2 VCC_FILT
IN IN
MSCLK 79 80 C2902 C2900 R2902 R2911
IN
L2901
+1
+1
C2918
2
2
2
330UF
330UF
SMTTANT
SMTTANT
2
2
1
6.3V
6.3V
B B
5%
10KOHM
10KOHM
10%
10%
.1UF
1
1
GND
R2906

.025OHM
VDD 2 1
+3.3V
J2901 GND R2905
.025OHM
2 1
CONN44
IRL3103
IRL3103
U2901
1
1
1 2 R2904
MOSFET
MOSFET
3 4 RC5051 .025OHM VDD CORE

G
G
5 6 DC/DC CONVERTER Q2900 Q2902 2 1

SM
SM
7 8 1D5> VID3 17 2 3 2 3 2
VID3 SOIC ENABLE
S
S
D
D
9 10 1D8> VID2 18 1 R2903

VID2 CEXT
N
N
11 12 19 16
SMT
2R4NC
1D5> VID1 VID1 VREF .025OHM

13 14 1D8> VID0 20 12 1 2 2 1
VID0 HIDRV
15 16 +12V 4 9 L2900 C2907 C2909 C2911
IFB LODRV
17 18 D2901 5 34B4<> 3 VDD-CORE-REG-OK
VFB PWRGD
+1
+1
+1
2
2
2
2
19 20 6 15
SOT23 VCCA GNDA C2919 C2916 C2917 C2915 C2903
1
1
21 22 7 14
IRL3103
IRL3103
330UF
330UF
330UF
VCC VCC VCCP GNDD

6.3V 10%
6.3V 10%
6.3V 10%
PMBZ5234B SMT
2
2
2
1
1
+12V (+5 VDC) 23 24 (+5 VDC) -12V 1D5> VID4 8 10

MOSFET
MOSFET
RSEL GNDP
1
1
1
1
MBRS340T3
5%
5%
5%
5%
5%
25 26 13 11 C2908 C2910 C2913

VCCQP GNDP
G
G
10%
3
2
.1UF
100PF
.1UF
.1UF
.1UF
27 28 2 1 D2903 C2906
SM
SM
10%
+1
+1
+1
A 29 30 47OHM 3 2 3 2
+1
C2901 C2921
1
1
S
D
S
D
31 32 R2900
330UF
330UF
330UF
6.3V 10%
6.3V
6.3V 10%
N
N
2
2
2
33 34 1UF 1UF 0OHM R2999

A
330UF
6.3V
C2904
2
50V 50V
.1UF
PS_ON_L 35 36 POWER_OK 19D6> 34B4<> Q2901 Q2903

20% 20%
2
2
37 38
39 40
41 42
43 44
GND
GND GND

SHEET: 29
8 7 6 5 4 3 2 1
7 6 5 4 3 2 1
VCC
(+5 VDC)
C3202
TDR_GT TDR_ST 2.2UF CONN4

TD TD VCC JMPR
(+5 VDC) 1 2 1
1
TDR-SIGNAL-TOP 2 J3201
C 3
U3201 20% C
2
16V 4 4
GND M VT
TDR_S2 LM555
2
R3202
TDR_G2 TD TD SO
4.7KOHM
1
1 GND VCC 8
TDR-SIGNAL-L2
L3201
10KOHM
2 7
R3201
TRIG DSC
1
2
3 OUT THR 6
BLM21A01
GND
F04
TDR_S4 8A5> SPEAKER_EN 1 SO 2 4 RST CNT 5
1
TDR_G4 TD TD R3211
100KOHM
GND
TDR-SIGNAL-L4 U0904
GND
1
10%
VCC
.01UF
2
(+5 VDC)
B B
TDR_S5 C3201
TDR_P5 TD TD
TDR-SIGNAL-L5
GND
VCC
(+5 VDC)
57P
56P TDR_S7
TDR_P7 TD TD
TDR-SIGNAL-L7
VCC
(+5 VDC)
GP0
GP1
GP2
GP3
GNP4
TDR_SB
TDR_PB TD TD GD GD GD GD GD
A TDR-SIGNAL-BOT
A
CHGND
GND
THERE IS ONE TDR TRACE PER SIGNAL LAYER

EACH TDR TRACE IS 3.5 LONG
Appendix D
sun
7 6 5 4 2 3 1
Schematics
D-17
6 5 4 3 2 1
D-18
D
D
J3302
CONN4
JMPR
19B4> SUPPLY_TRIP_L 1
1
2
3
9B4> POWERON_L 4
4
M VT
L3302
19C6> 5V_SB
1
R3311
BLM21A01
1MOHM
19C6> 5V_SB
GND C
C 1/8W
1
R3312
4.7KOHM
U3303 U3303
U3301 ACT08
ACT08 4
2
34B4<> 19D6> U3301 POWER_OK 12 F04 SO 6
F04 SO 11 11 10 5
SO
19B4> SUPPLY_TRIP_L 13 SO 12 13
1
C3301
1UF
20%
2
U3306
HCT123 GND
SO U3307
10
1 13
A1 Q1
2 4
B1 Q1 PR
19C6> 5V_SB 3 12 9 RELAY_PS_ON_L 19D4<
R1 D Q
ACT74
1
R3310 9 5 SOIC
A2 Q2
19C6> 5V_SB 10 12 11
B 100KOHM B2 Q2
11
R2 B
Q_L 8
2
15 14
RXCX1 CL

7 6 C3309
RXCX2
1
1UF
13
C3310 C3300 J3301
1
2
CONN2 20%
2
220PF
HDR
10%
1
10%
2
.01UF
2
M VT
GND GND VCC
(+5 VDC)
L3301
19C6> 5V_SB R3330
4.7KOHM
1
R3320
BLM21A01
1KOHM
GND
4
U3307
2
U3301 U3303 U3301
F04 ACT08 2 PR 5 CLK_12M
D Q
34B4<> 19D6> POWER_OK 9 SO 8 9 F04 ACT74
A F04 SO 8 3 SO 4 SOIC
9B4> POWERON_L 5 SO 6 10 SUPIO_CLK 3
A
Q_L 6
U3301 CL
1

sun
6 5 4 3 2 1
8 7 6 5 4 3 2 1
VCC VCC
D R3601 (+5 VDC) (+5 VDC)
100KOHM D
1 2
R3602
R3603
FFAN_PWR FFAN_PWR_FB
5% 1/10W
2
2
16V
1/10W
2
2
2
1UF
33KOHM
1/10W
1/10W
1/10W
1
10%
C3601
R3604
U3601
5%
330OHM
330OHM
1
R3620
4.7KOHM
1
1
1
82B715 SO R3621
5%
5%
5%
0OHM CPU_TEMP
I2C_SCL 3 SCL B_SCL 2 BUF_I2C_SCL 1D1> TEMP_SENSE_POS
34C4< 34C6<> 34B5<> 34A7<> I2C_SDA 6 SDA B_SDA 7 BUF_I2C_SDA 5% 1/10W
GND 34D6< 34D2< 34C8<
R3605
100KOHM
16V
BFAN_PWR 1 2 BFAN_PWR_FB
5% 1/10W
1UF
2
2
16V
C3620
CONN2 1A1 TEMP_SENSE0
1/10W
HDR
1UF
J3601
33KOHM
1/10W10%
1
C
10%
C3602
R3606
C VCC
5%
1
(+5 VDC)
R3622
0OHM
M VT
5%
2
GND
Q3600
1/10W
BSS138 GND
MOSFET
2
R3623
VCC R3632
4.7KOHM
1
(+5 VDC) SMT GND

1KOHM N R3631
5%
PCI_RESET 1 S 0OHM
G TEMP_SENSE_UM UND_MOD_TEMP
5% 1/10W D
VCC
(+5 VDC) 5% 1/10W
16V
3
1UF
2
10%
C3621
BLAST_FAN_L
1/10W
1/10W
2
TEMP_SENSE_UM_NEG
R3607
R3608
4.7KOHM
4.7KOHM
1/10W
5%
5%
1/10W
R3625
4.7KOHM
B
1
B
R3624
BLAST_FAN_L R3626
5%
0OHM
0OHM
5%
10
TEMP_SENSE_PCI PCI_TEMP
5% 1/10W
16V
12 9 F74_BLASTING 36A6<
D PR Q
F74
1UF
SO GND
10%
C3622
I2C_INT_CLK 11 U3603
VCC
8 FANS_BLASTING_L 34D5<> TEMP_SENSE_PCI_NEG (+5 VDC)
Q
C
1/10W
BLAST_FFAN_L 35B8< 35C8<
3
R3627
13
4.7KOHM
0OHM
GND
2
5%
2 1 1 SMT
1/10W
MMBT2222A
1/10W 5%
R3628
Q3601
4.7KOHM
1
2
R3609 JMP3 R3629
5%
DIP
BACK_FAN_FAIL 0OHM
J3602 BFAN_PWR TEMP_SENSE_DSK DSK_TEMP
GND
4
GND 5% 1/10W
16V
34B4<> I2C_INT_ON 2 5 JMP3

D PR Q DIP
1UF
A F74 BLAST_BFAN_L 35B4< 35C4< FRONT_FAN_FAIL

A
3
10%
C3623
SO 4.7KOHM J3603 FFAN_PWR

I2C_INT_CLK 3 TEMP_SENSE_DSK_NEG
L3601
34B4<> U3603
F74_BLASTING 2 1 1 SMT
36B7>
6 EN_I2C_INT_L MMBT2222A
Q 34A2<
1/10W
1/10W 5% Q3602
BLM21A01
C
R3630
L3602
R3610
0OHM
5%
1
GND
BLM21A01
PRST1_L GND
34D8<> 2C6>
GND
Appendix D
GND

sun
8 7 6 5 4 3 2 1
Schematics
D-19
D-20 SPARCengine Ultra AXi OEM Technical Manual • August 1998
APPENDIX E
Enclosures, Power Supplies,

Peripheral Memory Devices and
PCI Cards
E.1 Independent Hardware Vendor (IHV)

Device Information
A Web site providing detailed information on tested enclosures, power supplies,
peripheral devices and tested PCI cards can be found at the following URL:
This Web site will be updated periodically as additional items are tested for
compatibility with the SPARCengine Ultra AXi.
E-1
E-2 SPARCengine Ultra AXi OEM Technical Manual • August 1998
APPENDIX F
OpenBoot Firmware
This appendix provides information on the OpenBoot Firmware used in the Ultra
AXi system. The OpenBoot Firmware is resident on the Ultra AXi motherboard and
provides hardware testing and initialization prior to booting. The OpenBoot
Firmware also enables booting from a wide range of devices. It includes the
OpenBoot Program (OBP), Power On Self Test (POST), OpenBoot diagnostic
(OBdiag) and Boot loader. More complete information on OBP can be found in the
publications referred to in Related References on page v of the Preface. This Appendix
addresses only enhancements and new Ultra AXi specific features found in OBP
version 3.10.4 or later.
An in depth knowledge of Forth is required to exploit advanced capabilities of OBP.
Links to the OpenBoot Firmware update site can be found on the Internet at URL:
Links to additional OpenBoot Firmware information can be found at URL:
http://www.sun.com/microelectronics/embedded/openboot.html
http://www@firmworks.com/www/traindoc.htm.
FIGURE F-1 OpenBoot Firmware Block Diagram
OpenBoot PROM Non-Volatile RAM

(NVRAM)
Power-on self-test
Diagnostics (POST) EEPROM
Device
UltraSPARC IIi Binary Drivers Configuration Time of Day
CPU Chip Machine Instruction User Information
Interface Ethernet
Address
Default
Parameters
hostid
Battery
F-1
F.1 Minimum Requirements
The minimum system configuration will have:
■ 16MB of installed memory is required to run the OpenBoot Firmware only.
■ A standard I/O (console device)
■ A boot device (storage device or network interface)
■ The OpenBoot Firmware uses NVRAM for OBP environment variables.
■ A console device can be an external terminal connected as Serial Port A (TTYA)
■ A console device can be internal with:
a keyboard connected to the motherboard:
and a monitor with a graphics card
(either FFB or ATI PCI).
If a PCI card is active during the boot process it must have built in IEEE 1275
compliant plug-in FCode. This allows the device controlled by the card to become
active during the boot process. PCI Cards that do not have the built in FCode will
allow the system to boot and function normally. An exception is the AXi is the For
the ATI PCI cards listed on the IHV web site FCode plug in drivers are included in
the OBP on the motherboard.
32MB of installed memory is required by Solaris.
F.2 Additional OBP Features in Ultra AXi

■ Facility to use drop-in drivers added to OBP
■ CD file system support for ISO 9660 Rock Ridge
■ DIR command for directory listing. Works with ISO 9660/RockRidge CDroms,
UFS diskettes and disks
■ Control-F12 for Graphics-mode cycling (ATI driver only)
■ Control-F11 for PS2 keyboard language cycling
■ Advanced System Monitoring (ASM)
F-2 SPARCengine Ultra AXi OEM Technical Manual • August 1998

F.2.1 Additional Commands
■ show-dropins
■ add-dropins
■ delete-dropins
■ print-dropins
F.2.2 Additional Environment Variables

■ env-monitor
■ enabled-with-fans
■ enabled
■ disabled
■ disabled*
■ last-power-off-cause
Appendix F OpenBoot Firmware F-3

F.3 Flash Memory and NVRAM Layout
The Ultra AXi PROM space is arranged as blocks containing headered segments. The
key organizational component is the header. The information content of the PROM
and its headers are shown in FIGURE F-2
0x1ff.f000.0000
Header 0x.20bytes
Reset
Vector
≈ 320k
Compressed
OBP
Keyboard
Fonts
Plug-Ins ATI Graphics Driver 2 ≈ 180k
ATI Graphics Driver 1
OBDIAG
1MB
Space for
Optional ≈ 250k
Drop-Ins
0x1ff.f00.A000
POST ≈ 250k
Unusable
0x1ff.f00f.ffff
FIGURE F-2 Ultra AXi CPU PROM Content Layout
Not modifiable Mfg. Info 32 bytes

May be modified OBP Configuration
Using OBP Variables 100 bytes
8 KB
Optional OBP Space for
Executable Code NVRAMRC 8060 bytes
and Data Space
FIGURE F-3 Ultra AXi NVRAM Content Layout

F.4 Power on Self-Test (POST)
POST tests onboard system resources that are necessary for OBP to execute and boot
Solaris. For Post to run, three hardware requirements must be met:
■ The instruction fetch path between the CPU and the OBP PROM must be
operating.
■ The CPU must have a functioning integer unit to allow proper code execution.
■ The serial port A (TTYA) must function to allow POST messages to be displayed.
Post will stop at the first failure and hand over the execution to OBP. In the case of
POST failure, OBP will not go through the Auto-Boot process and drops to the ok
prompt. To check the POST failure, use show-post-results command at the ok
prompt. The system will display the failure message.
F.5 OpenBoot Diagnostics (OB Diag)

OBDIAG diagnoses the various hardware and peripheral devices. Enter obdiag at
the ok prompt, and the OBDIAG menu will appear. The environment variable
diag-level can be set to min or max use in set env command. No diagnostics are
performed on PS/2 keyboard or mouse.
ok obdiag
OBDiag Menu
0 ..... PCI/Cheerio
1 ..... EBUS DMA/TCR Registers
2 ..... Ethernet
3 ..... Keyboard
4 ..... Mouse
5 ..... Floppy
6 ..... Parallel Port
7 ..... Serial Port A
8 ..... Serial Port B
9 ..... NVRAM
10 ..... RAS <Inactive>
11 ..... All Above
12 ..... Quit
13 ..... Display this Menu
14 ..... Toggle script-debug
15 ..... Enable External Loopback Tests
16 ..... Disable External Loopback Tests
Enter (0-11 tests, 12 -Quit, 13 -Menu) ===>

0, PCIO These tests cover the PCIO circuitry on the motherboard. Installed PCI
cards are not tested.
1, Ebus DMA/TCR Registers This test covers motherboard DMA transfer control to
the Ebus. Offboard peripherals are not tested.
2, Ethernet Tests 10BaseT / 100BaseT Ethernet interface.
3, Sun Keyboard Tests Sun keyboard controller.
4, Sun Mouse Interface Tests Sun mouse controller.
5, Floppy Requires an installed floppy disk drive with a formatted blank floppy
disk.
6, Parallel Port Tests parallel port controller: diag-level must be set to max for
test.
7, Serial Port A Does not run when serial port A is supporting a terminal. Runs
only when diag-level is set to max.
8, Serial Port B This runs only when diag-level is set to max.
9, NVRAM Simply reads and writes patterns to free space in the NVRAM module.
10, RAS (Referred to as ASM.) Active when env-monitor is enabled or

enabled-with-fans.
14, Toggle Script-Debug OBdiag enters verbose or quiet mode.
15, Enable External Loopback Tests Not implemented.
16, Disable External Loopback Tests Not implemented.
F.6 Entering the OBP Environment

You can enter the OpenBoot environment in any of the following ways:
■ Halt the operating system by becoming a super user and then enter
sync<cr>
■ Execute the following keystroke commands:
■ Stop-A from a Sun keyboard
■ BREAK from an ASCII terminal
■ ~# from a tip window
■ Control-Break from a PS/2 keyboard

F.7 Selected OBP Commands
TABLE F-1 Commonly Used Commands
Emergency Keyboard Commands
Hold down keys during power-on sequence.
Stop Bypass POST. This command does not depend on security-mode.
Stop-A Abort (PS/2 Keyboard equivalent Left Control-Break)
Stop-D Enter diagnostic mode (set diag-switch? to true).
Stop-F Enter Forth on TTYA instead of probing. Use fexit to continue
with the initialization sequence. (Useful if hardware is broken.)
Stop-N Reset NVRAM contents to default values.
Help Command
help List main help categories
help category Show help for all commands in the category. Use only the first
word of the category description.
help command Show help for individual command (where available).
Common Options for The Boot Command
boot[device-specifier][filename][options]
[device-specifier] The name (full path name or alias) of a device. Examples:
cdrom (CDROM Drive)
disk (hard disk)
net (Ethernet)
[filename] The name of the program to be booted (for example,
stand/diag). If specified, filename is relative to the root of
the selected device and partition. If not, the boot program uses
the value of the boot-file parameter.
[options]
-r (Re-configure)
-s (Single user mode)
-v (verbose mode)
Diagnostic Test Commands
probe-scsi Identify devices attached to the built-in SCSI bus.
Viewing and Changing Parameters
printenv [parameter] Display all current parameters and current default values
(numbers are usually shown as decimal values). printenv
parameter shows the current value of the named parameter.
setenv parameter value Set the parameter to the given decimal or text value

F.8 Configuration Variables
Configuration variables are used by the OBP code and are stored in NVRAM. The
following is a sample of the output when the printenv command is entered at the
ok prompt. The setenv command is used to modify the environment variables
TABLE F-2 NVRAM Configuration Variables

Parameter Default Description
tpe-link-test? true Twisted Pair Ethernet link test

scsi-initiator-id 7 SCSI bus address of host adapter, range 0-f.
keyboard-click? false If true, enable keyboard click.
keymap no default Keymap for custom keyboard.
ttyb-rts-dtr-off false If true, OS does not assert DTR and runs on TTYB.
ttyb-ignore-cd true If true, OS ignores TTYB carrier-detect.
ttya-rts-dtr-off false If true, OS does not assert DTR and runs on TTYA.
ttya-ignore-cd true If true, OS ignores TTYA carrier-detect.
ttyb-mode 9600,8,n,1,- TTYB (baud, #bits, parity, #stop, handshake).
ttya-mode 9600,8,n,1,- TTYA (baud, #bits, parity, #stop, handshake).
pcia-probe-list 1,2,3,4 See Para F.12
pcib-probe-list 1,2,3,4 See Para F.12
mfg-mode off
diag-level max Level of diagnostics to run (min or max).
#power-cycles
system-board-serial#
system-board-date 34883686
last-poweroff-cause 0,1,2,3 etc. ASM. See Para F.2.3
env-monitor disabled* ASM (enabled-with-fans, enabled, disabled,
disabled*). See Para F.16
fcode-debug? false If true, include name fields for plug-in device FCodes.
output-device screen Console output device (usually screen, ttya or ttyb).
input-device keyboard Console input device (usually keyboard, ttya or ttyb).
load-base 16384
boot-command boot Command that is executed if auto-boot? is true.
auto-boot? true If true, boot automatically after power-on reset.
watchdog-reboot? false If true, reboot after watchdog reset.
diag-file empty string File from which to boot in diagnostic mode.
diag-device disk net Device from which to boot.

TABLE F-2 NVRAM Configuration Variables (Continued)
Parameter Default Description
boot-file empty string File to boot (an empty string lets secondary booter choose
default).
boot-device disk net Device from which to boot.
local-mac-address? false
ansi-terminal? true
screen-#columns 80
screen-#rows 34
silent-mode? false
use-nvramrc? false If true, execute commands in NVRAMRC during system start-
up
nvramrc empty string Contents of NVRAMRC.
security-mode none Firmware security level (none, command or full).
none: No password required (default).
command: All commands except for boot and go require
password.
full: All commands except for go require the password.
security-password no default Firmware security password (never displayed).
security-#badlogins 1073741824
oem-logo no default Byte array custom OEM logo (enabled by oem-logo? true).
Displayed in hex.
oem-logo? false If true, use custom OEM logo, or use Sun logo.
oem-banner empty string Custom OEM banner (enabled by oem-logo? true).
oem-banner? false If true, use custom OEM banner.
hardware-revision
last-hardware-update 00 00 00...
diag-switch? false

F.9 Device Tree
The following is the output from a show-devs command at the ok prompt. Device
tree nodes representing the hardware and support packages for the PROM are shown.
ok show-devs
/SUNW,UltraSPARC-IIi@0,0 UltraSPARC-IIi CPU
/pci@1f,0 CPU-APB PCI-66 Bus
/virtual-memory
/memory@0,0 Node representing system memory
/aliases
/options
/openprom
/chosen
/packages
/pci@1f,0/pci@1 Advanced PCI bridge Bus A
/pci@1f,0/pci@1/(devid) A PCI card on J2001, J2002 or J2003 will appear here
/pci@1f,0/pci@1,1 Advanced PCI bridge Bus B
/pci@1f,0/pci@1,1/(devid) A PCI card on J2101, J2102 or J2103 will appear here
/pci@1f,0/pci@1/scsi@1,1 Onboard SCSI External channel
/pci@1f,0/pci@1/scsi@1 Onboard SCSI Internal channel
/pci@1f,0/pci@1/scsi@1,1/tape
/pci@1f,0/pci@1/scsi@1,1/disk
/pci@1f,0/pci@1/scsi@1/tape
/pci@1f,0/pci@1/scsi@1/disk
/pci@1f,0/pci@1,1/network@1,1 Onboard network interface
/pci@1f,0/pci@1,1/ebus@1 Onboard Ebus
/pci@1f,0/pci@1,1/ebus@1/beeper@14,722000
/pci@1f,0/pci@1,1/ebus@1/flashprom@10,0
/pci@1f,0/pci@1,1/ebus@1/eeprom@14,0
/pci@1f,0/pci@1,1/ebus@1/fdthree@14,3203f0 Floppy
/pci@1f,0/pci@1,1/ebus@1/ecpp@14,340278 Parallel Port
/pci@1f,0/pci@1,1/ebus@1/su_pnp@14,3602f8 PS/2 Mouse
/pci@1f,0/pci@1,1/ebus@1/su_pnp@14,3803f8 PS/2 Keyboard
/pci@1f,0/pci@1,1/ebus@1/se@14,400000 TTYA, TTYB
/pci@1f,0/pci@1,1/ebus@1/SUNW,pll@14,504000 Sun Keyboard/Mouse
/pci@1f,0/pci@1,1/ebus@1/power@14,724000
/pci@1f,0/pci@1,1/ebus@1/auxio@14,726000
/openprom/client-services
/packages/sun-keyboard
/packages/SUNW,builtin-drivers Built in driver support
/packages/cdfs CD file system package
/packages/ufs-file-system UFS file system package
/packages/disk-label
/packages/obp-tftp
/packages/deblocker
/packages/terminal-emulator

F.10 PCI Probe Lists
The NVRAM variable maintains the current PCI Probe list. The list can be modified
by the user, however, Bus B will always be probed before Bus A.
The default PCI Probe list order is:
1. PCI-BPCIO, onboard
2. PCI-BJ2001 PCI Slot
5. PCI-ADual SCSI, onboard
6. PCI-AJ2101 PCI Slot
PCI cards added to the system must comply with the PCI 2.1 specification. During
the OBP probe process, a node ID is created and added to the device tree.

F.11 Device Aliases
The following is the output from the devalias command at the ok prompt
which list the default device alias mappings.
ok devalias
pcib /pci@1f,0/pci@1,1
pcia /pci@1f,0/pci@1
ebus /pci@1f,0/pci@1,1/ebus@1
i2c /pci@1f,0/pci@1,1/ebus@1/SUNW,envctrl
net /pci@1f,0/pci@1,1/network@1,1 Network Interface
floppy /pci@1f,0/pci@1,1/ebus@1/fdthree Floppy
diskx6 /pci@1f,0/pci@1/scsi@1,1/disk@6,0
scsix /pci@1f,0/pci@1/scsi@1,1 External SCSI
disk /pci@1f,0/pci@1/scsi@1/disk@0,0
cdrom /pci@1f,0/pci@1/scsi@1/disk@6,0:f
tape /pci@1f,0/pci@1/scsi@1/tape@4,0
tape1 /pci@1f,0/pci@1/scsi@1/tape@5,0
tape0 /pci@1f,0/pci@1/scsi@1/tape@4,0
disk6 /pci@1f,0/pci@1/scsi@1/disk@6,0
scsi /pci@1f,0/pci@1/scsi@1 Internal SCSI
ttyb /pci@1f,0/pci@1,1/ebus@1/se:b
tyya /pci@1f,0/pci@1,1/ebus@1/se:a
keyboard! /pci@1f,0/pci@1,1/ebus@1/su_pnp@14,3803f8:forcemode
keyboard /pci@1f,0/pci@1,1/ebus@1/su_pnp@14,3803f8 PS/2 Keyboard
mouse /pci@1f,0/pci@1,1/ebus@1/su_pnp@14,3602f8 PS/2 Mouse

F.12 OBP Video Drivers
This section describes the function of the video drivers in OBP only. For information
about the video drivers under system software see Appendix G.
F.12.1 Sun FFB Video Drivers

OBP PROM contains built in support for FFB2 video cards. OBP typically does not
use all possible resolutions the card is capable of supporting. The following table
shows the video resolution supported when operating in OBP using Sun video
cards. These cards may only be used in the UPA64S slot (J0606).
Model Part Number Resolution Vertical

Refresh Hz
FFB2, 2D X3658A
(Creator Series 2)
FFB2+, 2D X3662A
(Creator Series 3)
1152x900 66
FFB2, 3D X3659A
(Creator3D Series 2)
FFB2+, 3D X3663A
(Creator 3D Series 3

F.12.2 PCI Video Drivers
The OBP PROM contains built in support for selected PCI video cards. The
following table shows the currently approved PCI video cards and the resolution
supported when operating in OBP. These cards may be used in any of the PCI slots.
Vendor Model Part Number Resolution Vertical

Refresh Hz
PGX (ATI Pineapple), X3660A

Sun 1152x900 66, 76
8-bit
640x480 200
800x600 160, 200
100-405059
3D Charger, 2MB 1024x768 150
(Sun:102-38800-00)
1152x864 120
1280x1024 100
ATI
640x480 160, 200
800x600 160, 200
100-405058
3D Charger, 4MB 1024x768 100, 150
(Sun:102-38808-00)
1152x864 85, 120
1280x1024 60, 85, 100
Raptor GFX-8M 19-0076-03
Tech-Source 1152x900 60, 72, 75, 85
Raptor GFX-4M n/a
The display resolution on ATI cards may be chosen at the ok prompt by holding
down the control key and pressing the F12 key until the desired resolution is
displayed.
Updates to the built-in video drivers may have to be added as a drop-in. Drivers for
third party video cards may be obtained from the vendor of the card.
F.13 PS/2 Keyboard

84, 101, 102, 104 key mappings
F.13.0.1 Non-English PS/2 Keyboards

Press Control-F11 to cycle through keyboard language choices
The default language choices are:
English, Spanish, French, Italian and German.

F.14 ASM Operation
A discussion of how ASM features are used by the Ultra AXi can be found in
Section 3.4 “Advanced System Monitoring (ASM)” on page 3-9
Supported env-monitor values

1. enabled-with-fans: If set, OBP monitors and reacts as follows:
■ If the CPU thermistor temperature is above the warning temperature
threshold, a warning is issued.
■ If the CPU thermistor reading is above the shutdown temperature threshold,
the system will shutdown.
■ If either of the voltages are out of the acceptable range, OBP issues a warning
for out of range values.
■ The optional fans are monitored and a warning is issued if the fans are not
present or if they fail.
2. enabled: same as enabled-with-fans without optional fan checking.
3. disabled: Does not monitor any ASM features at OBP level. It creates the
device tree node and properties for OS, but OS considers the monitoring disabled.
4. disabled*: This value turns off OBP monitoring and does not create the device
tree node. (The * is part of the setting, not a reference to a footnote).
F.15 Field Upgrade of OBP

OBP can be upgraded in the field.
To determine which version of OBP is installed, perform the following:
If running OBP, at the OK prompt type:
ok .version<cr>
POST 2.Y.0 <creation date>
If running Solaris, at the <machine_name> prompt type:

<machine_name> /usr/bin/prtconf -V
The third character group (X) in OBP is the revision number.
If the installed version is not current, update the OBP before continuing.
F.15.1 Upgrading OBP When Operating in OBP

The latest version of OBP may be obtained from the URL:
Create the floppy diskette as follows;
!(Need to determine proper procedure)!
OpenBoot Program (OBP) Update
Use the created floppy diskette to update the OpenBoot Firmware.
1. Insert the diskette into floppy disk drive.
2. At the OK prompt, type:

ok load floppy:nolabel<cr>
ok init-program<cr>
c. At the OK prompt, type:

ok reset-all<cr>

F.15.2 Upgrading OBP When Operating in OS
The latest version of OBP may be obtained from the URL:
DOWNLOAD Update.to.panther.3.10.x@OS - Csh executable file which includes the

OBP 3.10.4 Flash PROM image and the automatic update of the flash content.
NOTE: Download this Csh executable file to a directory on your Ultra AXi, a server
accessible by your Ultra AXi or a floppy diskette, use the SHIFT key on your
keyboard when you click on the download link. This will force the Web browser to
pop up the "Save As..." window.
Become super user.
Change execute permissions of the downloaded file if necessary.
Execute the downloaded script file, answer prompts as appropriate.
After completion of script, OBP will be upgraded in Flash.
The upgraded OBP will take effect the next time the machine is rebooted, reset or
power cycled.

APPENDIX G
System Software
Solaris 2.6 Operating Environment
This appendix provides information on the Solaris 2.6 Software used in the
Ultra AXi system. The Solaris Software is not part of the Ultra AXi motherboard
package. It may be purchased from Sun in various packages, either with media or as
a Right To Use (RTU) license.
Ultra AXi specific Solaris information may be found at the URL:

http://www.sun.com/microelectronics/SPARCengineUltraAXi/software.html
Commonly used Solaris packages are:
Solaris 2.6 Hardware 3/98 (or later) Desktop (Part # SSOS-260-CDB-DT)

Comes licensed for 1-2 users and cannot be used as a server
Solaris 2.6 Hardware 3/98 (or later) Server (Part # SSOS-260-CDB-SVR)

Operating Environment with a server license and a license for up to 5 Solaris users.
G.1 Software Package

The software package contains:
■ A CD labeled Solaris 2.6 Software, SPARC Platform
■ A CD labeled Solaris 2.6 Documentation, Answer Book, Man Pages, User, Admin,
Developer Documentation.
■ Hard copy documents, Installation guides.
■ A binary licensing agreement
■ Release Notes, warranty and other
G-1
G.1.1 Publications
Other Solaris publications are available from Sun at the URL’s:
http://www.sun.com/solaris/index.html
http://www.sun.com/books/catalog/order_info.html
http://sunexpress.usec.sun.com/
http://www.sun.com/worldwide/
http://docs.sun.com
Admin’s Guide
Fine Tuning Solaris
Network Computing
G.2 Technical Support

SunService, to contact SunService in the U.S., phone (800) USA-4SUN (800-872-4786).
To find the SunService Worldwide Solution Center nearest you go to this URL:
http://www.sun.com/service/contacting/solution.html
G.3 Installation
After completing the steps in Section , “Assembly, Installation and Initial Start Up
Procedures, you can use TABLE C-4 on page C-13 to plan and document your
installation of Solaris. Refer to the “Planning Your Installation” Section of the
Information Library documentation packaged with your Solaris software.
G.4 System Requirements

SPARCengine Ultra AXi motherboard with UltraSPARC-IIi CPU module.
32MB to 1.0GB DRAM memory (128MB or more provides optimal performance).
2GB or more hard disk space
CD-ROM 24X or faster
G-2 SPARCengine Ultra AXi OEM Technical Manual • August 1998

Network Connectivity
Graphics card and suitable monitor
Keyboard and Mouse
Refer to Appendix E for information on approved IHV devices.
G.5 Ultra AXi Platform Specifics
G.5.1 Advanced System Monitoring (ASM)

Refer to ASM Application Note (805-4877-01)
ASM driver must be downloaded from URL:

Ultra AXi Software/Firmware Updates Download Site
ASM Drivers Advanced System Monitoring functions:
For details on the features and how various functions are performed, please refer to
the OEM Technical Manual (available in postscript or pdf from URL:
http://www.sun.com/microelectronics/SPARCengineUltraAXi/).
The updated ASM driver needs to be downloaded as a package. This updated driver
is not part of the Solaris 2.6 3/98 edition. Solaris 2.6 5/98 edition includes the ASM
driver, and is installed and enabled along with Solaris.
Documentation and instructions on how to add ASM features:
Software and Hardware requirement
OBP version 3.10.4 SME created 1998/03/04 or later.
Solaris 2.6 3/98 FCS.
Ultra AXi motherboard part number: 501-4559-04 or later.
System setup procedure
1. Power-On the system. Press STOP -A on a Sun keyboard (cntrl-break on a PS2

keyboard) after the completion of memory test.
(Note: Before the system boot disk). At the OK prompt, type:
Appendix G System Software Solaris 2.6 Operating Environment G-3

ok> setenv env-monitor enabled (default value is disabled*)
ok> reset-all (MUST do!)
ok> boot disk -r
Note: -r is a MUST option in order to load the RAS driver. Use v option after -r to
run verbose mode.
2. User can download the package from this page.
3. Copy the package into the target system.
% su (become Super User) <cr>
# pkgrm SUNWglmr <cr>
# tar -xvf ASMpkg.tar <cr>
# pkgadd -d . SUNWglmr.u <cr>
The ASM driver obtains the default values passed from OBP. The default values are:
shut-down temperature = 58°C
warning temperature = 55°C
env-monitor-interval = 60 seconds
G.5.2 Video Drivers

The OBP PROM contains built in support for selected PCI video cards. The following
table shows the currently approved PCI video cards and the resolutions supported.
These cards may be used in any of the PCI slots.
Vendor Model Part Number Resolution Vertical Mode
Refresh Hz
640x480 60 NTSC
768x575 50 PAL
800x600 75
1024x768 60, 70, 75 SVGA
PGX (ATI Pineapple),
Sun X3660A 1152x900 66, 76
8-bit
1280x800 76
1280x1024 60, 67, 75, 76
1440x900 76
1600x1000 66, 76

800x600 75
1024x768 60
100-402031
Video Boost, 2MB 1024x768 75
(Sun:102-34008-XX)
1152x900 66
1280x1024 60
640x480 200 2D
800x600 160, 200 2D
1024x768 150 2D
100-405059 1152x864 120 2D
3D Charger, 2MB
(Sun:102-38800-00) 1280x1024 100 2D
ATI 1600x1200 76 2D
640x480 3D
800x600 3D
640x480 160, 200 2D
800x600 160, 200 2D
1024x768 100, 150 2D
100-405058 1152x864 85, 120 2D
3D Charger, 4MB
(Sun:102-38808-00) 1280x1024 60, 85, 100 2D
1600x1200 66, 76 2D
600x800 3D
768x1024 3D
640x480 60, 72, 75, 85 VESA
800x600 60, 72, 75, 85 VESA
1024x768 60, 70, 75, 85 VESA
1152x900 60, 72, 75, 85 VESA
1280x1024 60, 75, 76, 85 VESA
Raptor GFX-8M 19-0076-03
Tech-Source 1600x1200 60, 65, 70, 75, 80, 85 VESA
Raptor GFX-4M n/a
1280x800 76 HD
1440x900 76 HD
1600x1000 66, 76 HD
1920x1080 60, 70 HD
1920x1200 60, 70, 76 HD
Drivers for third party video cards may be obtained from the vendor of the card.
G.5.3 Set the Display Mode for OpenWindows or CDE
Note – This applies to PCI display adapter cards; for information on setting display
parameters with Sun’s Creator Graphics Fast Frame Buffer (FFB) refer to
The GUI will use the same display parameters as console mode unless you use the
m64config command at the Solaris prompt. For example, if your monitor supports
1280 pixels by 1024 at 75 Hz, then enter:
machine_name% m64config -dev /dev/fb -res 1280x1024x75 <cr>
Note that ’x’ in 1280x1024x75 is the letter ’x,’ not the multiplication symbol.

Once you enter this command, the system will use this display mode when Common
Desktop Environment (CDE) comes up on the monitor. If you enter this command
within a GUI, you must log out and then log back in before it takes effect.
To check which display modes are currently supported by your graphics controller
card, enter:
machine_name% m64config -dev /dev/fb -res \?<cr>
Once you enter the above command, a list will appear. Display modes followed by a
’[2]’ suffix are not currently supported. The ’[3]’ suffix indicates the current screen
resolution.
Note that you can get information on m64config by entering:
machine_name% man m64config<cr>

■ To recover when the display becomes unviewable
The display may become unviewable as you move between GUI and console modes:
■ If you exit the GUI and the console mode display is unviewable, try entering:
machine_name% set-default output-device<cr>

■ Entering the GUI from console mode is unlikely to be a problem unless
m64config has been used to set a GUI display mode not supported by the
current monitor. In this event, you can use rlogin to access the system over the
net, or reboot the system with a terminal or workstation, and then use the
m64config command to set a supported display mode. When you enter CDE
again, it will be at the new display mode setting.
■ If the screen becomes unviewable and you are unable to perform a remote login:
1. Reboot the system or if necessary, cycle power on the system.
2. Stop the boot process as the boot banner appears by holding down the Stop key
and then press A (use the Control and Break keys on PS/2 keyboards).
3. Type boot -s<cr> (for boot into system administration/maintenance mode).
4. Use the root password to enter the system administration/maintenance mode.
5. Use the m64config command to change the display mode setting (see “Set the
Display Mode for OpenWindows or CDE” on page G-5).
6. Either use reboot<cr> to restart the system, or type exit<cr> to exit system
administration/maintenance mode.

G.5.4 PS/2 Keyboard Key Mapping
If using a PS/2 keyboard, a PS/2 mouse must also be installed at boot or the system
will default to TTYA for console IO. The Function keys (F1 -F12) Insert, Home, Page-
up Page-Down, Del and End have the same mapping in both the Sun Type 5 and
PS/2 keyboards.
TABLE G-1 Default Sun to PS/2 Equivalent Keystrokes

Sun Type 5 PS/2 Function
Stop-A Left Control-Break Abort

Power-On No Equivalent No Equivalent
Help No Equivalent No Equivalent
Stop No Equivalent No Equivalent
Props No Equivalent No Equivalent
Front No Equivalent No Equivalent
Open No Equivalent No Equivalent
Find No Equivalent No Equivalent
Again No Equivalent No Equivalent
Undo No Equivalent No Equivalent
Copy No Equivalent No Equivalent
Paste No Equivalent No Equivalent
Cut No Equivalent No Equivalent
Meta No Equivalent No Equivalent
— Windows Logo Left No Equivalent
— Windows Logo Right No Equivalent
— Windows List No Equivalent
Speaker + — No Equivalent
Speaker - — No Equivalent
Speaker Off — No Equivalent
Compose — No Equivalent
Alt Graph — No Equivalent
F1 -F12 F1 -F12 Function Keys

TABLE G-1 Default Sun to PS/2 Equivalent Keystrokes
Sun Type 5 PS/2 Function
←↑↓→ ←↑↓→ Cursor Keys

PrintScreen / SysRq PrintScreen / SysRq
Scroll Lock Scroll Lock
Pause / Break Pause / Break
Insert Insert Editing and navigation
Home Home Keys
Page-up Page-up
Page-Down Page-Down
Del Del
End End
Their is a user assignable keyboard mapping facility under CDE. (OpenWin?).

~/.dt/user.dtwmrc/dtkeybinding. This enables the user to assign equivalent
keyboard mapping for PS/2 keyboards
G.5.5 PS/2 Mouse

If using a PS/2 mouse, a PS/2 keyboard must also be installed at boot or the system
will default to TTYA for console IO.
Standard three button mouse devices are supported. Consult the vendor to use
special pointing devices.
The use of a two button PS/2 mouse is not recommended due to extensive use of
middle button by CDE/OpenWindows. However, CDE/OpenWindows can simulate
a third button by adding the following to the user’s ~/.dt/user.dtwmrc file.
Buttons DtButtonBindings
{
<Btn1Down> root f.marquee_selection
<Btn2Click> root f.toggle_frontpanel
Ctrl<Btn1Click> root f.toggle_frontpanel
<Btn3Down> root f.menu DtRootMenu
Shift<Btn1Click> frame|icon f.lower
<Btn1Click> frame|icon f.raise
<Btn1Click2> frame f.maximize
<Btn1Click2> icon f.restore
<Btn2Click> frame|icon f.raise_lower
Ctrl<Btn1Click> frame|icon f.raise_lower
<Btn3Down> frame|icon f.post_wmenu
Alt<Btn1Click> frame|icon|window f.raise
Alt<Btn1Click2> frame|window f.minimize
Alt<Btn1Click2> icon f.restore

Alt<Btn2Click> frame|icon|window f.raise_lower
Ctrl Alt<Btn1Click> frame|icon|window f.raise_lower
Alt<Btn1Down> frame|icon|window f.move
Alt<Btn3Down> window f.minimize
}
This file will allow the mouse to be used as shown below:

■ Right Control and mouse button 1 anywhere on the background will toggle
minimize/maximize of the front panel.
■ Right Control and mouse button 1 on a frame or icon will toggle raising/lowering
that frame or window. (Raising means exposing a window above other windows
and lowering means hiding behind others.
■ Alt-Right Control-mouse button 1 within a window will toggle raising/lowering
the window.
TABLE G-2 Equivalent Sun and PS/2 Mouse Buttons
Sun PS/2 Three Button PS/2 Two Button

left left left
right right right
middle middle
G.5.6 Speaker
There is an integral speaker in the Sun Type 5 keyboard the Sun Keyboard inhibits
the enclosure speaker. The PS/2 keyboard uses the enclosure mounted speaker
The speakers are used for error beep signals and the keyboard click feature.
The speaker is enabled in CDE by using the Style Manager Menu, keyboard option.
Set volume in CDE. Zero = Off, any other number = On.
G.6 Adding PCI Cards and Drivers

PCI cards must have appropriate Solaris drivers to function with the Ultra AXi
system. These drivers are provided by the vendor. A list of PCI cards that have been
tested and found to work with the AXi system can bee found at the URL:

Refer to the documentation provided with the PCI card. Usually software drivers
and related documentation are provided on CD-ROM or floppy diskettes. Read all
documentation furnished with the package. The manufacturers Web Site may also be
referred to for the latest product and driver information.
G.6.1 To Install a PCI Card

1. Shut down the system
2. Install the PCI card
3. Make necessary connections
4. Power up the system
5. Boot with -r, v options
6. at system prompt, become super user
7. Add package using pkgadd command
8. Reboot if necessary
G.6.2 To Verify the Board is Seen by the System

1. Use the prtconf -D command to print the device tree.
It should show the PCI bus instances #0 and #1 for the two PCI buses on Photon.
There will be instances of various PCI cards connected to each one. A PCI card will
show up as pciVVVV,DDDD , where VVVV is the vendor id, e.g. 1011 and DDDD is
the device id, e.g. 008e. If the driver for the card is already loaded, then you may see
the device name supplied by the driver in the device tree.
2. Use the modinfo command to see if the driver for the card is loaded or not.
Typically the description of the driver will contain name of the product or the
vendor.
3. At the OBP prompt the PCI board should be visible in the device tree even if the
driver is not installed.

G.6.3 To Obtain Additional Assistance
1. Run the following commands and record the output.
prtconf
modinfo
dmesg
cat /etc/driver_aliases
cat /etc/path_to_inst
2. Contact the vendor of the PCI card.
G.7 Language Versions

All European languages (including English) are consolidated into a single product
with the software in all 6 languages on the Solaris 2.6 Software CD. User
documentation is included and translated on the European language version of the
Solaris 2.6 Documentation CD. The European language version includes:
English
French
German
Italian
Spanish
Swedish
Solaris 2.6 is also available in oriental and Asian languages. These are available on a
separate CD for each language.
Simplified Chinese
Traditional Chinese
Japanese
Korean

APPENDIX H
System Software
SunVTS Validation Test Suite
This Appendix provides information on the SunVTS suitable for the Ultra AXi
system. The applicable version is based on SunVTS 2.1 Ultra AXi version
H.1 Distribution
SunVTS may be downloaded at no cost to the user from the following URL:
Ensure the SunVTS version matches the Solaris version.
Solaris 2.6 version 3/98 uses SunVTS 2.1.2 with afbtest patch 106140-01.
Solaris 2.6 version 5/98 uses SunVTS 2.1.3.
Information on the version of SunVTS installed can be found in the file:

/opt/SUNWvts/bin/.version
Installation of SunVTS automatically adds applicable Man pages. These Man pages
can be used as online documentation.
H.1.1 Obtaining Documentation from the Web

Documentation links to SunVTS 2.1 SunVTS User’s Guide Part No. 802-7299 August
1997, Rev. A, SunVTS Quick Reference Card, Part No. 802-7301 August 1997, Rev. A
SunVTS Test Reference Manual Part No. 802-7300-10, August 1997, Rev. A may be
found at the following URL:
http://docs.sun.com:80
H-1
H.2 System Requirements
Solaris 2.6 version 3/98 uses SunVTS 2.1.2 with afbtest patch 106140-01.
Solaris 2.6 version 5/98 uses SunVTS 2.1.3.
SPARCengine Ultra AXi motherboard with UltraSPARC-IIi CPU module.
32MB to 1.0GB DRAM memory.
2GB or more hard disk space.
CD-ROM 24X or faster.
Network Connectivity.
Graphics card and suitable monitor.
Keyboard and Mouse.
Refer to Appendix E for information on approved IHV devices.
H.3 Installing SunVTS

Installation instructions will accompany the software when it is downloaded.
The installation instructions are:
1. Create a temp directory on the Panther system: (eg. mkdir /tmp/vts)
2. Download the image to that directory. Currently the image is a bit over 17 MB
using the Solaris compress utility. gzip brings the image size down to 12 MB but
the utility is not part of Solaris.
3. Uncompress the image. (eg. cd /tmp/vts; uncompress vts.tar.Z)
4. Untar the image. (eg. tar -xvf vts.tar)
5. Install the SunVTS packages (SUNWvts SUNWvtsmn) (eg. pkgadd -d .) Answer

the questions pkgadd asks accordingly. When the four packages are installed
SunVTS will reside in /opt/SUNWvts/bin. At this point, apply afbtest patch
106140-01 as applicable.
H-2 SPARCengine Ultra AXi OEM Technical Manual • August 1998

H.4 Configuring and Running SunVTS
There are three types of user interface:
■ GUI Graphical User Interface on-screen menu options.
■ TTY Using terminal interface or remote access modem.
■ Command Line.
There are three modes of testing possible:

■ Connectivity mode: A low stress, quick testing of the availability/connectivity
of the tested device is run.
■ On-line mode: A mode thorough but non-intrusive test is invoked, which does
not affect other applications running at the same time.
■ Stand alone mode: This test uses all necessary system resources and performs a
thorough system test.
There is no support for third party PCI adapters (including PCI-ATI Graphics cards)
and devices in SunVTS.
Loopback connectors are required for Ethernet connection, parallel port, serial ports,
mouse and keyboard.
H.5 Error Messages

The memory test may report errors on IC’s which are not part of the Ultra AXi.
The memory test will report errors with addresses.
The CDROM test will detect bad media or no media in the CDROM drive.
The hard disk test can be used to analyze media. Test errors are reported with block
size. The sense key error can be used with the block number to repair a partially
defective area using the format command.
Appendix H System Software SunVTS Validation Test Suite H-3

H.6 Ultra AXi Specific Implementation
SunVTS does not test the ASM features on the Ultra AXi.
The SCSI tape test for low density tapes is not reliable and should not be used. The
test option short block count tests reliably. The test option long block count is not
reliable and should not be used.
The ATI graphics card has been tested and found to work with the Ultra AXi, but is
not formally supported by Sun.
H.7 SunVTS Test Reference Manual Table of

Contents
This section shows which chapters of the SunVTS Test Reference Manual are
applicable to the Ultra AXi system.
TABLE H-1 SunVTS Test Reference Manual Chapter Applicability
Chap Title Remarks
1 Introduction
2 Advanced Frame Buffer Test(afbtest)
3 SunATM Adapter Test(atmtest) Not Applicable
4 Audio Test (audio)
5 Bidirectional Parallel Port Printer Test (bpptest)
6 Compact Disc Test (cdtest)
7 Color Graphics Frame Buffer Test (cg14test)
8 Frame Buffer, GX, GX+ and TGX Options Test (cg6)
9 Disk and Floppy Drives Test (disktest)
10 ECP 1284 Parallel Port Printer Test (ecpptest)
11 Sun Enterprise Network Array Test(enatest) Not Applicable
12 Environmental Test (envtest) Not Applicable
13 Frame Buffer Test (fbtest) Not Applicable

TABLE H-1 SunVTS Test Reference Manual Chapter Applicability (Continued)
Chap Title Remarks
14 Fast Frame Buffer Test(ffbtest) OK

15 Floating Point Unit Test (fputest)
16 Dual Basic Rate ISDN (DBRI) Chip (isdntest)
17 ZX and TZX Graphics Accelerator Test (leotest) Not Applicable
18 SPARCprinter Ports Test (lpvitest) Not Applicable
19 M64 Video Board Test(m64test) Not Applicable
20 Multiprocessor Test (mptest) Not Applicable
21 Network Hardware Test (nettest) OK
22 PCMCIA Modem Card Test (pcsertest)
23 SPARCstorage Array Controller Test (plntest) Not Applicable
24 Physical Memory Test(pmem) OK
25 Prestoserve Test (pstest) Not Applicable
26 SunVideo Test (rtvctest) Not Applicable
27 Serial Asynchronous Interface (PCI) Not Applicable
28 Environmental Sensing Card Test (sentest) Not Applicable
29 Soc+ Host Adapter Card Test(socaltest) Not Applicable
30 NeWSprinter Test (spdtest)
31 Serial Parallel Controller Test (spif)
32 Serial Ports Test (sptest) 287
33 SunButtons Test (sunbuttons)
34 SunDials Test (sundials)
35 HSI/S Boards Test (sunlink)
36 Pixel Processor Test (sxtest)
37 System Test (systest)
38 Tape Drive Test (tapetest)
40 Virtual Memory Test (vmem) OK
41 SBus Expansion Subsystem Test (xbtest) Not Applicable
Appendix H System Software SunVTS Validation Test Suite H-5

H.8 Loopback Connectors
Appendix A of the SunVTS 2.1 Test Reference Manual (Part No. 802-7300-10 August
1997, Revision A) contains complete loopback connector information. This should be
used any time loopback connector use is contemplated.

Index
A Ethernet 3-8
Advanced System Monitoring 2-8, 3-9 Ethernet 1-1, A-24
ATX A-8, C-1, C-2, C-20 External SCSI 3-8
ATX power connector See J1901
F
B Fan Control and Monitoring 3-10
Block diagram 3-3 FFB2 3-6
Flash Memory 3-6
Floppy 2-7, 3-7
Floppy disk drives 1-1, A-21, C-1
C Functional Description 3-1
CD-ROM drives C-1
Color monitors C-2
Communication Ports 3-6
Connectors A-1, A-8 H
CPU module 2-2, 3-5 Hard disk drives C-1, C-2
Creator Graphics A-13, A-15 Headers A-1
Height Profiles B-3
D
DIMM 1-1, A-9, C-2, C-11, C-12 I
I/O 1-1, C-5
E
Ebus 3-9 J
ECP 1-3 J0101 A-10
EIDE 2-3 J0301 A-9
Environmental 2-12 J0302 A-9
EPP 1-3 J0303 A-9
J0304 A-9
Index-1
J0401 A-9 NVRAM 1-3
J0402 A-9
J0403 A-9
J0404 A-9
J0901 A-23 O
J0902 3-7, A-25 OBP 3-10
J1001 A-19
J1401 A-3
J1402 A-3
J1501 A-4, A-5
P
J1802 A-22 ParallelPort Interface 2-6
J1804 A-3 Parallel port 1-1, A-23
J1805 A-3 PCI 1-1, 2-5, 3-8, 3-9, A-18
J1806 A-3 Power 2-9, 2-10
J1901 A-8 Power enable switch A-7
J1902 A-21 Power on LED A-5
J1990 A-4, A-5 Power-up operation 4-1
J2101 A-18 Printer 3-7
J2102 A-18 Procedure, Assembly C-1, C-5
J2500 A-4, A-5 PS/2 2-6, 3-7
J2501 A-4, A-6 PS/2 1-3, A-26, C-1
J2502 A-26
J3201 A-4, A-6
J3302 A-4, A-7 R
J3602 A-7
Reliability 2-11
J3603 A-7
Reset 2-10
Jumpers A-1, A-3
Reset switch A-5
K S
Keyboards 1-1, A-6, A-25, A-26
SCA C-17
SCA SCSI C-17
SCSI A-19
L Serial Port Interface 2-6
Layout Diagram 3-4 Serial ports 1-1, A-22
Solaris 3-11
Speaker 2-10, A-6
Standard SCSI Connector C-17
M Sun Keyboard and Mouse 2-5, 3-7
Mechanical 2-11
Mechanical drawings B-1
Memory 2-2, 3-5, 3-8
Mouse Devices 1-1, A-5, A-25, A-26
T
Temperature Monitoring Points 3-10
Terminology 3-2
TOD 3-6
N Tools C-5
Non-Volatile Memory, Time of Day 2-7 Twisted Pair 2-4, A-24
Index-2
U
Ultra AXi motherboard 1-1, 3-7, 4-1, B-1, C-6, C-11
UltraSPARC Module Connector A-10, B-8, C-1
UPA64S 2-3, 3-9, A-15
V
Voltage 3-10
Index-3
Sun Microsystems
901 San Antonio Road Palo Alto, CA 94303
800-681-8845
http://www.sun.com/microelectronics
805-3158-02

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SPARCengine™Ultra™AXi

OEM Technical Manual

Sun Microsystems, Inc.

Part No. 805-3158-02

■ Canadian EMC IC Class B

■ European Union EMC CE Mark EN55022 & EN50082-1

■ Japanese EMC VCCI Class 2

The SPARCengine Ultra AXi product is a highly integrated, high performance

Who Should Use This Book

How This Book Is Organized

Chapter 2, “Specification Summary” provides a summary of specifications of the

iv SPARCengine Ultra AXi OEM Technical Manual • August 1998

Appendix A, “Jumpers, Headers, Connectors and Adapters,” describes the jumper

Appendix C, “Assembly and Installation,” describes how to assemble and install a

Appendix D, “Schematics,” presents schematic sheets on certain ASICs and all

Appendix E, “Enclosures, Power Supplies, Memory, Peripheral Devices and PCI

Appendix F, “OpenBoot Firmware,” provides information on the OpenBoot

Appendix G, “System Software, Solaris 2.6 Operating Environment” provides

Appendix H, “System Software, SunVTS Validation Test Suite” provides

Specifications and Standards

Integrated Circuit Specifications:

Other Sun Publications

vi SPARCengine Ultra AXi OEM Technical Manual • August 1998

TABLE P-1 Typographic Conventions

AaBbCc123 The names of commands, files, Edit your .login file.

AaBbCc123 What you type, contrasted with machine_name% su

Prompts in Command Examples

TABLE P-2 Prompts

C shell prompt machine_name%

2. Specification Summary 2-1

3. Functional Description 3-1

4. Sequence of Events at Power Up 4-1

A. Jumpers, Headers, Connectors and Adapters A-1

B. Mechanical Drawings B-1

C. Assembly, Installation and Initial Start Up Procedures C-1

F. OpenBoot Firmware F-1

FIGURE 1-1 Possible Configuration Examples 1-2

FIGURE 3-1 Ultra AXi Motherboard Block Diagram 3-3

FIGURE 3-2 Ultra AXi Layout 3-4

FIGURE B-1 Ultra AXi Motherboard IO View B-1

FIGURE B-2 Ultra AXi Motherboard Top View B-2

FIGURE B-3 Height Profile Top View B-3

FIGURE B-4 Height Profile IO Side of Board B-4

FIGURE B-5 Height Profile from Module End of Board B-4

FIGURE B-7 Ultra AXi Motherboard Thermal Map B-6

FIGURE B-9 UltraSPARC IIi 270 MHz Module B-9

FIGURE B-10 UltraSPARC IIi Module B-10

FIGURE C-1 Ultra AXi IO Panel C-5

FIGURE C-2 Ultra AXi Motherboard Installation C-6

FIGURE C-4 CPU Module Hold Down Installation C-7

FIGURE C-6 IO Panel Connector Panel Fasteners C-8

FIGURE C-7 Ultra AXi Hard Drive Installation C-9

FIGURE C-8 Ultra AXi Floppy Drive Installation C-9

FIGURE C-9 Ultra AXi CD ROM Installation C-10

FIGURE C-10 Ultra AXi DIMM Installation C-11

FIGURE C-11 DIMM Sockets Pair Assignments C-12

FIGURE C-12 Motherboard Power Connection C-16

FIGURE C-13 Floppy Drive Motherboard Connection C-16

FIGURE C-14 Internal SCSI Connector C-17