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    8251A Programmable Communication Interface: Specification Number 8251A-CI (I) REV C Page 1 of 11

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    خالد ناهض نايف نجم

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    8251A Programmable Communication Interface: Specification Number 8251A-CI (I) REV C Page 1 of 11

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    خالد ناهض نايف نجم
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    8251A

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    8251A Programmable Communication Interface: Specification Number 8251A-CI (I) REV C Page 1 of 11

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    خالد ناهض نايف نجم

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    of 11

    © 2013 Rochester Electronics, LLC.

    All Rights Reserved 05092013 8251A


    8251A
    PROGRAMMABLE COMMUNICATION INTERFACE
    ■■Synchronous and Asynchronous Operation ■■Asynchronous Baud Rate - DC to 19.2K
    ■■Synchronous 5-8 Bit Characters; Internal Baud
    or External Character Synchronization; ■■Full-Duplex, Double-Buffered Transmitter
    Automatic Sync Insertion and Receiver
    ■■Asynchronous 5-8 Bit Characters; Clock ■■Error Detection - Parity, Overrun and
    Rate - 1, 16, or 64 Times Baud Rate; Break Framing
    Character Generation; 1, 1 1/2, or 2 Stop ■■Compatible with an Extended Range of
    Bits; False Start Bit Detection; Automatic Intel Microprocessors
    Break Detect and Handling ■■28-Pin DIP Package
    ■■Synchronous Baud Rate - DC to 64K Baud ■■All Inputs and Outputs are TTL Compatible
    ■■Available in EXPRESS and Military
    Versions

    The 8251A is the industry standard Universal Synchronous/Asynchronous Receiver/Transmitter (USART)


    designed for data communications with microprocessor families such as MCS-48, 80, 85, and iAPX 86, 88.
    The 8251A is used as a peripheral device and is programmed by the CPU to operate using virtually any serial
    data transmission technique presently in use (including IBM “bi-sync”). The USART accepts data characters
    from the CPU in parallel format and then converts them into a continuous serial data stream for transmission.
    Simultaneously, it can receive serial data streams and convert them into parallel data characters for the CPU.
    The USART will signal the CPU whenever it can accept a new character for transmission or whenever it has
    received a character for the CPU. The CPU can read the complete status of the USART at any time. These
    include data transmission errors and control signals such as SYNDET, TxEMPTY. The chip is fabricated using
    Intel’s high performance HMOS technology.

    For complete Rochester ordering guide, please refer to page 2.


    Please contact factory for specific package and specification availability.

    Rochester Electronics guarantees performance of its semiconductor products to the original OEM specifications. “Typical” values are for reference purposes
    only. Certain minimum or maximum ratings may be based on product characterization, design, simulation, or sample testing. Rochester Electronics reserves
    the right to make changes without further notice to any specification herein.

    Specification Number 8251A-CI (I) REV C Page 1 of 11

    This datasheet has been downloaded from http://www.digchip.com at this page


    8251A
    Rochester Ordering Guide
    *Most products can also be offered as RoHS compliant, designated by a –G suffix. Please contact factory for more information.

    Rochester Part Number Intel Part Number Package Temperature


    D8251A D8251A CDIP-28 0° to +70°C
    ID8251A ID8251A CDIP-28 -40° to +85°C
    LD8251A LD8251A CDIP-28 -40° to +85°C
    P8251A P8251A PDIP-28 0° to +70°C
    QD8251A QD8251A CDIP-28 0° to +70°C
    QP8251A QP8251A PDIP-28 0° to +70°C
    TD8251A TD8251A CDIP-28 -40° to +85°C

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    8251A

    Rochester Electronics guarantees performance of its semiconductor products to the original OEM specifications. “Typical” values are for reference purposes
    only. Certain minimum or maximum ratings may be based on product characterization, design, simulation, or sample testing. Rochester Electronics reserves
    the right to make changes without further notice to any specification herein.

    Specification Number 8251A-CI (I) REV C Page 11 of 11

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